Unify IRQ handling.
[qemu] / hw / pl011.c
index fb7ab7b..29e551a 100644 (file)
@@ -27,8 +27,7 @@ typedef struct {
     int read_count;
     int read_trigger;
     CharDriverState *chr;
-    void *pic;
-    int irq;
+    qemu_irq irq;
 } pl011_state;
 
 #define PL011_INT_TX 0x20
@@ -47,7 +46,7 @@ static void pl011_update(pl011_state *s)
     uint32_t flags;
     
     flags = s->int_level & s->int_enabled;
-    pic_set_irq_new(s->pic, s->irq, flags != 0);
+    qemu_set_irq(s->irq, flags != 0);
 }
 
 static uint32_t pl011_read(void *opaque, target_phys_addr_t offset)
@@ -224,7 +223,7 @@ static CPUWriteMemoryFunc *pl011_writefn[] = {
    pl011_write
 };
 
-void pl011_init(uint32_t base, void *pic, int irq,
+void pl011_init(uint32_t base, qemu_irq irq,
                 CharDriverState *chr)
 {
     int iomemtype;
@@ -235,7 +234,6 @@ void pl011_init(uint32_t base, void *pic, int irq,
                                        pl011_writefn, s);
     cpu_register_physical_memory(base, 0x00000fff, iomemtype);
     s->base = base;
-    s->pic = pic;
     s->irq = irq;
     s->chr = chr;
     s->read_trigger = 1;