target-mips: don't map zero register as a TCG global

[qemu] / target-mips / translate.c

diff --git a/target-mips/translate.c b/target-mips/translate.c
index f38e576..7f747d6 100644 (file)
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -8491,7 +8491,7 @@ static void mips_tcg_init(void)
         return;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
-    for (i = 0; i < 32; i++)
+    for (i = 1; i < 32; i++)
         cpu_gpr[i] = tcg_global_mem_new(TCG_AREG0,
                                         offsetof(CPUState, active_tc.gpr[i]),
                                         regnames[i]);