sh4: Add FMAC instruction support
authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Wed, 14 Jan 2009 21:02:59 +0000 (21:02 +0000)
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Wed, 14 Jan 2009 21:02:59 +0000 (21:02 +0000)
Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Lionel Landwerlin <lionel.landwerlin@openwide.fr>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6309 c046a42c-6fe2-441c-8c8c-71466251a162

target-sh4/helper.h
target-sh4/op_helper.c
target-sh4/translate.c

index 631e7e1..e665185 100644 (file)
@@ -35,6 +35,7 @@ DEF_HELPER_2(fdiv_FT, i32, i32, i32)
 DEF_HELPER_2(fdiv_DT, i64, i64, i64)
 DEF_HELPER_1(float_FT, i32, i32)
 DEF_HELPER_1(float_DT, i64, i32)
+DEF_HELPER_3(fmac_FT, i32, i32, i32, i32)
 DEF_HELPER_2(fmul_FT, i32, i32, i32)
 DEF_HELPER_2(fmul_DT, i64, i64, i64)
 DEF_HELPER_1(fneg_T, i32, i32)
index aa81d9e..84e1ad3 100644 (file)
@@ -531,6 +531,17 @@ uint64_t helper_float_DT(uint32_t t0)
     return d.ll;
 }
 
+uint32_t helper_fmac_FT(uint32_t t0, uint32_t t1, uint32_t t2)
+{
+    CPU_FloatU f0, f1, f2;
+    f0.l = t0;
+    f1.l = t1;
+    f2.l = t2;
+    f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
+    f0.f = float32_add(f0.f, f2.f, &env->fp_status);
+    return f0.l;
+}
+
 uint32_t helper_fmul_FT(uint32_t t0, uint32_t t1)
 {
     CPU_FloatU f0, f1;
index ef50f9b..7e36cf8 100644 (file)
@@ -1176,6 +1176,17 @@ static void _decode_opc(DisasContext * ctx)
            }
        }
        return;
+    case 0xf00e: /* fmac FR0,RM,Rn */
+        {
+            CHECK_FPU_ENABLED
+            if (ctx->fpscr & FPSCR_PR) {
+                break; /* illegal instruction */
+            } else {
+                gen_helper_fmac_FT(cpu_fregs[FREG(B11_8)],
+                                   cpu_fregs[FREG(0)], cpu_fregs[FREG(B7_4)], cpu_fregs[FREG(B11_8)]);
+                return;
+            }
+        }
     }
 
     switch (ctx->opcode & 0xff00) {