Maemo patchset 20101501+0m5
[h-e-n] / arch / arm / plat-omap / include / mach / sram.h
index ab35d62..c1bc147 100644 (file)
@@ -21,9 +21,12 @@ extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
                                      u32 mem_type);
 extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
 
-extern u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl,
-                                    u32 sdrc_actim_ctrla,
-                                    u32 sdrc_actim_ctrlb, u32 m2);
+extern u32 omap3_configure_core_dpll(
+                       u32 m2, u32 unlock_dll, u32 f, u32 inc,
+                       u32 sdrc_rfr_ctrl_0, u32 sdrc_mr_0,
+                       u32 sdrc_rfr_ctrl_1, u32 sdrc_mr_1);
+
+extern void omap3_sram_restore_context(void);
 
 /* Do not use these */
 extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
@@ -58,9 +61,18 @@ extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
 extern unsigned long omap243x_sram_reprogram_sdrc_sz;
 
 
-extern u32 omap3_sram_configure_core_dpll(u32 sdrc_rfr_ctrl,
-                                         u32 sdrc_actim_ctrla,
-                                         u32 sdrc_actim_ctrlb, u32 m2);
+extern u32 omap3_sram_configure_core_dpll(
+                       u32 m2, u32 unlock_dll, u32 f, u32 inc,
+                       u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
+                       u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
+                       u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
+                       u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
 extern unsigned long omap3_sram_configure_core_dpll_sz;
 
+#ifdef CONFIG_PM
+extern void omap_push_sram_idle(void);
+#else
+static inline void omap_push_sram_idle(void) {}
+#endif /* CONFIG_PM */
+
 #endif