2 * i386 emulator main execution loop
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "exec-i386.h"
24 //#define DEBUG_SIGNAL
26 /* main execution loop */
28 /* maximum total translate dcode allocated */
29 #define CODE_GEN_BUFFER_SIZE (2048 * 1024)
30 //#define CODE_GEN_BUFFER_SIZE (128 * 1024)
31 #define CODE_GEN_MAX_SIZE 65536
32 #define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */
34 /* threshold to flush the translated code buffer */
35 #define CODE_GEN_BUFFER_MAX_SIZE (CODE_GEN_BUFFER_SIZE - CODE_GEN_MAX_SIZE)
37 #define CODE_GEN_MAX_BLOCKS (CODE_GEN_BUFFER_SIZE / 64)
38 #define CODE_GEN_HASH_BITS 15
39 #define CODE_GEN_HASH_SIZE (1 << CODE_GEN_HASH_BITS)
41 typedef struct TranslationBlock {
42 unsigned long pc; /* simulated PC corresponding to this block (EIP + CS base) */
43 unsigned long cs_base; /* CS base for this block */
44 unsigned int flags; /* flags defining in which context the code was generated */
45 uint8_t *tc_ptr; /* pointer to the translated code */
46 struct TranslationBlock *hash_next; /* next matching block */
49 TranslationBlock tbs[CODE_GEN_MAX_BLOCKS];
50 TranslationBlock *tb_hash[CODE_GEN_HASH_SIZE];
53 uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE];
54 uint8_t *code_gen_ptr;
59 static inline int testandset (int *p)
62 __asm__ __volatile__ (
70 : "r" (p), "r" (1), "r" (0)
77 static inline int testandset (int *p)
82 __asm__ __volatile__ ("lock; cmpxchgl %3, %1; sete %0"
83 : "=q" (ret), "=m" (*p), "=a" (readval)
84 : "r" (1), "m" (*p), "a" (0)
91 static inline int testandset (int *p)
95 __asm__ __volatile__ ("0: cs %0,%1,0(%2)\n"
98 : "r" (1), "a" (p), "0" (*p)
104 int global_cpu_lock = 0;
108 while (testandset(&global_cpu_lock));
111 void cpu_unlock(void)
116 /* exception support */
117 /* NOTE: not static to force relocation generation by GCC */
118 void raise_exception(int exception_index)
120 /* NOTE: the register at this point must be saved by hand because
121 longjmp restore them */
123 env->regs[R_EAX] = EAX;
126 env->regs[R_ECX] = ECX;
129 env->regs[R_EDX] = EDX;
132 env->regs[R_EBX] = EBX;
135 env->regs[R_ESP] = ESP;
138 env->regs[R_EBP] = EBP;
141 env->regs[R_ESI] = ESI;
144 env->regs[R_EDI] = EDI;
146 env->exception_index = exception_index;
147 longjmp(env->jmp_env, 1);
150 #if defined(DEBUG_EXEC)
151 static const char *cc_op_str[] = {
184 static void cpu_x86_dump_state(FILE *f)
187 eflags = cc_table[CC_OP].compute_all();
188 eflags |= (DF & DIRECTION_FLAG);
190 "EAX=%08x EBX=%08X ECX=%08x EDX=%08x\n"
191 "ESI=%08x EDI=%08X EBP=%08x ESP=%08x\n"
192 "CCS=%08x CCD=%08x CCO=%-8s EFL=%c%c%c%c%c%c%c\n"
194 env->regs[R_EAX], env->regs[R_EBX], env->regs[R_ECX], env->regs[R_EDX],
195 env->regs[R_ESI], env->regs[R_EDI], env->regs[R_EBP], env->regs[R_ESP],
196 env->cc_src, env->cc_dst, cc_op_str[env->cc_op],
197 eflags & DIRECTION_FLAG ? 'D' : '-',
198 eflags & CC_O ? 'O' : '-',
199 eflags & CC_S ? 'S' : '-',
200 eflags & CC_Z ? 'Z' : '-',
201 eflags & CC_A ? 'A' : '-',
202 eflags & CC_P ? 'P' : '-',
203 eflags & CC_C ? 'C' : '-',
206 fprintf(f, "ST0=%f ST1=%f ST2=%f ST3=%f\n",
207 (double)ST0, (double)ST1, (double)ST(2), (double)ST(3));
213 void cpu_x86_tblocks_init(void)
216 code_gen_ptr = code_gen_buffer;
220 /* flush all the translation blocks */
221 static void tb_flush(void)
225 printf("gemu: flush code_size=%d nb_tbs=%d avg_tb_size=%d\n",
226 code_gen_ptr - code_gen_buffer,
228 (code_gen_ptr - code_gen_buffer) / nb_tbs);
231 for(i = 0;i < CODE_GEN_HASH_SIZE; i++)
233 code_gen_ptr = code_gen_buffer;
234 /* XXX: flush processor icache at this point */
237 /* find a translation block in the translation cache. If not found,
238 return NULL and the pointer to the last element of the list in pptb */
239 static inline TranslationBlock *tb_find(TranslationBlock ***pptb,
241 unsigned long cs_base,
244 TranslationBlock **ptb, *tb;
247 h = pc & (CODE_GEN_HASH_SIZE - 1);
253 if (tb->pc == pc && tb->cs_base == cs_base && tb->flags == flags)
255 ptb = &tb->hash_next;
261 /* allocate a new translation block. flush the translation buffer if
262 too many translation blocks or too much generated code */
263 static inline TranslationBlock *tb_alloc(void)
265 TranslationBlock *tb;
266 if (nb_tbs >= CODE_GEN_MAX_BLOCKS ||
267 (code_gen_ptr - code_gen_buffer) >= CODE_GEN_BUFFER_MAX_SIZE)
273 int cpu_x86_exec(CPUX86State *env1)
275 int saved_T0, saved_T1, saved_A0;
276 CPUX86State *saved_env;
301 int code_gen_size, ret;
302 void (*gen_func)(void);
303 TranslationBlock *tb, **ptb;
304 uint8_t *tc_ptr, *cs_base, *pc;
307 /* first we save global registers */
315 EAX = env->regs[R_EAX];
319 ECX = env->regs[R_ECX];
323 EDX = env->regs[R_EDX];
327 EBX = env->regs[R_EBX];
331 ESP = env->regs[R_ESP];
335 EBP = env->regs[R_EBP];
339 ESI = env->regs[R_ESI];
343 EDI = env->regs[R_EDI];
346 /* put eflags in CPU temporary format */
347 CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
348 DF = 1 - (2 * ((env->eflags >> 10) & 1));
349 CC_OP = CC_OP_EFLAGS;
350 env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
351 env->interrupt_request = 0;
353 /* prepare setjmp context for exception handling */
354 if (setjmp(env->jmp_env) == 0) {
356 if (env->interrupt_request) {
357 raise_exception(EXCP_INTERRUPT);
361 cpu_x86_dump_state(logfile);
364 /* we compute the CPU state. We assume it will not
365 change during the whole generated block. */
366 flags = env->seg_cache[R_CS].seg_32bit << GEN_FLAG_CODE32_SHIFT;
367 flags |= env->seg_cache[R_SS].seg_32bit << GEN_FLAG_SS32_SHIFT;
368 flags |= (((unsigned long)env->seg_cache[R_DS].base |
369 (unsigned long)env->seg_cache[R_ES].base |
370 (unsigned long)env->seg_cache[R_SS].base) != 0) <<
371 GEN_FLAG_ADDSEG_SHIFT;
372 flags |= (env->eflags & VM_MASK) >> (17 - GEN_FLAG_VM_SHIFT);
373 cs_base = env->seg_cache[R_CS].base;
374 pc = cs_base + env->eip;
375 tb = tb_find(&ptb, (unsigned long)pc, (unsigned long)cs_base,
378 /* if no translated code available, then translate it now */
379 /* XXX: very inefficient: we lock all the cpus when
382 tc_ptr = code_gen_ptr;
383 ret = cpu_x86_gen_code(code_gen_ptr, CODE_GEN_MAX_SIZE,
384 &code_gen_size, pc, cs_base, flags);
385 /* if invalid instruction, signal it */
388 raise_exception(EXCP06_ILLOP);
392 tb->pc = (unsigned long)pc;
393 tb->cs_base = (unsigned long)cs_base;
396 tb->hash_next = NULL;
397 code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));
400 /* execute the generated code */
402 gen_func = (void *)tc_ptr;
406 ret = env->exception_index;
408 /* restore flags in standard format */
409 env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
411 /* restore global registers */
443 void cpu_x86_interrupt(CPUX86State *s)
445 s->interrupt_request = 1;
449 void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector)
451 CPUX86State *saved_env;
455 load_seg(seg_reg, selector);
469 #include <sys/ucontext.h>
471 static inline int handle_cpu_signal(unsigned long pc,
475 printf("gemu: SIGSEGV pc=0x%08lx oldset=0x%08lx\n",
476 pc, *(unsigned long *)old_set);
478 if (pc >= (unsigned long)code_gen_buffer &&
479 pc < (unsigned long)code_gen_buffer + CODE_GEN_BUFFER_SIZE) {
480 /* the PC is inside the translated code. It means that we have
481 a virtual CPU fault */
482 /* we restore the process signal mask as the sigreturn should
484 sigprocmask(SIG_SETMASK, old_set, NULL);
485 /* XXX: need to compute virtual pc position by retranslating
486 code. The rest of the CPU state should be correct. */
487 raise_exception(EXCP0D_GPF);
488 /* never comes here */
495 int cpu_x86_signal_handler(int host_signum, struct siginfo *info,
498 #if defined(__i386__)
499 struct ucontext *uc = puc;
507 pc = uc->uc_mcontext.gregs[REG_EIP];
508 pold_set = &uc->uc_sigmask;
509 return handle_cpu_signal(pc, pold_set);
511 #warning No CPU specific signal handler: cannot handle target SIGSEGV events