git.maemo.org Git - drnoksnes/blob - getset.h

   1 /*
   2  * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
   3  *
   4  * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and
   5  *                           Jerremy Koot (jkoot@snes9x.com)
   6  *
   7  * Super FX C emulator code
   8  * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and
   9  *                           Gary Henderson.
  10  * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_.
  11  *
  12  * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson.
  13  * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_.
  14  * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com).
  15  *
  16  * DOS port code contains the works of other authors. See headers in
  17  * individual files.
  18  *
  19  * Snes9x homepage: http://www.snes9x.com
  20  *
  21  * Permission to use, copy, modify and distribute Snes9x in both binary and
  22  * source form, for non-commercial purposes, is hereby granted without fee,
  23  * providing that this license information and copyright notice appear with
  24  * all copies and any derived work.
  25  *
  26  * This software is provided 'as-is', without any express or implied
  27  * warranty. In no event shall the authors be held liable for any damages
  28  * arising from the use of this software.
  29  *
  30  * Snes9x is freeware for PERSONAL USE only. Commercial users should
  31  * seek permission of the copyright holders first. Commercial use includes
  32  * charging money for Snes9x or software derived from Snes9x.
  33  *
  34  * The copyright holders request that bug fixes and improvements to the code
  35  * should be forwarded to them so everyone can benefit from the modifications
  36  * in future versions.
  37  *
  38  * Super NES and Super Nintendo Entertainment System are trademarks of
  39  * Nintendo Co., Limited and its subsidiary companies.
  40  */
  41 #ifndef _GETSET_H_
  42 #define _GETSET_H_
  43
  44 #include "ppu.h"
  45 #include "dsp1.h"
  46 #include "cpuexec.h"
  47 #include "sa1.h"
  48
  49 //#define __memcheck__
  50 //#define __show_io__
  51 extern int oppause;
  52 extern uint16 mem_check;
  53
  54 INLINE uint8 S9xGetByte (uint32 Address)
  55 {
  56 #ifdef __show_io__
  57         char str[64];
  58         sprintf(str,"rd @ %04X",Address);
  59         S9xMessage(0,0,str);
  60         gp32_pause();
  61 #endif
  62 #ifdef __memcheck__
  63         mem_check+=(Address>>16)+Address;
  64 #endif
  65 #if defined(VAR_CYCLES) || defined(CPU_SHUTDOWN)
  66     int block;
  67     uint8 *GetAddress = Memory.Map [block = (Address >> MEMMAP_SHIFT) & MEMMAP_MASK];
  68 #else
  69     uint8 *GetAddress = Memory.Map [(Address >> MEMMAP_SHIFT) & MEMMAP_MASK];
  70 #endif
  71     if (GetAddress >= (uint8 *) CMemory::MAP_LAST)
  72     {
  73 #ifdef VAR_CYCLES
  74         CPU.Cycles += Memory.MemorySpeed [block];
  75 #endif
  76 #ifdef CPU_SHUTDOWN
  77         if (Memory.BlockIsRAM [block])
  78             CPU.WaitAddress = CPU.PCAtOpcodeStart;
  79 #endif
  80         return (*(GetAddress + (Address & 0xffff)));
  81     }
  82
  83     switch ((int) GetAddress)
  84     {
  85     case CMemory::MAP_PPU:
  86 #ifdef VAR_CYCLES
  87         if (!CPU.InDMA)
  88             CPU.Cycles += ONE_CYCLE;
  89 #endif
  90         return (S9xGetPPU (Address & 0xffff));
  91     case CMemory::MAP_CPU:
  92 #ifdef VAR_CYCLES
  93         CPU.Cycles += ONE_CYCLE;
  94 #endif
  95         return (S9xGetCPU (Address & 0xffff));
  96     case CMemory::MAP_DSP:
  97 #ifdef VAR_CYCLES
  98         CPU.Cycles += SLOW_ONE_CYCLE;
  99 #endif
 100         return (S9xGetDSP (Address & 0xffff));
 101     case CMemory::MAP_SA1RAM:
 102     case CMemory::MAP_LOROM_SRAM:
 103 #ifdef VAR_CYCLES
 104         CPU.Cycles += SLOW_ONE_CYCLE;
 105 #endif
 106         return (*(Memory.SRAM + ((Address & CPU.Memory_SRAMMask))));
 107
 108     case CMemory::MAP_HIROM_SRAM:
 109 #ifdef VAR_CYCLES
 110         CPU.Cycles += SLOW_ONE_CYCLE;
 111 #endif
 112         return (*(Memory.SRAM + (((Address & 0x7fff) - 0x6000 +
 113                                   ((Address & 0xf0000) >> 3)) & CPU.Memory_SRAMMask)));
 114
 115     case CMemory::MAP_DEBUG:
 116 #ifdef DEBUGGER
 117         printf ("R(B) %06x\n", Address);
 118 #endif
 119
 120     case CMemory::MAP_BWRAM:
 121 #ifdef VAR_CYCLES
 122         CPU.Cycles += SLOW_ONE_CYCLE;
 123 #endif
 124         return (*(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)));
 125 //#ifndef __GP32__
 126     case CMemory::MAP_C4:
 127         return (S9xGetC4 (Address & 0xffff));
 128 //#endif
 129     default:
 130     case CMemory::MAP_NONE:
 131 #ifdef VAR_CYCLES
 132         CPU.Cycles += SLOW_ONE_CYCLE;
 133 #endif
 134 #ifdef DEBUGGER
 135         printf ("R(B) %06x\n", Address);
 136 #endif
 137         return ((Address >> 8) & 0xff);
 138     }
 139 }
 140
 141 INLINE uint16 S9xGetWord (uint32 Address)
 142 {
 143 #ifdef __show_io__
 144         char str[64];
 145         sprintf(str,"rd @ %04X",Address);
 146         S9xMessage(0,0,str);
 147         gp32_pause();
 148 #endif
 149 #ifdef __memcheck__
 150         mem_check+=(Address>>16)+Address;
 151 #endif
 152     if ((Address & 0x1fff) == 0x1fff)
 153     {
 154         return (S9xGetByte (Address) | (S9xGetByte (Address + 1) << 8));
 155     }
 156 #if defined(VAR_CYCLES) || defined(CPU_SHUTDOWN)
 157     int block;
 158     uint8 *GetAddress = Memory.Map [block = (Address >> MEMMAP_SHIFT) & MEMMAP_MASK];
 159 #else
 160     uint8 *GetAddress = Memory.Map [(Address >> MEMMAP_SHIFT) & MEMMAP_MASK];
 161 #endif
 162     if (GetAddress >= (uint8 *) CMemory::MAP_LAST)
 163     {
 164 #ifdef VAR_CYCLES
 165         CPU.Cycles += Memory.MemorySpeed [block] << 1;
 166 #endif
 167 #ifdef CPU_SHUTDOWN
 168         if (Memory.BlockIsRAM [block])
 169             CPU.WaitAddress = CPU.PCAtOpcodeStart;
 170 #endif
 171 #ifdef FAST_LSB_WORD_ACCESS
 172         return (*(uint16 *) (GetAddress + (Address & 0xffff)));
 173 #else
 174         return (*(GetAddress + (Address & 0xffff)) |
 175                 (*(GetAddress + (Address & 0xffff) + 1) << 8));
 176 #endif
 177     }
 178
 179     switch ((int) GetAddress)
 180     {
 181     case CMemory::MAP_PPU:
 182 #ifdef VAR_CYCLES
 183         if (!CPU.InDMA)
 184             CPU.Cycles += TWO_CYCLES;
 185 #endif
 186         return (S9xGetPPU (Address & 0xffff) |
 187                 (S9xGetPPU ((Address + 1) & 0xffff) << 8));
 188     case CMemory::MAP_CPU:
 189 #ifdef VAR_CYCLES
 190         CPU.Cycles += TWO_CYCLES;
 191 #endif
 192         return (S9xGetCPU (Address & 0xffff) |
 193                 (S9xGetCPU ((Address + 1) & 0xffff) << 8));
 194     case CMemory::MAP_DSP:
 195 #ifdef VAR_CYCLES
 196         CPU.Cycles += SLOW_ONE_CYCLE * 2;
 197 #endif
 198         return (S9xGetDSP (Address & 0xffff) |
 199                 (S9xGetDSP ((Address + 1) & 0xffff) << 8));
 200     case CMemory::MAP_SA1RAM:
 201     case CMemory::MAP_LOROM_SRAM:
 202 #ifdef VAR_CYCLES
 203         CPU.Cycles += SLOW_ONE_CYCLE * 2;
 204 #endif
 205         return (*(Memory.SRAM + (Address & CPU.Memory_SRAMMask)) |
 206                 (*(Memory.SRAM + ((Address + 1) & CPU.Memory_SRAMMask)) << 8));
 207
 208     case CMemory::MAP_HIROM_SRAM:
 209 #ifdef VAR_CYCLES
 210         CPU.Cycles += SLOW_ONE_CYCLE * 2;
 211 #endif
 212         return (*(Memory.SRAM +
 213                   (((Address & 0x7fff) - 0x6000 +
 214                     ((Address & 0xf0000) >> 3)) & CPU.Memory_SRAMMask)) |
 215                 (*(Memory.SRAM +
 216                    ((((Address + 1) & 0x7fff) - 0x6000 +
 217                      (((Address + 1) & 0xf0000) >> 3)) & CPU.Memory_SRAMMask)) << 8));
 218
 219     case CMemory::MAP_BWRAM:
 220 #ifdef VAR_CYCLES
 221         CPU.Cycles += SLOW_ONE_CYCLE * 2;
 222 #endif
 223         return (*(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) |
 224                 (*(Memory.BWRAM + (((Address + 1) & 0x7fff) - 0x6000)) << 8));
 225
 226     case CMemory::MAP_DEBUG:
 227 #ifdef DEBUGGER
 228         printf ("R(W) %06x\n", Address);
 229 #endif
 230
 231 //#ifndef __GP32__
 232     case CMemory::MAP_C4:
 233         return (S9xGetC4 (Address & 0xffff) |
 234                 (S9xGetC4 ((Address + 1) & 0xffff) << 8));
 235 //#endif
 236     default:
 237     case CMemory::MAP_NONE:
 238 #ifdef VAR_CYCLES
 239         CPU.Cycles += SLOW_ONE_CYCLE * 2;
 240 #endif
 241 #ifdef DEBUGGER
 242         printf ("R(W) %06x\n", Address);
 243 #endif
 244         return (((Address >> 8) | (Address & 0xff00)) & 0xffff);
 245     }
 246 }
 247
 248 INLINE void S9xSetByte (uint8 Byte, uint32 Address)
 249 {
 250 #ifdef __show_io__
 251         char str[64];
 252         sprintf(str,"wr @ %04X %02X",Address,Byte);
 253         S9xMessage(0,0,str);
 254         gp32_pause();
 255 #endif
 256 #ifdef __memcheck__
 257         mem_check+=Byte;
 258 #endif
 259
 260 #if defined(CPU_SHUTDOWN)
 261     CPU.WaitAddress = NULL;
 262 #endif
 263 #if defined(VAR_CYCLES)
 264     int block;
 265     uint8 *SetAddress = Memory.WriteMap [block = ((Address >> MEMMAP_SHIFT) & MEMMAP_MASK)];
 266 #else
 267     uint8 *SetAddress = Memory.WriteMap [(Address >> MEMMAP_SHIFT) & MEMMAP_MASK];
 268 #endif
 269
 270     if (SetAddress >= (uint8 *) CMemory::MAP_LAST)
 271     {
 272 #ifdef VAR_CYCLES
 273         CPU.Cycles += Memory.MemorySpeed [block];
 274 #endif
 275 #ifdef CPU_SHUTDOWN
 276         SetAddress += Address & 0xffff;
 277 #ifdef USE_SA1
 278         if (SetAddress == SA1.WaitByteAddress1 ||
 279             SetAddress == SA1.WaitByteAddress2)
 280         {
 281             SA1.Executing = SA1.S9xOpcodes != NULL;
 282             SA1.WaitCounter = 0;
 283         }
 284 #endif
 285         *SetAddress = Byte;
 286 #else
 287         *(SetAddress + (Address & 0xffff)) = Byte;
 288 #endif
 289         return;
 290     }
 291
 292     switch ((int) SetAddress)
 293     {
 294     case CMemory::MAP_PPU:
 295 #ifdef VAR_CYCLES
 296         if (!CPU.InDMA)
 297             CPU.Cycles += ONE_CYCLE;
 298 #endif
 299         S9xSetPPU (Byte, Address & 0xffff);
 300         return;
 301
 302     case CMemory::MAP_CPU:
 303 #ifdef VAR_CYCLES
 304         CPU.Cycles += ONE_CYCLE;
 305 #endif
 306         S9xSetCPU (Byte, Address & 0xffff);
 307         return;
 308
 309     case CMemory::MAP_DSP:
 310 #ifdef VAR_CYCLES
 311         CPU.Cycles += SLOW_ONE_CYCLE;
 312 #endif
 313         S9xSetDSP (Byte, Address & 0xffff);
 314         return;
 315
 316     case CMemory::MAP_LOROM_SRAM:
 317 #ifdef VAR_CYCLES
 318         CPU.Cycles += SLOW_ONE_CYCLE;
 319 #endif
 320         if (CPU.Memory_SRAMMask)
 321         {
 322             *(Memory.SRAM + (Address & CPU.Memory_SRAMMask)) = Byte;
 323             CPU.SRAMModified = TRUE;
 324         }
 325         return;
 326
 327     case CMemory::MAP_HIROM_SRAM:
 328 #ifdef VAR_CYCLES
 329         CPU.Cycles += SLOW_ONE_CYCLE;
 330 #endif
 331         if (CPU.Memory_SRAMMask)
 332         {
 333             *(Memory.SRAM + (((Address & 0x7fff) - 0x6000 +
 334                               ((Address & 0xf0000) >> 3)) & CPU.Memory_SRAMMask)) = Byte;
 335             CPU.SRAMModified = TRUE;
 336         }
 337         return;
 338
 339     case CMemory::MAP_BWRAM:
 340 #ifdef VAR_CYCLES
 341         CPU.Cycles += SLOW_ONE_CYCLE;
 342 #endif
 343         *(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) = Byte;
 344         CPU.SRAMModified = TRUE;
 345         return;
 346
 347     case CMemory::MAP_DEBUG:
 348 #ifdef DEBUGGER
 349         printf ("W(B) %06x\n", Address);
 350 #endif
 351
 352     case CMemory::MAP_SA1RAM:
 353 #ifdef VAR_CYCLES
 354         CPU.Cycles += SLOW_ONE_CYCLE;
 355 #endif
 356         *(Memory.SRAM + (Address & 0xffff)) = Byte;
 357         SA1.Executing = !SA1.Waiting;
 358         break;
 359 //#ifndef __GP32__
 360     case CMemory::MAP_C4:
 361         S9xSetC4 (Byte, Address & 0xffff);
 362         return;
 363 //#endif
 364     default:
 365     case CMemory::MAP_NONE:
 366 #ifdef VAR_CYCLES
 367         CPU.Cycles += SLOW_ONE_CYCLE;
 368 #endif
 369 #ifdef DEBUGGER
 370         printf ("W(B) %06x\n", Address);
 371 #endif
 372         return;
 373     }
 374 }
 375
 376 INLINE void S9xSetWord (uint16 Word, uint32 Address)
 377 {
 378 #ifdef __show_io__
 379         char str[64];
 380         sprintf(str,"wr @ %04X %04X",Address,Word);
 381         S9xMessage(0,0,str);
 382         gp32_pause();
 383 #endif
 384 #ifdef __memcheck__
 385         mem_check+=Word;
 386 #endif
 387 #if defined(CPU_SHUTDOWN)
 388     CPU.WaitAddress = NULL;
 389 #endif
 390 #if defined (VAR_CYCLES)
 391     int block;
 392     uint8 *SetAddress = Memory.WriteMap [block = ((Address >> MEMMAP_SHIFT) & MEMMAP_MASK)];
 393 #else
 394     uint8 *SetAddress = Memory.WriteMap [(Address >> MEMMAP_SHIFT) & MEMMAP_MASK];
 395 #endif
 396
 397     if (SetAddress >= (uint8 *) CMemory::MAP_LAST)
 398     {
 399 #ifdef VAR_CYCLES
 400         CPU.Cycles += Memory.MemorySpeed [block] << 1;
 401 #endif
 402 #if defined(CPU_SHUTDOWN) && defined(USE_SA1)
 403         uint8 *SetAddressSA1 += Address & 0xffff;
 404         if (SetAddressSA1 == SA1.WaitByteAddress1 ||
 405             SetAddressSA1 == SA1.WaitByteAddress2)
 406         {
 407             SA1.Executing = SA1.S9xOpcodes != NULL;
 408             SA1.WaitCounter = 0;
 409         }
 410 #endif
 411 #ifdef FAST_LSB_WORD_ACCESS
 412         *(uint16 *) (SetAddress + (Address & 0xffff)) = Word;
 413 #else
 414         *(SetAddress + (Address & 0xffff)) = (uint8) Word;
 415         *(SetAddress + ((Address + 1) & 0xffff)) = Word >> 8;
 416 #endif
 417         return;
 418     }
 419
 420     switch ((int) SetAddress)
 421     {
 422     case CMemory::MAP_PPU:
 423 #ifdef VAR_CYCLES
 424         if (!CPU.InDMA)
 425             CPU.Cycles += TWO_CYCLES;
 426 #endif
 427         S9xSetPPU ((uint8) Word, Address & 0xffff);
 428         S9xSetPPU (Word >> 8, (Address & 0xffff) + 1);
 429         return;
 430
 431     case CMemory::MAP_CPU:
 432 #ifdef VAR_CYCLES
 433         CPU.Cycles += TWO_CYCLES;
 434 #endif
 435         S9xSetCPU ((uint8) Word, (Address & 0xffff));
 436         S9xSetCPU (Word >> 8, (Address & 0xffff) + 1);
 437         return;
 438
 439     case CMemory::MAP_DSP:
 440 #ifdef VAR_CYCLES
 441         CPU.Cycles += SLOW_ONE_CYCLE * 2;
 442 #endif
 443         S9xSetDSP ((uint8) Word, (Address & 0xffff));
 444         S9xSetDSP (Word >> 8, (Address & 0xffff) + 1);
 445         return;
 446
 447     case CMemory::MAP_LOROM_SRAM:
 448 #ifdef VAR_CYCLES
 449         CPU.Cycles += SLOW_ONE_CYCLE * 2;
 450 #endif
 451         if (CPU.Memory_SRAMMask)
 452         {
 453             *(Memory.SRAM + (Address & CPU.Memory_SRAMMask)) = (uint8) Word;
 454             *(Memory.SRAM + ((Address + 1) & CPU.Memory_SRAMMask)) = Word >> 8;
 455             CPU.SRAMModified = TRUE;
 456         }
 457         return;
 458
 459     case CMemory::MAP_HIROM_SRAM:
 460 #ifdef VAR_CYCLES
 461         CPU.Cycles += SLOW_ONE_CYCLE * 2;
 462 #endif
 463         if (CPU.Memory_SRAMMask)
 464         {
 465             *(Memory.SRAM +
 466               (((Address & 0x7fff) - 0x6000 +
 467                 ((Address & 0xf0000) >> MEMMAP_SHIFT) & CPU.Memory_SRAMMask))) = (uint8) Word;
 468             *(Memory.SRAM +
 469               ((((Address + 1) & 0x7fff) - 0x6000 +
 470                 (((Address + 1) & 0xf0000) >> MEMMAP_SHIFT) & CPU.Memory_SRAMMask))) = (uint8) (Word >> 8);
 471             CPU.SRAMModified = TRUE;
 472         }
 473         return;
 474
 475     case CMemory::MAP_BWRAM:
 476 #ifdef VAR_CYCLES
 477         CPU.Cycles += SLOW_ONE_CYCLE * 2;
 478 #endif
 479         *(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) = (uint8) Word;
 480         *(Memory.BWRAM + (((Address + 1) & 0x7fff) - 0x6000)) = (uint8) (Word >> 8);
 481         CPU.SRAMModified = TRUE;
 482         return;
 483
 484     case CMemory::MAP_DEBUG:
 485 #ifdef DEBUGGER
 486         printf ("W(W) %06x\n", Address);
 487 #endif
 488
 489     case CMemory::MAP_SA1RAM:
 490 #ifdef VAR_CYCLES
 491         CPU.Cycles += SLOW_ONE_CYCLE;
 492 #endif
 493         *(Memory.SRAM + (Address & 0xffff)) = (uint8) Word;
 494         *(Memory.SRAM + ((Address + 1) & 0xffff)) = (uint8) (Word >> 8);
 495         SA1.Executing = !SA1.Waiting;
 496         break;
 497 //#ifndef __GP32__
 498     case CMemory::MAP_C4:
 499         S9xSetC4 (Word & 0xff, Address & 0xffff);
 500         S9xSetC4 ((uint8) (Word >> 8), (Address + 1) & 0xffff);
 501         return;
 502 //#endif
 503     default:
 504     case CMemory::MAP_NONE:
 505 #ifdef VAR_CYCLES
 506         CPU.Cycles += SLOW_ONE_CYCLE * 2;
 507 #endif
 508 #ifdef DEBUGGER
 509         printf ("W(W) %06x\n", Address);
 510 #endif
 511         return;
 512     }
 513 }
 514
 515 INLINE uint8 *GetBasePointer (uint32 Address)
 516 {
 517     uint8 *GetAddress = Memory.Map [(Address >> MEMMAP_SHIFT) & MEMMAP_MASK];
 518     if (GetAddress >= (uint8 *) CMemory::MAP_LAST)
 519         return (GetAddress);
 520
 521     switch ((int) GetAddress)
 522     {
 523     case CMemory::MAP_PPU:
 524         return (Memory.FillRAM - 0x2000);
 525     case CMemory::MAP_CPU:
 526         return (Memory.FillRAM - 0x4000);
 527     case CMemory::MAP_DSP:
 528         return (Memory.FillRAM - 0x6000);
 529     case CMemory::MAP_SA1RAM:
 530     case CMemory::MAP_LOROM_SRAM:
 531         return (Memory.SRAM);
 532     case CMemory::MAP_BWRAM:
 533         return (Memory.BWRAM - 0x6000);
 534     case CMemory::MAP_HIROM_SRAM:
 535         return (Memory.SRAM - 0x6000);
 536 //#ifndef __GP32__
 537     case CMemory::MAP_C4:
 538         return (Memory.C4RAM - 0x6000);
 539 //#endif
 540     case CMemory::MAP_DEBUG:
 541 #ifdef DEBUGGER
 542         printf ("GBP %06x\n", Address);
 543 #endif
 544
 545     default:
 546     case CMemory::MAP_NONE:
 547 #ifdef DEBUGGER
 548         printf ("GBP %06x\n", Address);
 549 #endif
 550         return (0);
 551     }
 552 }
 553
 554 INLINE uint8 *S9xGetMemPointer (uint32 Address)
 555 {
 556     uint8 *GetAddress = Memory.Map [(Address >> MEMMAP_SHIFT) & MEMMAP_MASK];
 557     if (GetAddress >= (uint8 *) CMemory::MAP_LAST)
 558         return (GetAddress + (Address & 0xffff));
 559
 560     switch ((int) GetAddress)
 561     {
 562     case CMemory::MAP_PPU:
 563         return (Memory.FillRAM - 0x2000 + (Address & 0xffff));
 564     case CMemory::MAP_CPU:
 565         return (Memory.FillRAM - 0x4000 + (Address & 0xffff));
 566     case CMemory::MAP_DSP:
 567         return (Memory.FillRAM - 0x6000 + (Address & 0xffff));
 568     case CMemory::MAP_SA1RAM:
 569     case CMemory::MAP_LOROM_SRAM:
 570         return (Memory.SRAM + (Address & 0xffff));
 571     case CMemory::MAP_BWRAM:
 572         return (Memory.BWRAM - 0x6000 + (Address & 0xffff));
 573     case CMemory::MAP_HIROM_SRAM:
 574         return (Memory.SRAM - 0x6000 + (Address & 0xffff));
 575 //#ifndef __GP32__
 576     case CMemory::MAP_C4:
 577         return (Memory.C4RAM - 0x6000 + (Address & 0xffff));
 578 //#endif
 579     case CMemory::MAP_DEBUG:
 580 #ifdef DEBUGGER
 581         printf ("GMP %06x\n", Address);
 582 #endif
 583     default:
 584     case CMemory::MAP_NONE:
 585 #ifdef DEBUGGER
 586         printf ("GMP %06x\n", Address);
 587 #endif
 588         return (0);
 589     }
 590 }
 591
 592 INLINE void S9xSetPCBase (uint32 Address)
 593 {
 594 #ifdef VAR_CYCLES
 595     int block;
 596     uint8 *GetAddress = Memory.Map [block = (Address >> MEMMAP_SHIFT) & MEMMAP_MASK];
 597 #else
 598     uint8 *GetAddress = Memory.Map [(Address >> MEMMAP_SHIFT) & MEMMAP_MASK];
 599 #endif
 600     if (GetAddress >= (uint8 *) CMemory::MAP_LAST)
 601     {
 602 #ifdef VAR_CYCLES
 603         CPU.MemSpeed = Memory.MemorySpeed [block];
 604         CPU.MemSpeedx2 = CPU.MemSpeed << 1;
 605 #endif
 606         CPU.PCBase = GetAddress;
 607         CPU.PC = GetAddress + (Address & 0xffff);
 608         return;
 609     }
 610
 611     switch ((int) GetAddress)
 612     {
 613     case CMemory::MAP_PPU:
 614 #ifdef VAR_CYCLES
 615         CPU.MemSpeed = ONE_CYCLE;
 616         CPU.MemSpeedx2 = TWO_CYCLES;
 617 #endif
 618         CPU.PCBase = Memory.FillRAM - 0x2000;
 619         CPU.PC = CPU.PCBase + (Address & 0xffff);
 620         return;
 621
 622     case CMemory::MAP_CPU:
 623 #ifdef VAR_CYCLES
 624         CPU.MemSpeed = ONE_CYCLE;
 625         CPU.MemSpeedx2 = TWO_CYCLES;
 626 #endif
 627         CPU.PCBase = Memory.FillRAM - 0x4000;
 628         CPU.PC = CPU.PCBase + (Address & 0xffff);
 629         return;
 630
 631     case CMemory::MAP_DSP:
 632 #ifdef VAR_CYCLES
 633         CPU.MemSpeed = SLOW_ONE_CYCLE;
 634         CPU.MemSpeedx2 = SLOW_ONE_CYCLE * 2;
 635 #endif
 636         CPU.PCBase = Memory.FillRAM - 0x6000;
 637         CPU.PC = CPU.PCBase + (Address & 0xffff);
 638         return;
 639
 640     case CMemory::MAP_SA1RAM:
 641     case CMemory::MAP_LOROM_SRAM:
 642 #ifdef VAR_CYCLES
 643         CPU.MemSpeed = SLOW_ONE_CYCLE;
 644         CPU.MemSpeedx2 = SLOW_ONE_CYCLE * 2;
 645 #endif
 646         CPU.PCBase = Memory.SRAM;
 647         CPU.PC = CPU.PCBase + (Address & 0xffff);
 648         return;
 649
 650     case CMemory::MAP_BWRAM:
 651 #ifdef VAR_CYCLES
 652         CPU.MemSpeed = SLOW_ONE_CYCLE;
 653         CPU.MemSpeedx2 = SLOW_ONE_CYCLE * 2;
 654 #endif
 655         CPU.PCBase = Memory.BWRAM - 0x6000;
 656         CPU.PC = CPU.PCBase + (Address & 0xffff);
 657         return;
 658     case CMemory::MAP_HIROM_SRAM:
 659 #ifdef VAR_CYCLES
 660         CPU.MemSpeed = SLOW_ONE_CYCLE;
 661         CPU.MemSpeedx2 = SLOW_ONE_CYCLE * 2;
 662 #endif
 663         CPU.PCBase = Memory.SRAM - 0x6000;
 664         CPU.PC = CPU.PCBase + (Address & 0xffff);
 665         return;
 666 //#ifndef __GP32__
 667     case CMemory::MAP_C4:
 668 #ifdef VAR_CYCLES
 669         CPU.MemSpeed = SLOW_ONE_CYCLE;
 670         CPU.MemSpeedx2 = SLOW_ONE_CYCLE * 2;
 671 #endif
 672         CPU.PCBase = Memory.C4RAM - 0x6000;
 673         CPU.PC = CPU.PCBase + (Address & 0xffff);
 674         return;
 675 //#endif
 676     case CMemory::MAP_DEBUG:
 677 #ifdef DEBUGGER
 678         printf ("SBP %06x\n", Address);
 679 #endif
 680
 681     default:
 682     case CMemory::MAP_NONE:
 683 #ifdef VAR_CYCLES
 684         CPU.MemSpeed = SLOW_ONE_CYCLE;
 685         CPU.MemSpeedx2 = SLOW_ONE_CYCLE * 2;
 686 #endif
 687 #ifdef DEBUGGER
 688         printf ("SBP %06x\n", Address);
 689 #endif
 690         CPU.PCBase = Memory.SRAM;
 691         CPU.PC = Memory.SRAM + (Address & 0xffff);
 692         return;
 693     }
 694 }
 695 #endif