2 * QEMU IDE disk and CD/DVD-ROM Emulator
4 * Copyright (c) 2003 Fabrice Bellard
5 * Copyright (c) 2006 Openedhand Ltd.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 #include "scsi-disk.h"
31 #include "qemu-timer.h"
35 /* debug IDE devices */
37 //#define DEBUG_IDE_ATAPI
41 /* Bits of HD_STATUS */
43 #define INDEX_STAT 0x02
44 #define ECC_STAT 0x04 /* Corrected error */
46 #define SEEK_STAT 0x10
48 #define WRERR_STAT 0x20
49 #define READY_STAT 0x40
50 #define BUSY_STAT 0x80
52 /* Bits for HD_ERROR */
53 #define MARK_ERR 0x01 /* Bad address mark */
54 #define TRK0_ERR 0x02 /* couldn't find track 0 */
55 #define ABRT_ERR 0x04 /* Command aborted */
56 #define MCR_ERR 0x08 /* media change request */
57 #define ID_ERR 0x10 /* ID field not found */
58 #define MC_ERR 0x20 /* media changed */
59 #define ECC_ERR 0x40 /* Uncorrectable ECC error */
60 #define BBD_ERR 0x80 /* pre-EIDE meaning: block marked bad */
61 #define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */
63 /* Bits of HD_NSECTOR */
69 #define IDE_CMD_RESET 0x04
70 #define IDE_CMD_DISABLE_IRQ 0x02
72 /* ATA/ATAPI Commands pre T13 Spec */
77 #define CFA_REQ_EXT_ERROR_CODE 0x03 /* CFA Request Extended Error Code */
81 #define WIN_SRST 0x08 /* ATAPI soft reset command */
82 #define WIN_DEVICE_RESET 0x08
86 #define WIN_RECAL 0x10
87 #define WIN_RESTORE WIN_RECAL
91 #define WIN_READ 0x20 /* 28-Bit */
92 #define WIN_READ_ONCE 0x21 /* 28-Bit without retries */
93 #define WIN_READ_LONG 0x22 /* 28-Bit */
94 #define WIN_READ_LONG_ONCE 0x23 /* 28-Bit without retries */
95 #define WIN_READ_EXT 0x24 /* 48-Bit */
96 #define WIN_READDMA_EXT 0x25 /* 48-Bit */
97 #define WIN_READDMA_QUEUED_EXT 0x26 /* 48-Bit */
98 #define WIN_READ_NATIVE_MAX_EXT 0x27 /* 48-Bit */
102 #define WIN_MULTREAD_EXT 0x29 /* 48-Bit */
104 * 0x2A->0x2F Reserved
106 #define WIN_WRITE 0x30 /* 28-Bit */
107 #define WIN_WRITE_ONCE 0x31 /* 28-Bit without retries */
108 #define WIN_WRITE_LONG 0x32 /* 28-Bit */
109 #define WIN_WRITE_LONG_ONCE 0x33 /* 28-Bit without retries */
110 #define WIN_WRITE_EXT 0x34 /* 48-Bit */
111 #define WIN_WRITEDMA_EXT 0x35 /* 48-Bit */
112 #define WIN_WRITEDMA_QUEUED_EXT 0x36 /* 48-Bit */
113 #define WIN_SET_MAX_EXT 0x37 /* 48-Bit */
114 #define CFA_WRITE_SECT_WO_ERASE 0x38 /* CFA Write Sectors without erase */
115 #define WIN_MULTWRITE_EXT 0x39 /* 48-Bit */
117 * 0x3A->0x3B Reserved
119 #define WIN_WRITE_VERIFY 0x3C /* 28-Bit */
121 * 0x3D->0x3F Reserved
123 #define WIN_VERIFY 0x40 /* 28-Bit - Read Verify Sectors */
124 #define WIN_VERIFY_ONCE 0x41 /* 28-Bit - without retries */
125 #define WIN_VERIFY_EXT 0x42 /* 48-Bit */
127 * 0x43->0x4F Reserved
129 #define WIN_FORMAT 0x50
131 * 0x51->0x5F Reserved
133 #define WIN_INIT 0x60
135 * 0x61->0x5F Reserved
137 #define WIN_SEEK 0x70 /* 0x70-0x7F Reserved */
138 #define CFA_TRANSLATE_SECTOR 0x87 /* CFA Translate Sector */
139 #define WIN_DIAGNOSE 0x90
140 #define WIN_SPECIFY 0x91 /* set drive geometry translation */
141 #define WIN_DOWNLOAD_MICROCODE 0x92
142 #define WIN_STANDBYNOW2 0x94
143 #define CFA_IDLEIMMEDIATE 0x95 /* force drive to become "ready" */
144 #define WIN_STANDBY2 0x96
145 #define WIN_SETIDLE2 0x97
146 #define WIN_CHECKPOWERMODE2 0x98
147 #define WIN_SLEEPNOW2 0x99
151 #define WIN_PACKETCMD 0xA0 /* Send a packet command. */
152 #define WIN_PIDENTIFY 0xA1 /* identify ATAPI device */
153 #define WIN_QUEUED_SERVICE 0xA2
154 #define WIN_SMART 0xB0 /* self-monitoring and reporting */
155 #define CFA_ACCESS_METADATA_STORAGE 0xB8
156 #define CFA_ERASE_SECTORS 0xC0 /* microdrives implement as NOP */
157 #define WIN_MULTREAD 0xC4 /* read sectors using multiple mode*/
158 #define WIN_MULTWRITE 0xC5 /* write sectors using multiple mode */
159 #define WIN_SETMULT 0xC6 /* enable/disable multiple mode */
160 #define WIN_READDMA_QUEUED 0xC7 /* read sectors using Queued DMA transfers */
161 #define WIN_READDMA 0xC8 /* read sectors using DMA transfers */
162 #define WIN_READDMA_ONCE 0xC9 /* 28-Bit - without retries */
163 #define WIN_WRITEDMA 0xCA /* write sectors using DMA transfers */
164 #define WIN_WRITEDMA_ONCE 0xCB /* 28-Bit - without retries */
165 #define WIN_WRITEDMA_QUEUED 0xCC /* write sectors using Queued DMA transfers */
166 #define CFA_WRITE_MULTI_WO_ERASE 0xCD /* CFA Write multiple without erase */
167 #define WIN_GETMEDIASTATUS 0xDA
168 #define WIN_ACKMEDIACHANGE 0xDB /* ATA-1, ATA-2 vendor */
169 #define WIN_POSTBOOT 0xDC
170 #define WIN_PREBOOT 0xDD
171 #define WIN_DOORLOCK 0xDE /* lock door on removable drives */
172 #define WIN_DOORUNLOCK 0xDF /* unlock door on removable drives */
173 #define WIN_STANDBYNOW1 0xE0
174 #define WIN_IDLEIMMEDIATE 0xE1 /* force drive to become "ready" */
175 #define WIN_STANDBY 0xE2 /* Set device in Standby Mode */
176 #define WIN_SETIDLE1 0xE3
177 #define WIN_READ_BUFFER 0xE4 /* force read only 1 sector */
178 #define WIN_CHECKPOWERMODE1 0xE5
179 #define WIN_SLEEPNOW1 0xE6
180 #define WIN_FLUSH_CACHE 0xE7
181 #define WIN_WRITE_BUFFER 0xE8 /* force write only 1 sector */
182 #define WIN_WRITE_SAME 0xE9 /* read ata-2 to use */
183 /* SET_FEATURES 0x22 or 0xDD */
184 #define WIN_FLUSH_CACHE_EXT 0xEA /* 48-Bit */
185 #define WIN_IDENTIFY 0xEC /* ask drive to identify itself */
186 #define WIN_MEDIAEJECT 0xED
187 #define WIN_IDENTIFY_DMA 0xEE /* same as WIN_IDENTIFY, but DMA */
188 #define WIN_SETFEATURES 0xEF /* set special drive features */
189 #define EXABYTE_ENABLE_NEST 0xF0
190 #define IBM_SENSE_CONDITION 0xF0 /* measure disk temperature */
191 #define WIN_SECURITY_SET_PASS 0xF1
192 #define WIN_SECURITY_UNLOCK 0xF2
193 #define WIN_SECURITY_ERASE_PREPARE 0xF3
194 #define WIN_SECURITY_ERASE_UNIT 0xF4
195 #define WIN_SECURITY_FREEZE_LOCK 0xF5
196 #define CFA_WEAR_LEVEL 0xF5 /* microdrives implement as NOP */
197 #define WIN_SECURITY_DISABLE 0xF6
198 #define WIN_READ_NATIVE_MAX 0xF8 /* return the native maximum address */
199 #define WIN_SET_MAX 0xF9
200 #define DISABLE_SEAGATE 0xFB
202 /* set to 1 set disable mult support */
203 #define MAX_MULT_SECTORS 16
207 #define ATAPI_PACKET_SIZE 12
209 /* The generic packet command opcodes for CD/DVD Logical Units,
210 * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
211 #define GPCMD_BLANK 0xa1
212 #define GPCMD_CLOSE_TRACK 0x5b
213 #define GPCMD_FLUSH_CACHE 0x35
214 #define GPCMD_FORMAT_UNIT 0x04
215 #define GPCMD_GET_CONFIGURATION 0x46
216 #define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
217 #define GPCMD_GET_PERFORMANCE 0xac
218 #define GPCMD_INQUIRY 0x12
219 #define GPCMD_LOAD_UNLOAD 0xa6
220 #define GPCMD_MECHANISM_STATUS 0xbd
221 #define GPCMD_MODE_SELECT_10 0x55
222 #define GPCMD_MODE_SENSE_10 0x5a
223 #define GPCMD_PAUSE_RESUME 0x4b
224 #define GPCMD_PLAY_AUDIO_10 0x45
225 #define GPCMD_PLAY_AUDIO_MSF 0x47
226 #define GPCMD_PLAY_AUDIO_TI 0x48
227 #define GPCMD_PLAY_CD 0xbc
228 #define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1e
229 #define GPCMD_READ_10 0x28
230 #define GPCMD_READ_12 0xa8
231 #define GPCMD_READ_CDVD_CAPACITY 0x25
232 #define GPCMD_READ_CD 0xbe
233 #define GPCMD_READ_CD_MSF 0xb9
234 #define GPCMD_READ_DISC_INFO 0x51
235 #define GPCMD_READ_DVD_STRUCTURE 0xad
236 #define GPCMD_READ_FORMAT_CAPACITIES 0x23
237 #define GPCMD_READ_HEADER 0x44
238 #define GPCMD_READ_TRACK_RZONE_INFO 0x52
239 #define GPCMD_READ_SUBCHANNEL 0x42
240 #define GPCMD_READ_TOC_PMA_ATIP 0x43
241 #define GPCMD_REPAIR_RZONE_TRACK 0x58
242 #define GPCMD_REPORT_KEY 0xa4
243 #define GPCMD_REQUEST_SENSE 0x03
244 #define GPCMD_RESERVE_RZONE_TRACK 0x53
245 #define GPCMD_SCAN 0xba
246 #define GPCMD_SEEK 0x2b
247 #define GPCMD_SEND_DVD_STRUCTURE 0xad
248 #define GPCMD_SEND_EVENT 0xa2
249 #define GPCMD_SEND_KEY 0xa3
250 #define GPCMD_SEND_OPC 0x54
251 #define GPCMD_SET_READ_AHEAD 0xa7
252 #define GPCMD_SET_STREAMING 0xb6
253 #define GPCMD_START_STOP_UNIT 0x1b
254 #define GPCMD_STOP_PLAY_SCAN 0x4e
255 #define GPCMD_TEST_UNIT_READY 0x00
256 #define GPCMD_VERIFY_10 0x2f
257 #define GPCMD_WRITE_10 0x2a
258 #define GPCMD_WRITE_AND_VERIFY_10 0x2e
259 /* This is listed as optional in ATAPI 2.6, but is (curiously)
260 * missing from Mt. Fuji, Table 57. It _is_ mentioned in Mt. Fuji
261 * Table 377 as an MMC command for SCSi devices though... Most ATAPI
262 * drives support it. */
263 #define GPCMD_SET_SPEED 0xbb
264 /* This seems to be a SCSI specific CD-ROM opcode
265 * to play data at track/index */
266 #define GPCMD_PLAYAUDIO_TI 0x48
268 * From MS Media Status Notification Support Specification. For
271 #define GPCMD_GET_MEDIA_STATUS 0xda
272 #define GPCMD_MODE_SENSE_6 0x1a
274 /* Mode page codes for mode sense/set */
275 #define GPMODE_R_W_ERROR_PAGE 0x01
276 #define GPMODE_WRITE_PARMS_PAGE 0x05
277 #define GPMODE_AUDIO_CTL_PAGE 0x0e
278 #define GPMODE_POWER_PAGE 0x1a
279 #define GPMODE_FAULT_FAIL_PAGE 0x1c
280 #define GPMODE_TO_PROTECT_PAGE 0x1d
281 #define GPMODE_CAPABILITIES_PAGE 0x2a
282 #define GPMODE_ALL_PAGES 0x3f
283 /* Not in Mt. Fuji, but in ATAPI 2.6 -- depricated now in favor
284 * of MODE_SENSE_POWER_PAGE */
285 #define GPMODE_CDROM_PAGE 0x0d
288 * Based on values from <linux/cdrom.h> but extending CD_MINS
289 * to the maximum common size allowed by the Orange's Book ATIP
291 * 90 and 99 min CDs are also available but using them as the
292 * upper limit reduces the effectiveness of the heuristic to
293 * detect DVDs burned to less than 25% of their maximum capacity
296 /* Some generally useful CD-ROM information */
297 #define CD_MINS 80 /* max. minutes per CD */
298 #define CD_SECS 60 /* seconds per minute */
299 #define CD_FRAMES 75 /* frames per second */
300 #define CD_FRAMESIZE 2048 /* bytes per frame, "cooked" mode */
301 #define CD_MAX_BYTES (CD_MINS * CD_SECS * CD_FRAMES * CD_FRAMESIZE)
302 #define CD_MAX_SECTORS (CD_MAX_BYTES / 512)
305 * The MMC values are not IDE specific and might need to be moved
306 * to a common header if they are also needed for the SCSI emulation
309 /* Profile list from MMC-6 revision 1 table 91 */
310 #define MMC_PROFILE_NONE 0x0000
311 #define MMC_PROFILE_CD_ROM 0x0008
312 #define MMC_PROFILE_CD_R 0x0009
313 #define MMC_PROFILE_CD_RW 0x000A
314 #define MMC_PROFILE_DVD_ROM 0x0010
315 #define MMC_PROFILE_DVD_R_SR 0x0011
316 #define MMC_PROFILE_DVD_RAM 0x0012
317 #define MMC_PROFILE_DVD_RW_RO 0x0013
318 #define MMC_PROFILE_DVD_RW_SR 0x0014
319 #define MMC_PROFILE_DVD_R_DL_SR 0x0015
320 #define MMC_PROFILE_DVD_R_DL_JR 0x0016
321 #define MMC_PROFILE_DVD_RW_DL 0x0017
322 #define MMC_PROFILE_DVD_DDR 0x0018
323 #define MMC_PROFILE_DVD_PLUS_RW 0x001A
324 #define MMC_PROFILE_DVD_PLUS_R 0x001B
325 #define MMC_PROFILE_DVD_PLUS_RW_DL 0x002A
326 #define MMC_PROFILE_DVD_PLUS_R_DL 0x002B
327 #define MMC_PROFILE_BD_ROM 0x0040
328 #define MMC_PROFILE_BD_R_SRM 0x0041
329 #define MMC_PROFILE_BD_R_RRM 0x0042
330 #define MMC_PROFILE_BD_RE 0x0043
331 #define MMC_PROFILE_HDDVD_ROM 0x0050
332 #define MMC_PROFILE_HDDVD_R 0x0051
333 #define MMC_PROFILE_HDDVD_RAM 0x0052
334 #define MMC_PROFILE_HDDVD_RW 0x0053
335 #define MMC_PROFILE_HDDVD_R_DL 0x0058
336 #define MMC_PROFILE_HDDVD_RW_DL 0x005A
337 #define MMC_PROFILE_INVALID 0xFFFF
339 #define ATAPI_INT_REASON_CD 0x01 /* 0 = data transfer */
340 #define ATAPI_INT_REASON_IO 0x02 /* 1 = transfer to the host */
341 #define ATAPI_INT_REASON_REL 0x04
342 #define ATAPI_INT_REASON_TAG 0xf8
344 /* same constants as bochs */
345 #define ASC_ILLEGAL_OPCODE 0x20
346 #define ASC_LOGICAL_BLOCK_OOR 0x21
347 #define ASC_INV_FIELD_IN_CMD_PACKET 0x24
348 #define ASC_MEDIUM_NOT_PRESENT 0x3a
349 #define ASC_SAVING_PARAMETERS_NOT_SUPPORTED 0x39
351 #define CFA_NO_ERROR 0x00
352 #define CFA_MISC_ERROR 0x09
353 #define CFA_INVALID_COMMAND 0x20
354 #define CFA_INVALID_ADDRESS 0x21
355 #define CFA_ADDRESS_OVERFLOW 0x2f
358 #define SENSE_NOT_READY 2
359 #define SENSE_ILLEGAL_REQUEST 5
360 #define SENSE_UNIT_ATTENTION 6
364 typedef void EndTransferFunc(struct IDEState *);
366 /* NOTE: IDEState represents in fact one drive */
367 typedef struct IDEState {
371 int cylinders, heads, sectors;
375 uint16_t identify_data[256];
378 struct BMDMAState *bmdma;
387 /* other part of tf for lba48 support */
397 /* 0x3f6 command, only meaningful for drive 0 */
399 /* set for lba48 access */
401 /* depends on bit 4 in select, only meaningful for drive 0 */
402 struct IDEState *cur_drive;
403 BlockDriverState *bs;
407 int packet_transfer_size;
408 int elementary_transfer_size;
412 int atapi_dma; /* true if dma is requested for the packet cmd */
415 /* PIO transfer handling */
416 int req_nb_sectors; /* number of sectors per interrupt */
417 EndTransferFunc *end_transfer_func;
421 QEMUTimer *sector_write_timer; /* only used for win2k install hack */
422 uint32_t irq_count; /* counts IRQs when using win2k install hack */
423 /* CF-ATA extended error */
425 /* CF-ATA metadata storage */
427 uint8_t *mdata_storage;
431 #define BM_STATUS_DMAING 0x01
432 #define BM_STATUS_ERROR 0x02
433 #define BM_STATUS_INT 0x04
435 #define BM_CMD_START 0x01
436 #define BM_CMD_READ 0x08
438 #define IDE_TYPE_PIIX3 0
439 #define IDE_TYPE_CMD646 1
440 #define IDE_TYPE_PIIX4 2
442 /* CMD646 specific */
444 #define MRDMODE_INTR_CH0 0x04
445 #define MRDMODE_INTR_CH1 0x08
446 #define MRDMODE_BLK_CH0 0x10
447 #define MRDMODE_BLK_CH1 0x20
448 #define UDIDETCR0 0x73
449 #define UDIDETCR1 0x7B
451 typedef struct BMDMAState {
456 struct PCIIDEState *pci_dev;
457 /* current transfer state */
459 uint32_t cur_prd_last;
460 uint32_t cur_prd_addr;
461 uint32_t cur_prd_len;
463 BlockDriverCompletionFunc *dma_cb;
464 BlockDriverAIOCB *aiocb;
467 typedef struct PCIIDEState {
471 int type; /* see IDE_TYPE_xxx */
474 static void ide_dma_start(IDEState *s, BlockDriverCompletionFunc *dma_cb);
475 static void ide_atapi_cmd_read_dma_cb(void *opaque, int ret);
477 static void padstr(char *str, const char *src, int len)
480 for(i = 0; i < len; i++) {
489 static void padstr8(uint8_t *buf, int buf_size, const char *src)
492 for(i = 0; i < buf_size; i++) {
500 static void put_le16(uint16_t *p, unsigned int v)
505 static void ide_identify(IDEState *s)
508 unsigned int oldsize;
511 if (s->identify_set) {
512 memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
516 memset(s->io_buffer, 0, 512);
517 p = (uint16_t *)s->io_buffer;
518 put_le16(p + 0, 0x0040);
519 put_le16(p + 1, s->cylinders);
520 put_le16(p + 3, s->heads);
521 put_le16(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */
522 put_le16(p + 5, 512); /* XXX: retired, remove ? */
523 put_le16(p + 6, s->sectors);
524 snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
525 padstr((char *)(p + 10), buf, 20); /* serial number */
526 put_le16(p + 20, 3); /* XXX: retired, remove ? */
527 put_le16(p + 21, 512); /* cache size in sectors */
528 put_le16(p + 22, 4); /* ecc bytes */
529 padstr((char *)(p + 23), QEMU_VERSION, 8); /* firmware version */
530 padstr((char *)(p + 27), "QEMU HARDDISK", 40); /* model */
531 #if MAX_MULT_SECTORS > 1
532 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
534 put_le16(p + 48, 1); /* dword I/O */
535 put_le16(p + 49, (1 << 11) | (1 << 9) | (1 << 8)); /* DMA and LBA supported */
536 put_le16(p + 51, 0x200); /* PIO transfer cycle */
537 put_le16(p + 52, 0x200); /* DMA transfer cycle */
538 put_le16(p + 53, 1 | (1 << 1) | (1 << 2)); /* words 54-58,64-70,88 are valid */
539 put_le16(p + 54, s->cylinders);
540 put_le16(p + 55, s->heads);
541 put_le16(p + 56, s->sectors);
542 oldsize = s->cylinders * s->heads * s->sectors;
543 put_le16(p + 57, oldsize);
544 put_le16(p + 58, oldsize >> 16);
546 put_le16(p + 59, 0x100 | s->mult_sectors);
547 put_le16(p + 60, s->nb_sectors);
548 put_le16(p + 61, s->nb_sectors >> 16);
549 put_le16(p + 63, 0x07); /* mdma0-2 supported */
550 put_le16(p + 65, 120);
551 put_le16(p + 66, 120);
552 put_le16(p + 67, 120);
553 put_le16(p + 68, 120);
554 put_le16(p + 80, 0xf0); /* ata3 -> ata6 supported */
555 put_le16(p + 81, 0x16); /* conforms to ata5 */
556 put_le16(p + 82, (1 << 14));
557 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
558 put_le16(p + 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
559 put_le16(p + 84, (1 << 14));
560 put_le16(p + 85, (1 << 14));
561 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
562 put_le16(p + 86, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
563 put_le16(p + 87, (1 << 14));
564 put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */
565 put_le16(p + 93, 1 | (1 << 14) | 0x2000);
566 put_le16(p + 100, s->nb_sectors);
567 put_le16(p + 101, s->nb_sectors >> 16);
568 put_le16(p + 102, s->nb_sectors >> 32);
569 put_le16(p + 103, s->nb_sectors >> 48);
571 memcpy(s->identify_data, p, sizeof(s->identify_data));
575 static void ide_atapi_identify(IDEState *s)
580 if (s->identify_set) {
581 memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
585 memset(s->io_buffer, 0, 512);
586 p = (uint16_t *)s->io_buffer;
587 /* Removable CDROM, 50us response, 12 byte packets */
588 put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
589 snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
590 padstr((char *)(p + 10), buf, 20); /* serial number */
591 put_le16(p + 20, 3); /* buffer type */
592 put_le16(p + 21, 512); /* cache size in sectors */
593 put_le16(p + 22, 4); /* ecc bytes */
594 padstr((char *)(p + 23), QEMU_VERSION, 8); /* firmware version */
595 padstr((char *)(p + 27), "QEMU DVD-ROM", 40); /* model */
596 put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
598 put_le16(p + 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
599 put_le16(p + 53, 7); /* words 64-70, 54-58, 88 valid */
600 put_le16(p + 63, 7); /* mdma0-2 supported */
601 put_le16(p + 64, 0x3f); /* PIO modes supported */
603 put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
604 put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
605 put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
606 put_le16(p + 64, 1); /* PIO modes */
608 put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
609 put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
610 put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
611 put_le16(p + 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
613 put_le16(p + 71, 30); /* in ns */
614 put_le16(p + 72, 30); /* in ns */
616 put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */
618 put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */
620 memcpy(s->identify_data, p, sizeof(s->identify_data));
624 static void ide_cfata_identify(IDEState *s)
630 p = (uint16_t *) s->identify_data;
634 memset(p, 0, sizeof(s->identify_data));
636 cur_sec = s->cylinders * s->heads * s->sectors;
638 put_le16(p + 0, 0x848a); /* CF Storage Card signature */
639 put_le16(p + 1, s->cylinders); /* Default cylinders */
640 put_le16(p + 3, s->heads); /* Default heads */
641 put_le16(p + 6, s->sectors); /* Default sectors per track */
642 put_le16(p + 7, s->nb_sectors >> 16); /* Sectors per card */
643 put_le16(p + 8, s->nb_sectors); /* Sectors per card */
644 snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
645 padstr((char *)(p + 10), buf, 20); /* Serial number in ASCII */
646 put_le16(p + 22, 0x0004); /* ECC bytes */
647 padstr((char *) (p + 23), QEMU_VERSION, 8); /* Firmware Revision */
648 padstr((char *) (p + 27), "QEMU MICRODRIVE", 40);/* Model number */
649 #if MAX_MULT_SECTORS > 1
650 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
652 put_le16(p + 47, 0x0000);
654 put_le16(p + 49, 0x0f00); /* Capabilities */
655 put_le16(p + 51, 0x0002); /* PIO cycle timing mode */
656 put_le16(p + 52, 0x0001); /* DMA cycle timing mode */
657 put_le16(p + 53, 0x0003); /* Translation params valid */
658 put_le16(p + 54, s->cylinders); /* Current cylinders */
659 put_le16(p + 55, s->heads); /* Current heads */
660 put_le16(p + 56, s->sectors); /* Current sectors */
661 put_le16(p + 57, cur_sec); /* Current capacity */
662 put_le16(p + 58, cur_sec >> 16); /* Current capacity */
663 if (s->mult_sectors) /* Multiple sector setting */
664 put_le16(p + 59, 0x100 | s->mult_sectors);
665 put_le16(p + 60, s->nb_sectors); /* Total LBA sectors */
666 put_le16(p + 61, s->nb_sectors >> 16); /* Total LBA sectors */
667 put_le16(p + 63, 0x0203); /* Multiword DMA capability */
668 put_le16(p + 64, 0x0001); /* Flow Control PIO support */
669 put_le16(p + 65, 0x0096); /* Min. Multiword DMA cycle */
670 put_le16(p + 66, 0x0096); /* Rec. Multiword DMA cycle */
671 put_le16(p + 68, 0x00b4); /* Min. PIO cycle time */
672 put_le16(p + 82, 0x400c); /* Command Set supported */
673 put_le16(p + 83, 0x7068); /* Command Set supported */
674 put_le16(p + 84, 0x4000); /* Features supported */
675 put_le16(p + 85, 0x000c); /* Command Set enabled */
676 put_le16(p + 86, 0x7044); /* Command Set enabled */
677 put_le16(p + 87, 0x4000); /* Features enabled */
678 put_le16(p + 91, 0x4060); /* Current APM level */
679 put_le16(p + 129, 0x0002); /* Current features option */
680 put_le16(p + 130, 0x0005); /* Reassigned sectors */
681 put_le16(p + 131, 0x0001); /* Initial power mode */
682 put_le16(p + 132, 0x0000); /* User signature */
683 put_le16(p + 160, 0x8100); /* Power requirement */
684 put_le16(p + 161, 0x8001); /* CF command set */
689 memcpy(s->io_buffer, p, sizeof(s->identify_data));
692 static void ide_set_signature(IDEState *s)
694 s->select &= 0xf0; /* clear head */
710 static inline void ide_abort_command(IDEState *s)
712 s->status = READY_STAT | ERR_STAT;
716 static inline void ide_set_irq(IDEState *s)
718 BMDMAState *bm = s->bmdma;
719 if (!(s->cmd & IDE_CMD_DISABLE_IRQ)) {
721 bm->status |= BM_STATUS_INT;
723 qemu_irq_raise(s->irq);
727 /* prepare data transfer and tell what to do after */
728 static void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
729 EndTransferFunc *end_transfer_func)
731 s->end_transfer_func = end_transfer_func;
733 s->data_end = buf + size;
734 if (!(s->status & ERR_STAT))
735 s->status |= DRQ_STAT;
738 static void ide_transfer_stop(IDEState *s)
740 s->end_transfer_func = ide_transfer_stop;
741 s->data_ptr = s->io_buffer;
742 s->data_end = s->io_buffer;
743 s->status &= ~DRQ_STAT;
746 static int64_t ide_get_sector(IDEState *s)
749 if (s->select & 0x40) {
752 sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) |
753 (s->lcyl << 8) | s->sector;
755 sector_num = ((int64_t)s->hob_hcyl << 40) |
756 ((int64_t) s->hob_lcyl << 32) |
757 ((int64_t) s->hob_sector << 24) |
758 ((int64_t) s->hcyl << 16) |
759 ((int64_t) s->lcyl << 8) | s->sector;
762 sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors +
763 (s->select & 0x0f) * s->sectors + (s->sector - 1);
768 static void ide_set_sector(IDEState *s, int64_t sector_num)
771 if (s->select & 0x40) {
773 s->select = (s->select & 0xf0) | (sector_num >> 24);
774 s->hcyl = (sector_num >> 16);
775 s->lcyl = (sector_num >> 8);
776 s->sector = (sector_num);
778 s->sector = sector_num;
779 s->lcyl = sector_num >> 8;
780 s->hcyl = sector_num >> 16;
781 s->hob_sector = sector_num >> 24;
782 s->hob_lcyl = sector_num >> 32;
783 s->hob_hcyl = sector_num >> 40;
786 cyl = sector_num / (s->heads * s->sectors);
787 r = sector_num % (s->heads * s->sectors);
790 s->select = (s->select & 0xf0) | ((r / s->sectors) & 0x0f);
791 s->sector = (r % s->sectors) + 1;
795 static void ide_sector_read(IDEState *s)
800 s->status = READY_STAT | SEEK_STAT;
801 s->error = 0; /* not needed by IDE spec, but needed by Windows */
802 sector_num = ide_get_sector(s);
805 /* no more sector to read from disk */
806 ide_transfer_stop(s);
808 #if defined(DEBUG_IDE)
809 printf("read sector=%Ld\n", sector_num);
811 if (n > s->req_nb_sectors)
812 n = s->req_nb_sectors;
813 ret = bdrv_read(s->bs, sector_num, s->io_buffer, n);
814 ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_read);
816 ide_set_sector(s, sector_num + n);
821 /* return 0 if buffer completed */
822 static int dma_buf_rw(BMDMAState *bm, int is_write)
824 IDEState *s = bm->ide_if;
832 l = s->io_buffer_size - s->io_buffer_index;
835 if (bm->cur_prd_len == 0) {
836 /* end of table (with a fail safe of one page) */
837 if (bm->cur_prd_last ||
838 (bm->cur_addr - bm->addr) >= 4096)
840 cpu_physical_memory_read(bm->cur_addr, (uint8_t *)&prd, 8);
842 prd.addr = le32_to_cpu(prd.addr);
843 prd.size = le32_to_cpu(prd.size);
844 len = prd.size & 0xfffe;
847 bm->cur_prd_len = len;
848 bm->cur_prd_addr = prd.addr;
849 bm->cur_prd_last = (prd.size & 0x80000000);
851 if (l > bm->cur_prd_len)
855 cpu_physical_memory_write(bm->cur_prd_addr,
856 s->io_buffer + s->io_buffer_index, l);
858 cpu_physical_memory_read(bm->cur_prd_addr,
859 s->io_buffer + s->io_buffer_index, l);
861 bm->cur_prd_addr += l;
862 bm->cur_prd_len -= l;
863 s->io_buffer_index += l;
869 /* XXX: handle errors */
870 static void ide_read_dma_cb(void *opaque, int ret)
872 BMDMAState *bm = opaque;
873 IDEState *s = bm->ide_if;
877 n = s->io_buffer_size >> 9;
878 sector_num = ide_get_sector(s);
881 ide_set_sector(s, sector_num);
883 if (dma_buf_rw(bm, 1) == 0)
887 /* end of transfer ? */
888 if (s->nsector == 0) {
889 s->status = READY_STAT | SEEK_STAT;
892 bm->status &= ~BM_STATUS_DMAING;
893 bm->status |= BM_STATUS_INT;
900 /* launch next transfer */
902 if (n > MAX_MULT_SECTORS)
903 n = MAX_MULT_SECTORS;
904 s->io_buffer_index = 0;
905 s->io_buffer_size = n * 512;
907 printf("aio_read: sector_num=%lld n=%d\n", sector_num, n);
909 bm->aiocb = bdrv_aio_read(s->bs, sector_num, s->io_buffer, n,
910 ide_read_dma_cb, bm);
913 static void ide_sector_read_dma(IDEState *s)
915 s->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT;
916 s->io_buffer_index = 0;
917 s->io_buffer_size = 0;
918 ide_dma_start(s, ide_read_dma_cb);
921 static void ide_sector_write_timer_cb(void *opaque)
923 IDEState *s = opaque;
927 static void ide_sector_write(IDEState *s)
932 s->status = READY_STAT | SEEK_STAT;
933 sector_num = ide_get_sector(s);
934 #if defined(DEBUG_IDE)
935 printf("write sector=%Ld\n", sector_num);
938 if (n > s->req_nb_sectors)
939 n = s->req_nb_sectors;
940 ret = bdrv_write(s->bs, sector_num, s->io_buffer, n);
942 if (s->nsector == 0) {
943 /* no more sectors to write */
944 ide_transfer_stop(s);
947 if (n1 > s->req_nb_sectors)
948 n1 = s->req_nb_sectors;
949 ide_transfer_start(s, s->io_buffer, 512 * n1, ide_sector_write);
951 ide_set_sector(s, sector_num + n);
954 if (win2k_install_hack && ((++s->irq_count % 16) == 0)) {
955 /* It seems there is a bug in the Windows 2000 installer HDD
956 IDE driver which fills the disk with empty logs when the
957 IDE write IRQ comes too early. This hack tries to correct
958 that at the expense of slower write performances. Use this
959 option _only_ to install Windows 2000. You must disable it
961 qemu_mod_timer(s->sector_write_timer,
962 qemu_get_clock(vm_clock) + (ticks_per_sec / 1000));
970 /* XXX: handle errors */
971 static void ide_write_dma_cb(void *opaque, int ret)
973 BMDMAState *bm = opaque;
974 IDEState *s = bm->ide_if;
978 n = s->io_buffer_size >> 9;
979 sector_num = ide_get_sector(s);
982 ide_set_sector(s, sector_num);
986 /* end of transfer ? */
987 if (s->nsector == 0) {
988 s->status = READY_STAT | SEEK_STAT;
991 bm->status &= ~BM_STATUS_DMAING;
992 bm->status |= BM_STATUS_INT;
999 /* launch next transfer */
1001 if (n > MAX_MULT_SECTORS)
1002 n = MAX_MULT_SECTORS;
1003 s->io_buffer_index = 0;
1004 s->io_buffer_size = n * 512;
1006 if (dma_buf_rw(bm, 0) == 0)
1009 printf("aio_write: sector_num=%lld n=%d\n", sector_num, n);
1011 bm->aiocb = bdrv_aio_write(s->bs, sector_num, s->io_buffer, n,
1012 ide_write_dma_cb, bm);
1015 static void ide_sector_write_dma(IDEState *s)
1017 s->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT;
1018 s->io_buffer_index = 0;
1019 s->io_buffer_size = 0;
1020 ide_dma_start(s, ide_write_dma_cb);
1023 static void ide_atapi_cmd_ok(IDEState *s)
1026 s->status = READY_STAT;
1027 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
1031 static void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc)
1033 #ifdef DEBUG_IDE_ATAPI
1034 printf("atapi_cmd_error: sense=0x%x asc=0x%x\n", sense_key, asc);
1036 s->error = sense_key << 4;
1037 s->status = READY_STAT | ERR_STAT;
1038 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
1039 s->sense_key = sense_key;
1044 static inline void cpu_to_ube16(uint8_t *buf, int val)
1050 static inline void cpu_to_ube32(uint8_t *buf, unsigned int val)
1058 static inline int ube16_to_cpu(const uint8_t *buf)
1060 return (buf[0] << 8) | buf[1];
1063 static inline int ube32_to_cpu(const uint8_t *buf)
1065 return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
1068 static void lba_to_msf(uint8_t *buf, int lba)
1071 buf[0] = (lba / 75) / 60;
1072 buf[1] = (lba / 75) % 60;
1076 static void cd_data_to_raw(uint8_t *buf, int lba)
1080 memset(buf + 1, 0xff, 10);
1084 lba_to_msf(buf, lba);
1085 buf[3] = 0x01; /* mode 1 data */
1089 /* XXX: ECC not computed */
1090 memset(buf, 0, 288);
1093 static int cd_read_sector(BlockDriverState *bs, int lba, uint8_t *buf,
1098 switch(sector_size) {
1100 ret = bdrv_read(bs, (int64_t)lba << 2, buf, 4);
1103 ret = bdrv_read(bs, (int64_t)lba << 2, buf + 16, 4);
1106 cd_data_to_raw(buf, lba);
1115 static void ide_atapi_io_error(IDEState *s, int ret)
1117 /* XXX: handle more errors */
1118 if (ret == -ENOMEDIUM) {
1119 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1120 ASC_MEDIUM_NOT_PRESENT);
1122 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1123 ASC_LOGICAL_BLOCK_OOR);
1127 /* The whole ATAPI transfer logic is handled in this function */
1128 static void ide_atapi_cmd_reply_end(IDEState *s)
1130 int byte_count_limit, size, ret;
1131 #ifdef DEBUG_IDE_ATAPI
1132 printf("reply: tx_size=%d elem_tx_size=%d index=%d\n",
1133 s->packet_transfer_size,
1134 s->elementary_transfer_size,
1135 s->io_buffer_index);
1137 if (s->packet_transfer_size <= 0) {
1138 /* end of transfer */
1139 ide_transfer_stop(s);
1140 s->status = READY_STAT;
1141 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
1143 #ifdef DEBUG_IDE_ATAPI
1144 printf("status=0x%x\n", s->status);
1147 /* see if a new sector must be read */
1148 if (s->lba != -1 && s->io_buffer_index >= s->cd_sector_size) {
1149 ret = cd_read_sector(s->bs, s->lba, s->io_buffer, s->cd_sector_size);
1151 ide_transfer_stop(s);
1152 ide_atapi_io_error(s, ret);
1156 s->io_buffer_index = 0;
1158 if (s->elementary_transfer_size > 0) {
1159 /* there are some data left to transmit in this elementary
1161 size = s->cd_sector_size - s->io_buffer_index;
1162 if (size > s->elementary_transfer_size)
1163 size = s->elementary_transfer_size;
1164 ide_transfer_start(s, s->io_buffer + s->io_buffer_index,
1165 size, ide_atapi_cmd_reply_end);
1166 s->packet_transfer_size -= size;
1167 s->elementary_transfer_size -= size;
1168 s->io_buffer_index += size;
1170 /* a new transfer is needed */
1171 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO;
1172 byte_count_limit = s->lcyl | (s->hcyl << 8);
1173 #ifdef DEBUG_IDE_ATAPI
1174 printf("byte_count_limit=%d\n", byte_count_limit);
1176 if (byte_count_limit == 0xffff)
1178 size = s->packet_transfer_size;
1179 if (size > byte_count_limit) {
1180 /* byte count limit must be even if this case */
1181 if (byte_count_limit & 1)
1183 size = byte_count_limit;
1186 s->hcyl = size >> 8;
1187 s->elementary_transfer_size = size;
1188 /* we cannot transmit more than one sector at a time */
1190 if (size > (s->cd_sector_size - s->io_buffer_index))
1191 size = (s->cd_sector_size - s->io_buffer_index);
1193 ide_transfer_start(s, s->io_buffer + s->io_buffer_index,
1194 size, ide_atapi_cmd_reply_end);
1195 s->packet_transfer_size -= size;
1196 s->elementary_transfer_size -= size;
1197 s->io_buffer_index += size;
1199 #ifdef DEBUG_IDE_ATAPI
1200 printf("status=0x%x\n", s->status);
1206 /* send a reply of 'size' bytes in s->io_buffer to an ATAPI command */
1207 static void ide_atapi_cmd_reply(IDEState *s, int size, int max_size)
1209 if (size > max_size)
1211 s->lba = -1; /* no sector read */
1212 s->packet_transfer_size = size;
1213 s->io_buffer_size = size; /* dma: send the reply data as one chunk */
1214 s->elementary_transfer_size = 0;
1215 s->io_buffer_index = 0;
1218 s->status = READY_STAT | DRQ_STAT;
1219 ide_dma_start(s, ide_atapi_cmd_read_dma_cb);
1221 s->status = READY_STAT;
1222 ide_atapi_cmd_reply_end(s);
1226 /* start a CD-CDROM read command */
1227 static void ide_atapi_cmd_read_pio(IDEState *s, int lba, int nb_sectors,
1231 s->packet_transfer_size = nb_sectors * sector_size;
1232 s->elementary_transfer_size = 0;
1233 s->io_buffer_index = sector_size;
1234 s->cd_sector_size = sector_size;
1236 s->status = READY_STAT;
1237 ide_atapi_cmd_reply_end(s);
1240 /* ATAPI DMA support */
1242 /* XXX: handle read errors */
1243 static void ide_atapi_cmd_read_dma_cb(void *opaque, int ret)
1245 BMDMAState *bm = opaque;
1246 IDEState *s = bm->ide_if;
1250 ide_atapi_io_error(s, ret);
1254 if (s->io_buffer_size > 0) {
1256 * For a cdrom read sector command (s->lba != -1),
1257 * adjust the lba for the next s->io_buffer_size chunk
1258 * and dma the current chunk.
1259 * For a command != read (s->lba == -1), just transfer
1263 if (s->cd_sector_size == 2352) {
1265 cd_data_to_raw(s->io_buffer, s->lba);
1267 n = s->io_buffer_size >> 11;
1271 s->packet_transfer_size -= s->io_buffer_size;
1272 if (dma_buf_rw(bm, 1) == 0)
1276 if (s->packet_transfer_size <= 0) {
1277 s->status = READY_STAT;
1278 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
1281 bm->status &= ~BM_STATUS_DMAING;
1282 bm->status |= BM_STATUS_INT;
1289 s->io_buffer_index = 0;
1290 if (s->cd_sector_size == 2352) {
1292 s->io_buffer_size = s->cd_sector_size;
1295 n = s->packet_transfer_size >> 11;
1296 if (n > (MAX_MULT_SECTORS / 4))
1297 n = (MAX_MULT_SECTORS / 4);
1298 s->io_buffer_size = n * 2048;
1302 printf("aio_read_cd: lba=%u n=%d\n", s->lba, n);
1304 bm->aiocb = bdrv_aio_read(s->bs, (int64_t)s->lba << 2,
1305 s->io_buffer + data_offset, n * 4,
1306 ide_atapi_cmd_read_dma_cb, bm);
1308 /* Note: media not present is the most likely case */
1309 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1310 ASC_MEDIUM_NOT_PRESENT);
1315 /* start a CD-CDROM read command with DMA */
1316 /* XXX: test if DMA is available */
1317 static void ide_atapi_cmd_read_dma(IDEState *s, int lba, int nb_sectors,
1321 s->packet_transfer_size = nb_sectors * sector_size;
1322 s->io_buffer_index = 0;
1323 s->io_buffer_size = 0;
1324 s->cd_sector_size = sector_size;
1326 /* XXX: check if BUSY_STAT should be set */
1327 s->status = READY_STAT | DRQ_STAT | BUSY_STAT;
1328 ide_dma_start(s, ide_atapi_cmd_read_dma_cb);
1331 static void ide_atapi_cmd_read(IDEState *s, int lba, int nb_sectors,
1334 #ifdef DEBUG_IDE_ATAPI
1335 printf("read %s: LBA=%d nb_sectors=%d\n", s->atapi_dma ? "dma" : "pio",
1339 ide_atapi_cmd_read_dma(s, lba, nb_sectors, sector_size);
1341 ide_atapi_cmd_read_pio(s, lba, nb_sectors, sector_size);
1345 static inline uint8_t ide_atapi_set_profile(uint8_t *buf, uint8_t *index,
1348 uint8_t *buf_profile = buf + 12; /* start of profiles */
1350 buf_profile += ((*index) * 4); /* start of indexed profile */
1351 cpu_to_ube16 (buf_profile, profile);
1352 buf_profile[2] = ((buf_profile[0] == buf[6]) && (buf_profile[1] == buf[7]));
1354 /* each profile adds 4 bytes to the response */
1356 buf[11] += 4; /* Additional Length */
1361 static void ide_atapi_cmd(IDEState *s)
1363 const uint8_t *packet;
1367 packet = s->io_buffer;
1369 #ifdef DEBUG_IDE_ATAPI
1372 printf("ATAPI limit=0x%x packet:", s->lcyl | (s->hcyl << 8));
1373 for(i = 0; i < ATAPI_PACKET_SIZE; i++) {
1374 printf(" %02x", packet[i]);
1379 switch(s->io_buffer[0]) {
1380 case GPCMD_TEST_UNIT_READY:
1381 if (bdrv_is_inserted(s->bs)) {
1382 ide_atapi_cmd_ok(s);
1384 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1385 ASC_MEDIUM_NOT_PRESENT);
1388 case GPCMD_MODE_SENSE_6:
1389 case GPCMD_MODE_SENSE_10:
1392 if (packet[0] == GPCMD_MODE_SENSE_10)
1393 max_len = ube16_to_cpu(packet + 7);
1395 max_len = packet[4];
1396 action = packet[2] >> 6;
1397 code = packet[2] & 0x3f;
1399 case 0: /* current values */
1401 case 0x01: /* error recovery */
1402 cpu_to_ube16(&buf[0], 16 + 6);
1418 ide_atapi_cmd_reply(s, 16, max_len);
1421 cpu_to_ube16(&buf[0], 28 + 6);
1436 buf[14] = (1 << 0) | (1 << 3) | (1 << 5);
1437 if (bdrv_is_locked(s->bs))
1440 cpu_to_ube16(&buf[16], 706);
1443 cpu_to_ube16(&buf[20], 512);
1444 cpu_to_ube16(&buf[22], 706);
1449 ide_atapi_cmd_reply(s, 28, max_len);
1455 case 1: /* changeable values */
1457 case 2: /* default values */
1460 case 3: /* saved values */
1461 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1462 ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
1467 case GPCMD_REQUEST_SENSE:
1468 max_len = packet[4];
1470 buf[0] = 0x70 | (1 << 7);
1471 buf[2] = s->sense_key;
1474 ide_atapi_cmd_reply(s, 18, max_len);
1476 case GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
1477 if (bdrv_is_inserted(s->bs)) {
1478 bdrv_set_locked(s->bs, packet[4] & 1);
1479 ide_atapi_cmd_ok(s);
1481 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1482 ASC_MEDIUM_NOT_PRESENT);
1488 int nb_sectors, lba;
1490 if (packet[0] == GPCMD_READ_10)
1491 nb_sectors = ube16_to_cpu(packet + 7);
1493 nb_sectors = ube32_to_cpu(packet + 6);
1494 lba = ube32_to_cpu(packet + 2);
1495 if (nb_sectors == 0) {
1496 ide_atapi_cmd_ok(s);
1499 ide_atapi_cmd_read(s, lba, nb_sectors, 2048);
1504 int nb_sectors, lba, transfer_request;
1506 nb_sectors = (packet[6] << 16) | (packet[7] << 8) | packet[8];
1507 lba = ube32_to_cpu(packet + 2);
1508 if (nb_sectors == 0) {
1509 ide_atapi_cmd_ok(s);
1512 transfer_request = packet[9];
1513 switch(transfer_request & 0xf8) {
1516 ide_atapi_cmd_ok(s);
1520 ide_atapi_cmd_read(s, lba, nb_sectors, 2048);
1524 ide_atapi_cmd_read(s, lba, nb_sectors, 2352);
1527 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1528 ASC_INV_FIELD_IN_CMD_PACKET);
1536 uint64_t total_sectors;
1538 bdrv_get_geometry(s->bs, &total_sectors);
1539 total_sectors >>= 2;
1540 if (total_sectors == 0) {
1541 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1542 ASC_MEDIUM_NOT_PRESENT);
1545 lba = ube32_to_cpu(packet + 2);
1546 if (lba >= total_sectors) {
1547 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1548 ASC_LOGICAL_BLOCK_OOR);
1551 ide_atapi_cmd_ok(s);
1554 case GPCMD_START_STOP_UNIT:
1557 start = packet[4] & 1;
1558 eject = (packet[4] >> 1) & 1;
1560 if (eject && !start) {
1561 /* eject the disk */
1562 bdrv_eject(s->bs, 1);
1563 } else if (eject && start) {
1564 /* close the tray */
1565 bdrv_eject(s->bs, 0);
1567 ide_atapi_cmd_ok(s);
1570 case GPCMD_MECHANISM_STATUS:
1572 max_len = ube16_to_cpu(packet + 8);
1573 cpu_to_ube16(buf, 0);
1574 /* no current LBA */
1579 cpu_to_ube16(buf + 6, 0);
1580 ide_atapi_cmd_reply(s, 8, max_len);
1583 case GPCMD_READ_TOC_PMA_ATIP:
1585 int format, msf, start_track, len;
1586 uint64_t total_sectors;
1588 bdrv_get_geometry(s->bs, &total_sectors);
1589 total_sectors >>= 2;
1590 if (total_sectors == 0) {
1591 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1592 ASC_MEDIUM_NOT_PRESENT);
1595 max_len = ube16_to_cpu(packet + 7);
1596 format = packet[9] >> 6;
1597 msf = (packet[1] >> 1) & 1;
1598 start_track = packet[6];
1601 len = cdrom_read_toc(total_sectors, buf, msf, start_track);
1604 ide_atapi_cmd_reply(s, len, max_len);
1607 /* multi session : only a single session defined */
1612 ide_atapi_cmd_reply(s, 12, max_len);
1615 len = cdrom_read_toc_raw(total_sectors, buf, msf, start_track);
1618 ide_atapi_cmd_reply(s, len, max_len);
1622 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1623 ASC_INV_FIELD_IN_CMD_PACKET);
1628 case GPCMD_READ_CDVD_CAPACITY:
1630 uint64_t total_sectors;
1632 bdrv_get_geometry(s->bs, &total_sectors);
1633 total_sectors >>= 2;
1634 if (total_sectors == 0) {
1635 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1636 ASC_MEDIUM_NOT_PRESENT);
1639 /* NOTE: it is really the number of sectors minus 1 */
1640 cpu_to_ube32(buf, total_sectors - 1);
1641 cpu_to_ube32(buf + 4, 2048);
1642 ide_atapi_cmd_reply(s, 8, 8);
1645 case GPCMD_READ_DVD_STRUCTURE:
1647 int media = packet[1];
1648 int layer = packet[6];
1649 int format = packet[2];
1650 uint64_t total_sectors;
1652 if (media != 0 || layer != 0)
1654 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1655 ASC_INV_FIELD_IN_CMD_PACKET);
1660 bdrv_get_geometry(s->bs, &total_sectors);
1661 total_sectors >>= 2;
1662 if (total_sectors == 0) {
1663 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1664 ASC_MEDIUM_NOT_PRESENT);
1668 memset(buf, 0, 2052);
1670 buf[4] = 1; // DVD-ROM, part version 1
1671 buf[5] = 0xf; // 120mm disc, maximum rate unspecified
1672 buf[6] = 0; // one layer, embossed data
1675 cpu_to_ube32(buf + 8, 0);
1676 cpu_to_ube32(buf + 12, total_sectors - 1);
1677 cpu_to_ube32(buf + 16, total_sectors - 1);
1679 cpu_to_be16wu((uint16_t *)buf, 2048 + 4);
1681 ide_atapi_cmd_reply(s, 2048 + 3, 2048 + 4);
1685 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1686 ASC_INV_FIELD_IN_CMD_PACKET);
1691 case GPCMD_SET_SPEED:
1692 ide_atapi_cmd_ok(s);
1695 max_len = packet[4];
1696 buf[0] = 0x05; /* CD-ROM */
1697 buf[1] = 0x80; /* removable */
1698 buf[2] = 0x00; /* ISO */
1699 buf[3] = 0x21; /* ATAPI-2 (XXX: put ATAPI-4 ?) */
1700 buf[4] = 31; /* additional length */
1701 buf[5] = 0; /* reserved */
1702 buf[6] = 0; /* reserved */
1703 buf[7] = 0; /* reserved */
1704 padstr8(buf + 8, 8, "QEMU");
1705 padstr8(buf + 16, 16, "QEMU DVD-ROM");
1706 padstr8(buf + 32, 4, QEMU_VERSION);
1707 ide_atapi_cmd_reply(s, 36, max_len);
1709 case GPCMD_GET_CONFIGURATION:
1713 /* only feature 0 is supported */
1714 if (packet[2] != 0 || packet[3] != 0) {
1715 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1716 ASC_INV_FIELD_IN_CMD_PACKET);
1720 /* XXX: could result in alignment problems in some architectures */
1721 max_len = ube16_to_cpu(packet + 7);
1723 * XXX: avoid overflow for io_buffer if max_len is bigger than the
1724 * size of that buffer (dimensioned to max number of sectors
1725 * to transfer at once)
1727 * Only a problem if the feature/profiles grow exponentially.
1729 if (max_len > 512) /* XXX: assume 1 sector */
1732 memset(buf, 0, max_len);
1734 * the number of sectors from the media tells us which profile
1735 * to use as current. 0 means there is no media
1737 * XXX: fails to detect correctly DVDs with less data burned
1738 * than what a CD can hold
1740 if ((s -> nb_sectors)) {
1741 if ((s -> nb_sectors > CD_MAX_SECTORS))
1742 cpu_to_ube16(buf + 6, MMC_PROFILE_DVD_ROM);
1744 cpu_to_ube16(buf + 6, MMC_PROFILE_CD_ROM);
1747 len = 8; /* header completed */
1748 if (max_len > len) {
1751 buf[10] = 0x02 | 0x01; /* persistent and current */
1752 len += 4; /* header */
1753 len += ide_atapi_set_profile(buf, &index, MMC_PROFILE_DVD_ROM);
1754 len += ide_atapi_set_profile(buf, &index, MMC_PROFILE_CD_ROM);
1756 cpu_to_ube32(buf, len - 4); /* data length */
1758 ide_atapi_cmd_reply(s, len, max_len);
1762 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1763 ASC_ILLEGAL_OPCODE);
1768 static void ide_cfata_metadata_inquiry(IDEState *s)
1773 p = (uint16_t *) s->io_buffer;
1774 memset(p, 0, 0x200);
1775 spd = ((s->mdata_size - 1) >> 9) + 1;
1777 put_le16(p + 0, 0x0001); /* Data format revision */
1778 put_le16(p + 1, 0x0000); /* Media property: silicon */
1779 put_le16(p + 2, s->media_changed); /* Media status */
1780 put_le16(p + 3, s->mdata_size & 0xffff); /* Capacity in bytes (low) */
1781 put_le16(p + 4, s->mdata_size >> 16); /* Capacity in bytes (high) */
1782 put_le16(p + 5, spd & 0xffff); /* Sectors per device (low) */
1783 put_le16(p + 6, spd >> 16); /* Sectors per device (high) */
1786 static void ide_cfata_metadata_read(IDEState *s)
1790 if (((s->hcyl << 16) | s->lcyl) << 9 > s->mdata_size + 2) {
1791 s->status = ERR_STAT;
1792 s->error = ABRT_ERR;
1796 p = (uint16_t *) s->io_buffer;
1797 memset(p, 0, 0x200);
1799 put_le16(p + 0, s->media_changed); /* Media status */
1800 memcpy(p + 1, s->mdata_storage + (((s->hcyl << 16) | s->lcyl) << 9),
1801 MIN(MIN(s->mdata_size - (((s->hcyl << 16) | s->lcyl) << 9),
1802 s->nsector << 9), 0x200 - 2));
1805 static void ide_cfata_metadata_write(IDEState *s)
1807 if (((s->hcyl << 16) | s->lcyl) << 9 > s->mdata_size + 2) {
1808 s->status = ERR_STAT;
1809 s->error = ABRT_ERR;
1813 s->media_changed = 0;
1815 memcpy(s->mdata_storage + (((s->hcyl << 16) | s->lcyl) << 9),
1817 MIN(MIN(s->mdata_size - (((s->hcyl << 16) | s->lcyl) << 9),
1818 s->nsector << 9), 0x200 - 2));
1821 /* called when the inserted state of the media has changed */
1822 static void cdrom_change_cb(void *opaque)
1824 IDEState *s = opaque;
1825 uint64_t nb_sectors;
1827 /* XXX: send interrupt too */
1828 bdrv_get_geometry(s->bs, &nb_sectors);
1829 s->nb_sectors = nb_sectors;
1832 static void ide_cmd_lba48_transform(IDEState *s, int lba48)
1836 /* handle the 'magic' 0 nsector count conversion here. to avoid
1837 * fiddling with the rest of the read logic, we just store the
1838 * full sector count in ->nsector and ignore ->hob_nsector from now
1844 if (!s->nsector && !s->hob_nsector)
1847 int lo = s->nsector;
1848 int hi = s->hob_nsector;
1850 s->nsector = (hi << 8) | lo;
1855 static void ide_clear_hob(IDEState *ide_if)
1857 /* any write clears HOB high bit of device control register */
1858 ide_if[0].select &= ~(1 << 7);
1859 ide_if[1].select &= ~(1 << 7);
1862 static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)
1864 IDEState *ide_if = opaque;
1870 printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);
1878 ide_clear_hob(ide_if);
1879 /* NOTE: data is written to the two drives */
1880 ide_if[0].hob_feature = ide_if[0].feature;
1881 ide_if[1].hob_feature = ide_if[1].feature;
1882 ide_if[0].feature = val;
1883 ide_if[1].feature = val;
1886 ide_clear_hob(ide_if);
1887 ide_if[0].hob_nsector = ide_if[0].nsector;
1888 ide_if[1].hob_nsector = ide_if[1].nsector;
1889 ide_if[0].nsector = val;
1890 ide_if[1].nsector = val;
1893 ide_clear_hob(ide_if);
1894 ide_if[0].hob_sector = ide_if[0].sector;
1895 ide_if[1].hob_sector = ide_if[1].sector;
1896 ide_if[0].sector = val;
1897 ide_if[1].sector = val;
1900 ide_clear_hob(ide_if);
1901 ide_if[0].hob_lcyl = ide_if[0].lcyl;
1902 ide_if[1].hob_lcyl = ide_if[1].lcyl;
1903 ide_if[0].lcyl = val;
1904 ide_if[1].lcyl = val;
1907 ide_clear_hob(ide_if);
1908 ide_if[0].hob_hcyl = ide_if[0].hcyl;
1909 ide_if[1].hob_hcyl = ide_if[1].hcyl;
1910 ide_if[0].hcyl = val;
1911 ide_if[1].hcyl = val;
1914 /* FIXME: HOB readback uses bit 7 */
1915 ide_if[0].select = (val & ~0x10) | 0xa0;
1916 ide_if[1].select = (val | 0x10) | 0xa0;
1918 unit = (val >> 4) & 1;
1920 ide_if->cur_drive = s;
1925 #if defined(DEBUG_IDE)
1926 printf("ide: CMD=%02x\n", val);
1928 s = ide_if->cur_drive;
1929 /* ignore commands to non existant slave */
1930 if (s != ide_if && !s->bs)
1935 if (s->bs && !s->is_cdrom) {
1939 ide_cfata_identify(s);
1940 s->status = READY_STAT | SEEK_STAT;
1941 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1944 ide_set_signature(s);
1946 ide_abort_command(s);
1953 s->status = READY_STAT | SEEK_STAT;
1957 if (s->is_cf && s->nsector == 0) {
1958 /* Disable Read and Write Multiple */
1959 s->mult_sectors = 0;
1960 s->status = READY_STAT;
1961 } else if ((s->nsector & 0xff) != 0 &&
1962 ((s->nsector & 0xff) > MAX_MULT_SECTORS ||
1963 (s->nsector & (s->nsector - 1)) != 0)) {
1964 ide_abort_command(s);
1966 s->mult_sectors = s->nsector & 0xff;
1967 s->status = READY_STAT;
1971 case WIN_VERIFY_EXT:
1974 case WIN_VERIFY_ONCE:
1975 /* do sector number check ? */
1976 ide_cmd_lba48_transform(s, lba48);
1977 s->status = READY_STAT;
1986 ide_cmd_lba48_transform(s, lba48);
1987 s->req_nb_sectors = 1;
1993 case WIN_WRITE_ONCE:
1994 case CFA_WRITE_SECT_WO_ERASE:
1995 case WIN_WRITE_VERIFY:
1996 ide_cmd_lba48_transform(s, lba48);
1998 s->status = SEEK_STAT | READY_STAT;
1999 s->req_nb_sectors = 1;
2000 ide_transfer_start(s, s->io_buffer, 512, ide_sector_write);
2001 s->media_changed = 1;
2003 case WIN_MULTREAD_EXT:
2006 if (!s->mult_sectors)
2008 ide_cmd_lba48_transform(s, lba48);
2009 s->req_nb_sectors = s->mult_sectors;
2012 case WIN_MULTWRITE_EXT:
2015 case CFA_WRITE_MULTI_WO_ERASE:
2016 if (!s->mult_sectors)
2018 ide_cmd_lba48_transform(s, lba48);
2020 s->status = SEEK_STAT | READY_STAT;
2021 s->req_nb_sectors = s->mult_sectors;
2023 if (n > s->req_nb_sectors)
2024 n = s->req_nb_sectors;
2025 ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write);
2026 s->media_changed = 1;
2028 case WIN_READDMA_EXT:
2031 case WIN_READDMA_ONCE:
2034 ide_cmd_lba48_transform(s, lba48);
2035 ide_sector_read_dma(s);
2037 case WIN_WRITEDMA_EXT:
2040 case WIN_WRITEDMA_ONCE:
2043 ide_cmd_lba48_transform(s, lba48);
2044 ide_sector_write_dma(s);
2045 s->media_changed = 1;
2047 case WIN_READ_NATIVE_MAX_EXT:
2049 case WIN_READ_NATIVE_MAX:
2050 ide_cmd_lba48_transform(s, lba48);
2051 ide_set_sector(s, s->nb_sectors - 1);
2052 s->status = READY_STAT;
2055 case WIN_CHECKPOWERMODE1:
2056 case WIN_CHECKPOWERMODE2:
2057 s->nsector = 0xff; /* device active or idle */
2058 s->status = READY_STAT;
2061 case WIN_SETFEATURES:
2064 /* XXX: valid for CDROM ? */
2065 switch(s->feature) {
2066 case 0xcc: /* reverting to power-on defaults enable */
2067 case 0x66: /* reverting to power-on defaults disable */
2068 case 0x02: /* write cache enable */
2069 case 0x82: /* write cache disable */
2070 case 0xaa: /* read look-ahead enable */
2071 case 0x55: /* read look-ahead disable */
2072 case 0x05: /* set advanced power management mode */
2073 case 0x85: /* disable advanced power management mode */
2074 case 0x69: /* NOP */
2075 case 0x67: /* NOP */
2076 case 0x96: /* NOP */
2077 case 0x9a: /* NOP */
2078 case 0x42: /* enable Automatic Acoustic Mode */
2079 case 0xc2: /* disable Automatic Acoustic Mode */
2080 s->status = READY_STAT | SEEK_STAT;
2083 case 0x03: { /* set transfer mode */
2084 uint8_t val = s->nsector & 0x07;
2086 switch (s->nsector >> 3) {
2087 case 0x00: /* pio default */
2088 case 0x01: /* pio mode */
2089 put_le16(s->identify_data + 63,0x07);
2090 put_le16(s->identify_data + 88,0x3f);
2092 case 0x04: /* mdma mode */
2093 put_le16(s->identify_data + 63,0x07 | (1 << (val + 8)));
2094 put_le16(s->identify_data + 88,0x3f);
2096 case 0x08: /* udma mode */
2097 put_le16(s->identify_data + 63,0x07);
2098 put_le16(s->identify_data + 88,0x3f | (1 << (val + 8)));
2103 s->status = READY_STAT | SEEK_STAT;
2111 case WIN_FLUSH_CACHE:
2112 case WIN_FLUSH_CACHE_EXT:
2115 s->status = READY_STAT;
2120 case WIN_STANDBYNOW1:
2121 case WIN_STANDBYNOW2:
2122 case WIN_IDLEIMMEDIATE:
2123 case CFA_IDLEIMMEDIATE:
2128 s->status = READY_STAT;
2131 /* ATAPI commands */
2134 ide_atapi_identify(s);
2135 s->status = READY_STAT | SEEK_STAT;
2136 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
2138 ide_abort_command(s);
2143 ide_set_signature(s);
2144 s->status = READY_STAT;
2151 ide_set_signature(s);
2152 s->status = 0x00; /* NOTE: READY is _not_ set */
2158 /* overlapping commands not supported */
2159 if (s->feature & 0x02)
2161 s->status = READY_STAT;
2162 s->atapi_dma = s->feature & 1;
2164 ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE,
2167 /* CF-ATA commands */
2168 case CFA_REQ_EXT_ERROR_CODE:
2171 s->error = 0x09; /* miscellaneous error */
2172 s->status = READY_STAT;
2175 case CFA_ERASE_SECTORS:
2176 case CFA_WEAR_LEVEL:
2179 if (val == CFA_WEAR_LEVEL)
2181 if (val == CFA_ERASE_SECTORS)
2182 s->media_changed = 1;
2184 s->status = READY_STAT;
2187 case CFA_TRANSLATE_SECTOR:
2191 s->status = READY_STAT;
2192 memset(s->io_buffer, 0, 0x200);
2193 s->io_buffer[0x00] = s->hcyl; /* Cyl MSB */
2194 s->io_buffer[0x01] = s->lcyl; /* Cyl LSB */
2195 s->io_buffer[0x02] = s->select; /* Head */
2196 s->io_buffer[0x03] = s->sector; /* Sector */
2197 s->io_buffer[0x04] = ide_get_sector(s) >> 16; /* LBA MSB */
2198 s->io_buffer[0x05] = ide_get_sector(s) >> 8; /* LBA */
2199 s->io_buffer[0x06] = ide_get_sector(s) >> 0; /* LBA LSB */
2200 s->io_buffer[0x13] = 0x00; /* Erase flag */
2201 s->io_buffer[0x18] = 0x00; /* Hot count */
2202 s->io_buffer[0x19] = 0x00; /* Hot count */
2203 s->io_buffer[0x1a] = 0x01; /* Hot count */
2204 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
2207 case CFA_ACCESS_METADATA_STORAGE:
2210 switch (s->feature) {
2211 case 0x02: /* Inquiry Metadata Storage */
2212 ide_cfata_metadata_inquiry(s);
2214 case 0x03: /* Read Metadata Storage */
2215 ide_cfata_metadata_read(s);
2217 case 0x04: /* Write Metadata Storage */
2218 ide_cfata_metadata_write(s);
2223 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
2224 s->status = 0x00; /* NOTE: READY is _not_ set */
2227 case IBM_SENSE_CONDITION:
2230 switch (s->feature) {
2231 case 0x01: /* sense temperature in device */
2232 s->nsector = 0x50; /* +20 C */
2237 s->status = READY_STAT;
2242 ide_abort_command(s);
2249 static uint32_t ide_ioport_read(void *opaque, uint32_t addr1)
2251 IDEState *ide_if = opaque;
2252 IDEState *s = ide_if->cur_drive;
2257 /* FIXME: HOB readback uses bit 7, but it's always set right now */
2258 //hob = s->select & (1 << 7);
2265 if (!ide_if[0].bs && !ide_if[1].bs)
2270 ret = s->hob_feature;
2273 if (!ide_if[0].bs && !ide_if[1].bs)
2276 ret = s->nsector & 0xff;
2278 ret = s->hob_nsector;
2281 if (!ide_if[0].bs && !ide_if[1].bs)
2286 ret = s->hob_sector;
2289 if (!ide_if[0].bs && !ide_if[1].bs)
2297 if (!ide_if[0].bs && !ide_if[1].bs)
2305 if (!ide_if[0].bs && !ide_if[1].bs)
2312 if ((!ide_if[0].bs && !ide_if[1].bs) ||
2313 (s != ide_if && !s->bs))
2317 qemu_irq_lower(s->irq);
2321 printf("ide: read addr=0x%x val=%02x\n", addr1, ret);
2326 static uint32_t ide_status_read(void *opaque, uint32_t addr)
2328 IDEState *ide_if = opaque;
2329 IDEState *s = ide_if->cur_drive;
2332 if ((!ide_if[0].bs && !ide_if[1].bs) ||
2333 (s != ide_if && !s->bs))
2338 printf("ide: read status addr=0x%x val=%02x\n", addr, ret);
2343 static void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val)
2345 IDEState *ide_if = opaque;
2350 printf("ide: write control addr=0x%x val=%02x\n", addr, val);
2352 /* common for both drives */
2353 if (!(ide_if[0].cmd & IDE_CMD_RESET) &&
2354 (val & IDE_CMD_RESET)) {
2355 /* reset low to high */
2356 for(i = 0;i < 2; i++) {
2358 s->status = BUSY_STAT | SEEK_STAT;
2361 } else if ((ide_if[0].cmd & IDE_CMD_RESET) &&
2362 !(val & IDE_CMD_RESET)) {
2364 for(i = 0;i < 2; i++) {
2367 s->status = 0x00; /* NOTE: READY is _not_ set */
2369 s->status = READY_STAT | SEEK_STAT;
2370 ide_set_signature(s);
2374 ide_if[0].cmd = val;
2375 ide_if[1].cmd = val;
2378 static void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)
2380 IDEState *s = ((IDEState *)opaque)->cur_drive;
2384 *(uint16_t *)p = le16_to_cpu(val);
2387 if (p >= s->data_end)
2388 s->end_transfer_func(s);
2391 static uint32_t ide_data_readw(void *opaque, uint32_t addr)
2393 IDEState *s = ((IDEState *)opaque)->cur_drive;
2397 ret = cpu_to_le16(*(uint16_t *)p);
2400 if (p >= s->data_end)
2401 s->end_transfer_func(s);
2405 static void ide_data_writel(void *opaque, uint32_t addr, uint32_t val)
2407 IDEState *s = ((IDEState *)opaque)->cur_drive;
2411 *(uint32_t *)p = le32_to_cpu(val);
2414 if (p >= s->data_end)
2415 s->end_transfer_func(s);
2418 static uint32_t ide_data_readl(void *opaque, uint32_t addr)
2420 IDEState *s = ((IDEState *)opaque)->cur_drive;
2425 ret = cpu_to_le32(*(uint32_t *)p);
2428 if (p >= s->data_end)
2429 s->end_transfer_func(s);
2433 static void ide_dummy_transfer_stop(IDEState *s)
2435 s->data_ptr = s->io_buffer;
2436 s->data_end = s->io_buffer;
2437 s->io_buffer[0] = 0xff;
2438 s->io_buffer[1] = 0xff;
2439 s->io_buffer[2] = 0xff;
2440 s->io_buffer[3] = 0xff;
2443 static void ide_reset(IDEState *s)
2446 s->mult_sectors = 0;
2448 s->mult_sectors = MAX_MULT_SECTORS;
2451 s->status = READY_STAT;
2452 ide_set_signature(s);
2453 /* init the transfer handler so that 0xffff is returned on data
2455 s->end_transfer_func = ide_dummy_transfer_stop;
2456 ide_dummy_transfer_stop(s);
2457 s->media_changed = 0;
2461 uint8_t boot_ind; /* 0x80 - active */
2462 uint8_t head; /* starting head */
2463 uint8_t sector; /* starting sector */
2464 uint8_t cyl; /* starting cylinder */
2465 uint8_t sys_ind; /* What partition type */
2466 uint8_t end_head; /* end head */
2467 uint8_t end_sector; /* end sector */
2468 uint8_t end_cyl; /* end cylinder */
2469 uint32_t start_sect; /* starting sector counting from 0 */
2470 uint32_t nr_sects; /* nr of sectors in partition */
2471 } __attribute__((packed));
2473 /* try to guess the disk logical geometry from the MSDOS partition table. Return 0 if OK, -1 if could not guess */
2474 static int guess_disk_lchs(IDEState *s,
2475 int *pcylinders, int *pheads, int *psectors)
2478 int ret, i, heads, sectors, cylinders;
2479 struct partition *p;
2482 buf = qemu_memalign(512, 512);
2485 ret = bdrv_read(s->bs, 0, buf, 1);
2490 /* test msdos magic */
2491 if (buf[510] != 0x55 || buf[511] != 0xaa) {
2495 for(i = 0; i < 4; i++) {
2496 p = ((struct partition *)(buf + 0x1be)) + i;
2497 nr_sects = le32_to_cpu(p->nr_sects);
2498 if (nr_sects && p->end_head) {
2499 /* We make the assumption that the partition terminates on
2500 a cylinder boundary */
2501 heads = p->end_head + 1;
2502 sectors = p->end_sector & 63;
2505 cylinders = s->nb_sectors / (heads * sectors);
2506 if (cylinders < 1 || cylinders > 16383)
2509 *psectors = sectors;
2510 *pcylinders = cylinders;
2512 printf("guessed geometry: LCHS=%d %d %d\n",
2513 cylinders, heads, sectors);
2523 static void ide_init2(IDEState *ide_state,
2524 BlockDriverState *hd0, BlockDriverState *hd1,
2528 static int drive_serial = 1;
2529 int i, cylinders, heads, secs, translation, lba_detected = 0;
2530 uint64_t nb_sectors;
2532 for(i = 0; i < 2; i++) {
2534 s->io_buffer = qemu_memalign(512, MAX_MULT_SECTORS*512 + 4);
2540 bdrv_get_geometry(s->bs, &nb_sectors);
2541 s->nb_sectors = nb_sectors;
2542 /* if a geometry hint is available, use it */
2543 bdrv_get_geometry_hint(s->bs, &cylinders, &heads, &secs);
2544 translation = bdrv_get_translation_hint(s->bs);
2545 if (cylinders != 0) {
2546 s->cylinders = cylinders;
2550 if (guess_disk_lchs(s, &cylinders, &heads, &secs) == 0) {
2552 /* if heads > 16, it means that a BIOS LBA
2553 translation was active, so the default
2554 hardware geometry is OK */
2556 goto default_geometry;
2558 s->cylinders = cylinders;
2561 /* disable any translation to be in sync with
2562 the logical geometry */
2563 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
2564 bdrv_set_translation_hint(s->bs,
2565 BIOS_ATA_TRANSLATION_NONE);
2570 /* if no geometry, use a standard physical disk geometry */
2571 cylinders = nb_sectors / (16 * 63);
2572 if (cylinders > 16383)
2574 else if (cylinders < 2)
2576 s->cylinders = cylinders;
2579 if ((lba_detected == 1) && (translation == BIOS_ATA_TRANSLATION_AUTO)) {
2580 if ((s->cylinders * s->heads) <= 131072) {
2581 bdrv_set_translation_hint(s->bs,
2582 BIOS_ATA_TRANSLATION_LARGE);
2584 bdrv_set_translation_hint(s->bs,
2585 BIOS_ATA_TRANSLATION_LBA);
2589 bdrv_set_geometry_hint(s->bs, s->cylinders, s->heads, s->sectors);
2591 if (bdrv_get_type_hint(s->bs) == BDRV_TYPE_CDROM) {
2593 bdrv_set_change_cb(s->bs, cdrom_change_cb, s);
2596 s->drive_serial = drive_serial++;
2598 s->sector_write_timer = qemu_new_timer(vm_clock,
2599 ide_sector_write_timer_cb, s);
2604 static void ide_init_ioport(IDEState *ide_state, int iobase, int iobase2)
2606 register_ioport_write(iobase, 8, 1, ide_ioport_write, ide_state);
2607 register_ioport_read(iobase, 8, 1, ide_ioport_read, ide_state);
2609 register_ioport_read(iobase2, 1, 1, ide_status_read, ide_state);
2610 register_ioport_write(iobase2, 1, 1, ide_cmd_write, ide_state);
2614 register_ioport_write(iobase, 2, 2, ide_data_writew, ide_state);
2615 register_ioport_read(iobase, 2, 2, ide_data_readw, ide_state);
2616 register_ioport_write(iobase, 4, 4, ide_data_writel, ide_state);
2617 register_ioport_read(iobase, 4, 4, ide_data_readl, ide_state);
2620 /* save per IDE drive data */
2621 static void ide_save(QEMUFile* f, IDEState *s)
2623 qemu_put_be32(f, s->mult_sectors);
2624 qemu_put_be32(f, s->identify_set);
2625 if (s->identify_set) {
2626 qemu_put_buffer(f, (const uint8_t *)s->identify_data, 512);
2628 qemu_put_8s(f, &s->feature);
2629 qemu_put_8s(f, &s->error);
2630 qemu_put_be32s(f, &s->nsector);
2631 qemu_put_8s(f, &s->sector);
2632 qemu_put_8s(f, &s->lcyl);
2633 qemu_put_8s(f, &s->hcyl);
2634 qemu_put_8s(f, &s->hob_feature);
2635 qemu_put_8s(f, &s->hob_nsector);
2636 qemu_put_8s(f, &s->hob_sector);
2637 qemu_put_8s(f, &s->hob_lcyl);
2638 qemu_put_8s(f, &s->hob_hcyl);
2639 qemu_put_8s(f, &s->select);
2640 qemu_put_8s(f, &s->status);
2641 qemu_put_8s(f, &s->lba48);
2643 qemu_put_8s(f, &s->sense_key);
2644 qemu_put_8s(f, &s->asc);
2645 /* XXX: if a transfer is pending, we do not save it yet */
2648 /* load per IDE drive data */
2649 static void ide_load(QEMUFile* f, IDEState *s)
2651 s->mult_sectors=qemu_get_be32(f);
2652 s->identify_set=qemu_get_be32(f);
2653 if (s->identify_set) {
2654 qemu_get_buffer(f, (uint8_t *)s->identify_data, 512);
2656 qemu_get_8s(f, &s->feature);
2657 qemu_get_8s(f, &s->error);
2658 qemu_get_be32s(f, &s->nsector);
2659 qemu_get_8s(f, &s->sector);
2660 qemu_get_8s(f, &s->lcyl);
2661 qemu_get_8s(f, &s->hcyl);
2662 qemu_get_8s(f, &s->hob_feature);
2663 qemu_get_8s(f, &s->hob_nsector);
2664 qemu_get_8s(f, &s->hob_sector);
2665 qemu_get_8s(f, &s->hob_lcyl);
2666 qemu_get_8s(f, &s->hob_hcyl);
2667 qemu_get_8s(f, &s->select);
2668 qemu_get_8s(f, &s->status);
2669 qemu_get_8s(f, &s->lba48);
2671 qemu_get_8s(f, &s->sense_key);
2672 qemu_get_8s(f, &s->asc);
2673 /* XXX: if a transfer is pending, we do not save it yet */
2676 /***********************************************************/
2677 /* ISA IDE definitions */
2679 void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
2680 BlockDriverState *hd0, BlockDriverState *hd1)
2682 IDEState *ide_state;
2684 ide_state = qemu_mallocz(sizeof(IDEState) * 2);
2688 ide_init2(ide_state, hd0, hd1, irq);
2689 ide_init_ioport(ide_state, iobase, iobase2);
2692 /***********************************************************/
2693 /* PCI IDE definitions */
2695 static void cmd646_update_irq(PCIIDEState *d);
2697 static void ide_map(PCIDevice *pci_dev, int region_num,
2698 uint32_t addr, uint32_t size, int type)
2700 PCIIDEState *d = (PCIIDEState *)pci_dev;
2701 IDEState *ide_state;
2703 if (region_num <= 3) {
2704 ide_state = &d->ide_if[(region_num >> 1) * 2];
2705 if (region_num & 1) {
2706 register_ioport_read(addr + 2, 1, 1, ide_status_read, ide_state);
2707 register_ioport_write(addr + 2, 1, 1, ide_cmd_write, ide_state);
2709 register_ioport_write(addr, 8, 1, ide_ioport_write, ide_state);
2710 register_ioport_read(addr, 8, 1, ide_ioport_read, ide_state);
2713 register_ioport_write(addr, 2, 2, ide_data_writew, ide_state);
2714 register_ioport_read(addr, 2, 2, ide_data_readw, ide_state);
2715 register_ioport_write(addr, 4, 4, ide_data_writel, ide_state);
2716 register_ioport_read(addr, 4, 4, ide_data_readl, ide_state);
2721 static void ide_dma_start(IDEState *s, BlockDriverCompletionFunc *dma_cb)
2723 BMDMAState *bm = s->bmdma;
2727 bm->dma_cb = dma_cb;
2728 bm->cur_prd_last = 0;
2729 bm->cur_prd_addr = 0;
2730 bm->cur_prd_len = 0;
2731 if (bm->status & BM_STATUS_DMAING) {
2736 static void bmdma_cmd_writeb(void *opaque, uint32_t addr, uint32_t val)
2738 BMDMAState *bm = opaque;
2740 printf("%s: 0x%08x\n", __func__, val);
2742 if (!(val & BM_CMD_START)) {
2743 /* XXX: do it better */
2744 if (bm->status & BM_STATUS_DMAING) {
2745 bm->status &= ~BM_STATUS_DMAING;
2746 /* cancel DMA request */
2751 printf("aio_cancel\n");
2753 bdrv_aio_cancel(bm->aiocb);
2757 bm->cmd = val & 0x09;
2759 if (!(bm->status & BM_STATUS_DMAING)) {
2760 bm->status |= BM_STATUS_DMAING;
2761 /* start dma transfer if possible */
2765 bm->cmd = val & 0x09;
2769 static uint32_t bmdma_readb(void *opaque, uint32_t addr)
2771 BMDMAState *bm = opaque;
2772 PCIIDEState *pci_dev;
2780 pci_dev = bm->pci_dev;
2781 if (pci_dev->type == IDE_TYPE_CMD646) {
2782 val = pci_dev->dev.config[MRDMODE];
2791 pci_dev = bm->pci_dev;
2792 if (pci_dev->type == IDE_TYPE_CMD646) {
2793 if (bm == &pci_dev->bmdma[0])
2794 val = pci_dev->dev.config[UDIDETCR0];
2796 val = pci_dev->dev.config[UDIDETCR1];
2806 printf("bmdma: readb 0x%02x : 0x%02x\n", addr, val);
2811 static void bmdma_writeb(void *opaque, uint32_t addr, uint32_t val)
2813 BMDMAState *bm = opaque;
2814 PCIIDEState *pci_dev;
2816 printf("bmdma: writeb 0x%02x : 0x%02x\n", addr, val);
2820 pci_dev = bm->pci_dev;
2821 if (pci_dev->type == IDE_TYPE_CMD646) {
2822 pci_dev->dev.config[MRDMODE] =
2823 (pci_dev->dev.config[MRDMODE] & ~0x30) | (val & 0x30);
2824 cmd646_update_irq(pci_dev);
2828 bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
2831 pci_dev = bm->pci_dev;
2832 if (pci_dev->type == IDE_TYPE_CMD646) {
2833 if (bm == &pci_dev->bmdma[0])
2834 pci_dev->dev.config[UDIDETCR0] = val;
2836 pci_dev->dev.config[UDIDETCR1] = val;
2842 static uint32_t bmdma_addr_readl(void *opaque, uint32_t addr)
2844 BMDMAState *bm = opaque;
2848 printf("%s: 0x%08x\n", __func__, val);
2853 static void bmdma_addr_writel(void *opaque, uint32_t addr, uint32_t val)
2855 BMDMAState *bm = opaque;
2857 printf("%s: 0x%08x\n", __func__, val);
2859 bm->addr = val & ~3;
2860 bm->cur_addr = bm->addr;
2863 static void bmdma_map(PCIDevice *pci_dev, int region_num,
2864 uint32_t addr, uint32_t size, int type)
2866 PCIIDEState *d = (PCIIDEState *)pci_dev;
2869 for(i = 0;i < 2; i++) {
2870 BMDMAState *bm = &d->bmdma[i];
2871 d->ide_if[2 * i].bmdma = bm;
2872 d->ide_if[2 * i + 1].bmdma = bm;
2873 bm->pci_dev = (PCIIDEState *)pci_dev;
2875 register_ioport_write(addr, 1, 1, bmdma_cmd_writeb, bm);
2877 register_ioport_write(addr + 1, 3, 1, bmdma_writeb, bm);
2878 register_ioport_read(addr, 4, 1, bmdma_readb, bm);
2880 register_ioport_write(addr + 4, 4, 4, bmdma_addr_writel, bm);
2881 register_ioport_read(addr + 4, 4, 4, bmdma_addr_readl, bm);
2886 /* XXX: call it also when the MRDMODE is changed from the PCI config
2888 static void cmd646_update_irq(PCIIDEState *d)
2891 pci_level = ((d->dev.config[MRDMODE] & MRDMODE_INTR_CH0) &&
2892 !(d->dev.config[MRDMODE] & MRDMODE_BLK_CH0)) ||
2893 ((d->dev.config[MRDMODE] & MRDMODE_INTR_CH1) &&
2894 !(d->dev.config[MRDMODE] & MRDMODE_BLK_CH1));
2895 qemu_set_irq(d->dev.irq[0], pci_level);
2898 /* the PCI irq level is the logical OR of the two channels */
2899 static void cmd646_set_irq(void *opaque, int channel, int level)
2901 PCIIDEState *d = opaque;
2904 irq_mask = MRDMODE_INTR_CH0 << channel;
2906 d->dev.config[MRDMODE] |= irq_mask;
2908 d->dev.config[MRDMODE] &= ~irq_mask;
2909 cmd646_update_irq(d);
2912 /* CMD646 PCI IDE controller */
2913 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
2914 int secondary_ide_enabled)
2921 d = (PCIIDEState *)pci_register_device(bus, "CMD646 IDE",
2922 sizeof(PCIIDEState),
2925 d->type = IDE_TYPE_CMD646;
2926 pci_conf = d->dev.config;
2927 pci_conf[0x00] = 0x95; // CMD646
2928 pci_conf[0x01] = 0x10;
2929 pci_conf[0x02] = 0x46;
2930 pci_conf[0x03] = 0x06;
2932 pci_conf[0x08] = 0x07; // IDE controller revision
2933 pci_conf[0x09] = 0x8f;
2935 pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
2936 pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
2937 pci_conf[0x0e] = 0x00; // header_type
2939 if (secondary_ide_enabled) {
2940 /* XXX: if not enabled, really disable the seconday IDE controller */
2941 pci_conf[0x51] = 0x80; /* enable IDE1 */
2944 pci_register_io_region((PCIDevice *)d, 0, 0x8,
2945 PCI_ADDRESS_SPACE_IO, ide_map);
2946 pci_register_io_region((PCIDevice *)d, 1, 0x4,
2947 PCI_ADDRESS_SPACE_IO, ide_map);
2948 pci_register_io_region((PCIDevice *)d, 2, 0x8,
2949 PCI_ADDRESS_SPACE_IO, ide_map);
2950 pci_register_io_region((PCIDevice *)d, 3, 0x4,
2951 PCI_ADDRESS_SPACE_IO, ide_map);
2952 pci_register_io_region((PCIDevice *)d, 4, 0x10,
2953 PCI_ADDRESS_SPACE_IO, bmdma_map);
2955 pci_conf[0x3d] = 0x01; // interrupt on pin 1
2957 for(i = 0; i < 4; i++)
2958 d->ide_if[i].pci_dev = (PCIDevice *)d;
2960 irq = qemu_allocate_irqs(cmd646_set_irq, d, 2);
2961 ide_init2(&d->ide_if[0], hd_table[0], hd_table[1], irq[0]);
2962 ide_init2(&d->ide_if[2], hd_table[2], hd_table[3], irq[1]);
2965 static void pci_ide_save(QEMUFile* f, void *opaque)
2967 PCIIDEState *d = opaque;
2970 pci_device_save(&d->dev, f);
2972 for(i = 0; i < 2; i++) {
2973 BMDMAState *bm = &d->bmdma[i];
2974 qemu_put_8s(f, &bm->cmd);
2975 qemu_put_8s(f, &bm->status);
2976 qemu_put_be32s(f, &bm->addr);
2977 /* XXX: if a transfer is pending, we do not save it yet */
2980 /* per IDE interface data */
2981 for(i = 0; i < 2; i++) {
2982 IDEState *s = &d->ide_if[i * 2];
2983 uint8_t drive1_selected;
2984 qemu_put_8s(f, &s->cmd);
2985 drive1_selected = (s->cur_drive != s);
2986 qemu_put_8s(f, &drive1_selected);
2989 /* per IDE drive data */
2990 for(i = 0; i < 4; i++) {
2991 ide_save(f, &d->ide_if[i]);
2995 static int pci_ide_load(QEMUFile* f, void *opaque, int version_id)
2997 PCIIDEState *d = opaque;
3000 if (version_id != 1)
3002 ret = pci_device_load(&d->dev, f);
3006 for(i = 0; i < 2; i++) {
3007 BMDMAState *bm = &d->bmdma[i];
3008 qemu_get_8s(f, &bm->cmd);
3009 qemu_get_8s(f, &bm->status);
3010 qemu_get_be32s(f, &bm->addr);
3011 /* XXX: if a transfer is pending, we do not save it yet */
3014 /* per IDE interface data */
3015 for(i = 0; i < 2; i++) {
3016 IDEState *s = &d->ide_if[i * 2];
3017 uint8_t drive1_selected;
3018 qemu_get_8s(f, &s->cmd);
3019 qemu_get_8s(f, &drive1_selected);
3020 s->cur_drive = &d->ide_if[i * 2 + (drive1_selected != 0)];
3023 /* per IDE drive data */
3024 for(i = 0; i < 4; i++) {
3025 ide_load(f, &d->ide_if[i]);
3030 static void piix3_reset(PCIIDEState *d)
3032 uint8_t *pci_conf = d->dev.config;
3034 pci_conf[0x04] = 0x00;
3035 pci_conf[0x05] = 0x00;
3036 pci_conf[0x06] = 0x80; /* FBC */
3037 pci_conf[0x07] = 0x02; // PCI_status_devsel_medium
3038 pci_conf[0x20] = 0x01; /* BMIBA: 20-23h */
3041 /* hd_table must contain 4 block drivers */
3042 /* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
3043 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
3049 /* register a function 1 of PIIX3 */
3050 d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE",
3051 sizeof(PCIIDEState),
3054 d->type = IDE_TYPE_PIIX3;
3056 pci_conf = d->dev.config;
3057 pci_conf[0x00] = 0x86; // Intel
3058 pci_conf[0x01] = 0x80;
3059 pci_conf[0x02] = 0x10;
3060 pci_conf[0x03] = 0x70;
3061 pci_conf[0x09] = 0x80; // legacy ATA mode
3062 pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
3063 pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
3064 pci_conf[0x0e] = 0x00; // header_type
3068 pci_register_io_region((PCIDevice *)d, 4, 0x10,
3069 PCI_ADDRESS_SPACE_IO, bmdma_map);
3071 ide_init2(&d->ide_if[0], hd_table[0], hd_table[1], pic[14]);
3072 ide_init2(&d->ide_if[2], hd_table[2], hd_table[3], pic[15]);
3073 ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6);
3074 ide_init_ioport(&d->ide_if[2], 0x170, 0x376);
3076 register_savevm("ide", 0, 1, pci_ide_save, pci_ide_load, d);
3079 /* hd_table must contain 4 block drivers */
3080 /* NOTE: for the PIIX4, the IRQs and IOports are hardcoded */
3081 void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
3087 /* register a function 1 of PIIX4 */
3088 d = (PCIIDEState *)pci_register_device(bus, "PIIX4 IDE",
3089 sizeof(PCIIDEState),
3092 d->type = IDE_TYPE_PIIX4;
3094 pci_conf = d->dev.config;
3095 pci_conf[0x00] = 0x86; // Intel
3096 pci_conf[0x01] = 0x80;
3097 pci_conf[0x02] = 0x11;
3098 pci_conf[0x03] = 0x71;
3099 pci_conf[0x09] = 0x80; // legacy ATA mode
3100 pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
3101 pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
3102 pci_conf[0x0e] = 0x00; // header_type
3106 pci_register_io_region((PCIDevice *)d, 4, 0x10,
3107 PCI_ADDRESS_SPACE_IO, bmdma_map);
3109 ide_init2(&d->ide_if[0], hd_table[0], hd_table[1], pic[14]);
3110 ide_init2(&d->ide_if[2], hd_table[2], hd_table[3], pic[15]);
3111 ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6);
3112 ide_init_ioport(&d->ide_if[2], 0x170, 0x376);
3114 register_savevm("ide", 0, 1, pci_ide_save, pci_ide_load, d);
3117 /***********************************************************/
3118 /* MacIO based PowerPC IDE */
3120 /* PowerMac IDE memory IO */
3121 static void pmac_ide_writeb (void *opaque,
3122 target_phys_addr_t addr, uint32_t val)
3124 addr = (addr & 0xFFF) >> 4;
3127 ide_ioport_write(opaque, addr, val);
3131 ide_cmd_write(opaque, 0, val);
3138 static uint32_t pmac_ide_readb (void *opaque,target_phys_addr_t addr)
3142 addr = (addr & 0xFFF) >> 4;
3145 retval = ide_ioport_read(opaque, addr);
3149 retval = ide_status_read(opaque, 0);
3158 static void pmac_ide_writew (void *opaque,
3159 target_phys_addr_t addr, uint32_t val)
3161 addr = (addr & 0xFFF) >> 4;
3162 #ifdef TARGET_WORDS_BIGENDIAN
3166 ide_data_writew(opaque, 0, val);
3170 static uint32_t pmac_ide_readw (void *opaque,target_phys_addr_t addr)
3174 addr = (addr & 0xFFF) >> 4;
3176 retval = ide_data_readw(opaque, 0);
3180 #ifdef TARGET_WORDS_BIGENDIAN
3181 retval = bswap16(retval);
3186 static void pmac_ide_writel (void *opaque,
3187 target_phys_addr_t addr, uint32_t val)
3189 addr = (addr & 0xFFF) >> 4;
3190 #ifdef TARGET_WORDS_BIGENDIAN
3194 ide_data_writel(opaque, 0, val);
3198 static uint32_t pmac_ide_readl (void *opaque,target_phys_addr_t addr)
3202 addr = (addr & 0xFFF) >> 4;
3204 retval = ide_data_readl(opaque, 0);
3206 retval = 0xFFFFFFFF;
3208 #ifdef TARGET_WORDS_BIGENDIAN
3209 retval = bswap32(retval);
3214 static CPUWriteMemoryFunc *pmac_ide_write[] = {
3220 static CPUReadMemoryFunc *pmac_ide_read[] = {
3226 /* hd_table must contain 4 block drivers */
3227 /* PowerMac uses memory mapped registers, not I/O. Return the memory
3228 I/O index to access the ide. */
3229 int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq)
3232 int pmac_ide_memory;
3234 ide_if = qemu_mallocz(sizeof(IDEState) * 2);
3235 ide_init2(&ide_if[0], hd_table[0], hd_table[1], irq);
3237 pmac_ide_memory = cpu_register_io_memory(0, pmac_ide_read,
3238 pmac_ide_write, &ide_if[0]);
3239 return pmac_ide_memory;
3242 /***********************************************************/
3243 /* CF-ATA Microdrive */
3245 #define METADATA_SIZE 0x20
3247 /* DSCM-1XXXX Microdrive hard disk with CF+ II / PCMCIA interface. */
3250 struct pcmcia_card_s card;
3264 /* Register bitfields */
3267 OPT_MODE_IOMAP16 = 1,
3268 OPT_MODE_IOMAP1 = 2,
3269 OPT_MODE_IOMAP2 = 3,
3280 STAT_CHANGED = 0x80,
3291 static inline void md_interrupt_update(struct md_s *s)
3296 qemu_set_irq(s->card.slot->irq,
3297 !(s->stat & STAT_INT) && /* Inverted */
3298 !(s->ctrl & (CTRL_IEN | CTRL_SRST)) &&
3299 !(s->opt & OPT_SRESET));
3302 static void md_set_irq(void *opaque, int irq, int level)
3304 struct md_s *s = (struct md_s *) opaque;
3306 s->stat |= STAT_INT;
3308 s->stat &= ~STAT_INT;
3310 md_interrupt_update(s);
3313 static void md_reset(struct md_s *s)
3315 s->opt = OPT_MODE_MMAP;
3323 static uint8_t md_attr_read(void *opaque, uint32_t at)
3325 struct md_s *s = (struct md_s *) opaque;
3326 if (at < s->attr_base) {
3327 if (at < s->card.cis_len)
3328 return s->card.cis[at];
3336 case 0x00: /* Configuration Option Register */
3338 case 0x02: /* Card Configuration Status Register */
3339 if (s->ctrl & CTRL_IEN)
3340 return s->stat & ~STAT_INT;
3343 case 0x04: /* Pin Replacement Register */
3344 return (s->pins & PINS_CRDY) | 0x0c;
3345 case 0x06: /* Socket and Copy Register */
3349 printf("%s: Bad attribute space register %02x\n", __FUNCTION__, at);
3356 static void md_attr_write(void *opaque, uint32_t at, uint8_t value)
3358 struct md_s *s = (struct md_s *) opaque;
3362 case 0x00: /* Configuration Option Register */
3363 s->opt = value & 0xcf;
3364 if (value & OPT_SRESET)
3366 md_interrupt_update(s);
3368 case 0x02: /* Card Configuration Status Register */
3369 if ((s->stat ^ value) & STAT_PWRDWN)
3370 s->pins |= PINS_CRDY;
3372 s->stat |= value & 0x74;
3373 md_interrupt_update(s);
3374 /* Word 170 in Identify Device must be equal to STAT_XE */
3376 case 0x04: /* Pin Replacement Register */
3377 s->pins &= PINS_CRDY;
3378 s->pins |= value & PINS_MRDY;
3380 case 0x06: /* Socket and Copy Register */
3383 printf("%s: Bad attribute space register %02x\n", __FUNCTION__, at);
3387 static uint16_t md_common_read(void *opaque, uint32_t at)
3389 struct md_s *s = (struct md_s *) opaque;
3393 switch (s->opt & OPT_MODE) {
3395 if ((at & ~0x3ff) == 0x400)
3398 case OPT_MODE_IOMAP16:
3401 case OPT_MODE_IOMAP1:
3402 if ((at & ~0xf) == 0x3f0)
3404 else if ((at & ~0xf) == 0x1f0)
3407 case OPT_MODE_IOMAP2:
3408 if ((at & ~0xf) == 0x370)
3410 else if ((at & ~0xf) == 0x170)
3415 case 0x0: /* Even RD Data */
3417 return ide_data_readw(s->ide, 0);
3419 /* TODO: 8-bit accesses */
3423 s->io = ide_data_readw(s->ide, 0);
3426 s->cycle = !s->cycle;
3428 case 0x9: /* Odd RD Data */
3430 case 0xd: /* Error */
3431 return ide_ioport_read(s->ide, 0x1);
3432 case 0xe: /* Alternate Status */
3433 if (s->ide->cur_drive->bs)
3434 return s->ide->cur_drive->status;
3437 case 0xf: /* Device Address */
3438 return 0xc2 | ((~s->ide->select << 2) & 0x3c);
3440 return ide_ioport_read(s->ide, at);
3446 static void md_common_write(void *opaque, uint32_t at, uint16_t value)
3448 struct md_s *s = (struct md_s *) opaque;
3451 switch (s->opt & OPT_MODE) {
3453 if ((at & ~0x3ff) == 0x400)
3456 case OPT_MODE_IOMAP16:
3459 case OPT_MODE_IOMAP1:
3460 if ((at & ~0xf) == 0x3f0)
3462 else if ((at & ~0xf) == 0x1f0)
3465 case OPT_MODE_IOMAP2:
3466 if ((at & ~0xf) == 0x370)
3468 else if ((at & ~0xf) == 0x170)
3473 case 0x0: /* Even WR Data */
3475 ide_data_writew(s->ide, 0, value);
3478 /* TODO: 8-bit accesses */
3480 ide_data_writew(s->ide, 0, s->io | (value << 8));
3482 s->io = value & 0xff;
3483 s->cycle = !s->cycle;
3486 s->io = value & 0xff;
3487 s->cycle = !s->cycle;
3489 case 0xd: /* Features */
3490 ide_ioport_write(s->ide, 0x1, value);
3492 case 0xe: /* Device Control */
3494 if (value & CTRL_SRST)
3496 md_interrupt_update(s);
3499 if (s->stat & STAT_PWRDWN) {
3500 s->pins |= PINS_CRDY;
3501 s->stat &= ~STAT_PWRDWN;
3503 ide_ioport_write(s->ide, at, value);
3507 static void md_save(QEMUFile *f, void *opaque)
3509 struct md_s *s = (struct md_s *) opaque;
3511 uint8_t drive1_selected;
3513 qemu_put_8s(f, &s->opt);
3514 qemu_put_8s(f, &s->stat);
3515 qemu_put_8s(f, &s->pins);
3517 qemu_put_8s(f, &s->ctrl);
3518 qemu_put_be16s(f, &s->io);
3519 qemu_put_byte(f, s->cycle);
3521 drive1_selected = (s->ide->cur_drive != s->ide);
3522 qemu_put_8s(f, &s->ide->cmd);
3523 qemu_put_8s(f, &drive1_selected);
3525 for (i = 0; i < 2; i ++)
3526 ide_save(f, &s->ide[i]);
3529 static int md_load(QEMUFile *f, void *opaque, int version_id)
3531 struct md_s *s = (struct md_s *) opaque;
3533 uint8_t drive1_selected;
3535 qemu_get_8s(f, &s->opt);
3536 qemu_get_8s(f, &s->stat);
3537 qemu_get_8s(f, &s->pins);
3539 qemu_get_8s(f, &s->ctrl);
3540 qemu_get_be16s(f, &s->io);
3541 s->cycle = qemu_get_byte(f);
3543 qemu_get_8s(f, &s->ide->cmd);
3544 qemu_get_8s(f, &drive1_selected);
3545 s->ide->cur_drive = &s->ide[(drive1_selected != 0)];
3547 for (i = 0; i < 2; i ++)
3548 ide_load(f, &s->ide[i]);
3553 static int md_iid = 0;
3555 static const uint8_t dscm1xxxx_cis[0x14a] = {
3556 [0x000] = CISTPL_DEVICE, /* 5V Device Information */
3557 [0x002] = 0x03, /* Tuple length = 4 bytes */
3558 [0x004] = 0xdb, /* ID: DTYPE_FUNCSPEC, non WP, DSPEED_150NS */
3559 [0x006] = 0x01, /* Size = 2K bytes */
3560 [0x008] = CISTPL_ENDMARK,
3562 [0x00a] = CISTPL_DEVICE_OC, /* Additional Device Information */
3563 [0x00c] = 0x04, /* Tuple length = 4 byest */
3564 [0x00e] = 0x03, /* Conditions: Ext = 0, Vcc 3.3V, MWAIT = 1 */
3565 [0x010] = 0xdb, /* ID: DTYPE_FUNCSPEC, non WP, DSPEED_150NS */
3566 [0x012] = 0x01, /* Size = 2K bytes */
3567 [0x014] = CISTPL_ENDMARK,
3569 [0x016] = CISTPL_JEDEC_C, /* JEDEC ID */
3570 [0x018] = 0x02, /* Tuple length = 2 bytes */
3571 [0x01a] = 0xdf, /* PC Card ATA with no Vpp required */
3574 [0x01e] = CISTPL_MANFID, /* Manufacture ID */
3575 [0x020] = 0x04, /* Tuple length = 4 bytes */
3576 [0x022] = 0xa4, /* TPLMID_MANF = 00a4 (IBM) */
3578 [0x026] = 0x00, /* PLMID_CARD = 0000 */
3581 [0x02a] = CISTPL_VERS_1, /* Level 1 Version */
3582 [0x02c] = 0x12, /* Tuple length = 23 bytes */
3583 [0x02e] = 0x04, /* Major Version = JEIDA 4.2 / PCMCIA 2.1 */
3584 [0x030] = 0x01, /* Minor Version = 1 */
3600 [0x050] = CISTPL_ENDMARK,
3602 [0x052] = CISTPL_FUNCID, /* Function ID */
3603 [0x054] = 0x02, /* Tuple length = 2 bytes */
3604 [0x056] = 0x04, /* TPLFID_FUNCTION = Fixed Disk */
3605 [0x058] = 0x01, /* TPLFID_SYSINIT: POST = 1, ROM = 0 */
3607 [0x05a] = CISTPL_FUNCE, /* Function Extension */
3608 [0x05c] = 0x02, /* Tuple length = 2 bytes */
3609 [0x05e] = 0x01, /* TPLFE_TYPE = Disk Device Interface */
3610 [0x060] = 0x01, /* TPLFE_DATA = PC Card ATA Interface */
3612 [0x062] = CISTPL_FUNCE, /* Function Extension */
3613 [0x064] = 0x03, /* Tuple length = 3 bytes */
3614 [0x066] = 0x02, /* TPLFE_TYPE = Basic PC Card ATA Interface */
3615 [0x068] = 0x08, /* TPLFE_DATA: Rotating, Unique, Single */
3616 [0x06a] = 0x0f, /* TPLFE_DATA: Sleep, Standby, Idle, Auto */
3618 [0x06c] = CISTPL_CONFIG, /* Configuration */
3619 [0x06e] = 0x05, /* Tuple length = 5 bytes */
3620 [0x070] = 0x01, /* TPCC_RASZ = 2 bytes, TPCC_RMSZ = 1 byte */
3621 [0x072] = 0x07, /* TPCC_LAST = 7 */
3622 [0x074] = 0x00, /* TPCC_RADR = 0200 */
3624 [0x078] = 0x0f, /* TPCC_RMSK = 200, 202, 204, 206 */
3626 [0x07a] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
3627 [0x07c] = 0x0b, /* Tuple length = 11 bytes */
3628 [0x07e] = 0xc0, /* TPCE_INDX = Memory Mode, Default, Iface */
3629 [0x080] = 0xc0, /* TPCE_IF = Memory, no BVDs, no WP, READY */
3630 [0x082] = 0xa1, /* TPCE_FS = Vcc only, no I/O, Memory, Misc */
3631 [0x084] = 0x27, /* NomV = 1, MinV = 1, MaxV = 1, Peakl = 1 */
3632 [0x086] = 0x55, /* NomV: 5.0 V */
3633 [0x088] = 0x4d, /* MinV: 4.5 V */
3634 [0x08a] = 0x5d, /* MaxV: 5.5 V */
3635 [0x08c] = 0x4e, /* Peakl: 450 mA */
3636 [0x08e] = 0x08, /* TPCE_MS = 1 window, 1 byte, Host address */
3637 [0x090] = 0x00, /* Window descriptor: Window length = 0 */
3638 [0x092] = 0x20, /* TPCE_MI: support power down mode, RW */
3640 [0x094] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
3641 [0x096] = 0x06, /* Tuple length = 6 bytes */
3642 [0x098] = 0x00, /* TPCE_INDX = Memory Mode, no Default */
3643 [0x09a] = 0x01, /* TPCE_FS = Vcc only, no I/O, no Memory */
3644 [0x09c] = 0x21, /* NomV = 1, MinV = 0, MaxV = 0, Peakl = 1 */
3645 [0x09e] = 0xb5, /* NomV: 3.3 V */
3647 [0x0a2] = 0x3e, /* Peakl: 350 mA */
3649 [0x0a4] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
3650 [0x0a6] = 0x0d, /* Tuple length = 13 bytes */
3651 [0x0a8] = 0xc1, /* TPCE_INDX = I/O and Memory Mode, Default */
3652 [0x0aa] = 0x41, /* TPCE_IF = I/O and Memory, no BVD, no WP */
3653 [0x0ac] = 0x99, /* TPCE_FS = Vcc only, I/O, Interrupt, Misc */
3654 [0x0ae] = 0x27, /* NomV = 1, MinV = 1, MaxV = 1, Peakl = 1 */
3655 [0x0b0] = 0x55, /* NomV: 5.0 V */
3656 [0x0b2] = 0x4d, /* MinV: 4.5 V */
3657 [0x0b4] = 0x5d, /* MaxV: 5.5 V */
3658 [0x0b6] = 0x4e, /* Peakl: 450 mA */
3659 [0x0b8] = 0x64, /* TPCE_IO = 16-byte boundary, 16/8 accesses */
3660 [0x0ba] = 0xf0, /* TPCE_IR = MASK, Level, Pulse, Share */
3661 [0x0bc] = 0xff, /* IRQ0..IRQ7 supported */
3662 [0x0be] = 0xff, /* IRQ8..IRQ15 supported */
3663 [0x0c0] = 0x20, /* TPCE_MI = support power down mode */
3665 [0x0c2] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
3666 [0x0c4] = 0x06, /* Tuple length = 6 bytes */
3667 [0x0c6] = 0x01, /* TPCE_INDX = I/O and Memory Mode */
3668 [0x0c8] = 0x01, /* TPCE_FS = Vcc only, no I/O, no Memory */
3669 [0x0ca] = 0x21, /* NomV = 1, MinV = 0, MaxV = 0, Peakl = 1 */
3670 [0x0cc] = 0xb5, /* NomV: 3.3 V */
3672 [0x0d0] = 0x3e, /* Peakl: 350 mA */
3674 [0x0d2] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
3675 [0x0d4] = 0x12, /* Tuple length = 18 bytes */
3676 [0x0d6] = 0xc2, /* TPCE_INDX = I/O Primary Mode */
3677 [0x0d8] = 0x41, /* TPCE_IF = I/O and Memory, no BVD, no WP */
3678 [0x0da] = 0x99, /* TPCE_FS = Vcc only, I/O, Interrupt, Misc */
3679 [0x0dc] = 0x27, /* NomV = 1, MinV = 1, MaxV = 1, Peakl = 1 */
3680 [0x0de] = 0x55, /* NomV: 5.0 V */
3681 [0x0e0] = 0x4d, /* MinV: 4.5 V */
3682 [0x0e2] = 0x5d, /* MaxV: 5.5 V */
3683 [0x0e4] = 0x4e, /* Peakl: 450 mA */
3684 [0x0e6] = 0xea, /* TPCE_IO = 1K boundary, 16/8 access, Range */
3685 [0x0e8] = 0x61, /* Range: 2 fields, 2 bytes addr, 1 byte len */
3686 [0x0ea] = 0xf0, /* Field 1 address = 0x01f0 */
3688 [0x0ee] = 0x07, /* Address block length = 8 */
3689 [0x0f0] = 0xf6, /* Field 2 address = 0x03f6 */
3691 [0x0f4] = 0x01, /* Address block length = 2 */
3692 [0x0f6] = 0xee, /* TPCE_IR = IRQ E, Level, Pulse, Share */
3693 [0x0f8] = 0x20, /* TPCE_MI = support power down mode */
3695 [0x0fa] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
3696 [0x0fc] = 0x06, /* Tuple length = 6 bytes */
3697 [0x0fe] = 0x02, /* TPCE_INDX = I/O Primary Mode, no Default */
3698 [0x100] = 0x01, /* TPCE_FS = Vcc only, no I/O, no Memory */
3699 [0x102] = 0x21, /* NomV = 1, MinV = 0, MaxV = 0, Peakl = 1 */
3700 [0x104] = 0xb5, /* NomV: 3.3 V */
3702 [0x108] = 0x3e, /* Peakl: 350 mA */
3704 [0x10a] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
3705 [0x10c] = 0x12, /* Tuple length = 18 bytes */
3706 [0x10e] = 0xc3, /* TPCE_INDX = I/O Secondary Mode, Default */
3707 [0x110] = 0x41, /* TPCE_IF = I/O and Memory, no BVD, no WP */
3708 [0x112] = 0x99, /* TPCE_FS = Vcc only, I/O, Interrupt, Misc */
3709 [0x114] = 0x27, /* NomV = 1, MinV = 1, MaxV = 1, Peakl = 1 */
3710 [0x116] = 0x55, /* NomV: 5.0 V */
3711 [0x118] = 0x4d, /* MinV: 4.5 V */
3712 [0x11a] = 0x5d, /* MaxV: 5.5 V */
3713 [0x11c] = 0x4e, /* Peakl: 450 mA */
3714 [0x11e] = 0xea, /* TPCE_IO = 1K boundary, 16/8 access, Range */
3715 [0x120] = 0x61, /* Range: 2 fields, 2 byte addr, 1 byte len */
3716 [0x122] = 0x70, /* Field 1 address = 0x0170 */
3718 [0x126] = 0x07, /* Address block length = 8 */
3719 [0x128] = 0x76, /* Field 2 address = 0x0376 */
3721 [0x12c] = 0x01, /* Address block length = 2 */
3722 [0x12e] = 0xee, /* TPCE_IR = IRQ E, Level, Pulse, Share */
3723 [0x130] = 0x20, /* TPCE_MI = support power down mode */
3725 [0x132] = CISTPL_CFTABLE_ENTRY, /* 16-bit PC Card Configuration */
3726 [0x134] = 0x06, /* Tuple length = 6 bytes */
3727 [0x136] = 0x03, /* TPCE_INDX = I/O Secondary Mode */
3728 [0x138] = 0x01, /* TPCE_FS = Vcc only, no I/O, no Memory */
3729 [0x13a] = 0x21, /* NomV = 1, MinV = 0, MaxV = 0, Peakl = 1 */
3730 [0x13c] = 0xb5, /* NomV: 3.3 V */
3732 [0x140] = 0x3e, /* Peakl: 350 mA */
3734 [0x142] = CISTPL_NO_LINK, /* No Link */
3735 [0x144] = 0x00, /* Tuple length = 0 bytes */
3737 [0x146] = CISTPL_END, /* Tuple End */
3740 static int dscm1xxxx_attach(void *opaque)
3742 struct md_s *md = (struct md_s *) opaque;
3743 md->card.attr_read = md_attr_read;
3744 md->card.attr_write = md_attr_write;
3745 md->card.common_read = md_common_read;
3746 md->card.common_write = md_common_write;
3747 md->card.io_read = md_common_read;
3748 md->card.io_write = md_common_write;
3750 md->attr_base = md->card.cis[0x74] | (md->card.cis[0x76] << 8);
3754 md_interrupt_update(md);
3756 md->card.slot->card_string = "DSCM-1xxxx Hitachi Microdrive";
3760 static int dscm1xxxx_detach(void *opaque)
3762 struct md_s *md = (struct md_s *) opaque;
3767 struct pcmcia_card_s *dscm1xxxx_init(BlockDriverState *bdrv)
3769 struct md_s *md = (struct md_s *) qemu_mallocz(sizeof(struct md_s));
3770 md->card.state = md;
3771 md->card.attach = dscm1xxxx_attach;
3772 md->card.detach = dscm1xxxx_detach;
3773 md->card.cis = dscm1xxxx_cis;
3774 md->card.cis_len = sizeof(dscm1xxxx_cis);
3776 ide_init2(md->ide, bdrv, 0, qemu_allocate_irqs(md_set_irq, md, 1)[0]);
3778 md->ide->mdata_size = METADATA_SIZE;
3779 md->ide->mdata_storage = (uint8_t *) qemu_mallocz(METADATA_SIZE);
3781 register_savevm("microdrive", md_iid ++, 0, md_save, md_load, md);