2 * QEMU IDE disk and CD-ROM Emulator
4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 /* debug IDE devices */
28 //#define DEBUG_IDE_ATAPI
30 /* Bits of HD_STATUS */
32 #define INDEX_STAT 0x02
33 #define ECC_STAT 0x04 /* Corrected error */
35 #define SEEK_STAT 0x10
37 #define WRERR_STAT 0x20
38 #define READY_STAT 0x40
39 #define BUSY_STAT 0x80
41 /* Bits for HD_ERROR */
42 #define MARK_ERR 0x01 /* Bad address mark */
43 #define TRK0_ERR 0x02 /* couldn't find track 0 */
44 #define ABRT_ERR 0x04 /* Command aborted */
45 #define MCR_ERR 0x08 /* media change request */
46 #define ID_ERR 0x10 /* ID field not found */
47 #define MC_ERR 0x20 /* media changed */
48 #define ECC_ERR 0x40 /* Uncorrectable ECC error */
49 #define BBD_ERR 0x80 /* pre-EIDE meaning: block marked bad */
50 #define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */
52 /* Bits of HD_NSECTOR */
58 #define IDE_CMD_RESET 0x04
59 #define IDE_CMD_DISABLE_IRQ 0x02
61 /* ATA/ATAPI Commands pre T13 Spec */
66 #define CFA_REQ_EXT_ERROR_CODE 0x03 /* CFA Request Extended Error Code */
70 #define WIN_SRST 0x08 /* ATAPI soft reset command */
71 #define WIN_DEVICE_RESET 0x08
75 #define WIN_RECAL 0x10
76 #define WIN_RESTORE WIN_RECAL
80 #define WIN_READ 0x20 /* 28-Bit */
81 #define WIN_READ_ONCE 0x21 /* 28-Bit without retries */
82 #define WIN_READ_LONG 0x22 /* 28-Bit */
83 #define WIN_READ_LONG_ONCE 0x23 /* 28-Bit without retries */
84 #define WIN_READ_EXT 0x24 /* 48-Bit */
85 #define WIN_READDMA_EXT 0x25 /* 48-Bit */
86 #define WIN_READDMA_QUEUED_EXT 0x26 /* 48-Bit */
87 #define WIN_READ_NATIVE_MAX_EXT 0x27 /* 48-Bit */
91 #define WIN_MULTREAD_EXT 0x29 /* 48-Bit */
95 #define WIN_WRITE 0x30 /* 28-Bit */
96 #define WIN_WRITE_ONCE 0x31 /* 28-Bit without retries */
97 #define WIN_WRITE_LONG 0x32 /* 28-Bit */
98 #define WIN_WRITE_LONG_ONCE 0x33 /* 28-Bit without retries */
99 #define WIN_WRITE_EXT 0x34 /* 48-Bit */
100 #define WIN_WRITEDMA_EXT 0x35 /* 48-Bit */
101 #define WIN_WRITEDMA_QUEUED_EXT 0x36 /* 48-Bit */
102 #define WIN_SET_MAX_EXT 0x37 /* 48-Bit */
103 #define CFA_WRITE_SECT_WO_ERASE 0x38 /* CFA Write Sectors without erase */
104 #define WIN_MULTWRITE_EXT 0x39 /* 48-Bit */
106 * 0x3A->0x3B Reserved
108 #define WIN_WRITE_VERIFY 0x3C /* 28-Bit */
110 * 0x3D->0x3F Reserved
112 #define WIN_VERIFY 0x40 /* 28-Bit - Read Verify Sectors */
113 #define WIN_VERIFY_ONCE 0x41 /* 28-Bit - without retries */
114 #define WIN_VERIFY_EXT 0x42 /* 48-Bit */
116 * 0x43->0x4F Reserved
118 #define WIN_FORMAT 0x50
120 * 0x51->0x5F Reserved
122 #define WIN_INIT 0x60
124 * 0x61->0x5F Reserved
126 #define WIN_SEEK 0x70 /* 0x70-0x7F Reserved */
127 #define CFA_TRANSLATE_SECTOR 0x87 /* CFA Translate Sector */
128 #define WIN_DIAGNOSE 0x90
129 #define WIN_SPECIFY 0x91 /* set drive geometry translation */
130 #define WIN_DOWNLOAD_MICROCODE 0x92
131 #define WIN_STANDBYNOW2 0x94
132 #define WIN_STANDBY2 0x96
133 #define WIN_SETIDLE2 0x97
134 #define WIN_CHECKPOWERMODE2 0x98
135 #define WIN_SLEEPNOW2 0x99
139 #define WIN_PACKETCMD 0xA0 /* Send a packet command. */
140 #define WIN_PIDENTIFY 0xA1 /* identify ATAPI device */
141 #define WIN_QUEUED_SERVICE 0xA2
142 #define WIN_SMART 0xB0 /* self-monitoring and reporting */
143 #define CFA_ERASE_SECTORS 0xC0
144 #define WIN_MULTREAD 0xC4 /* read sectors using multiple mode*/
145 #define WIN_MULTWRITE 0xC5 /* write sectors using multiple mode */
146 #define WIN_SETMULT 0xC6 /* enable/disable multiple mode */
147 #define WIN_READDMA_QUEUED 0xC7 /* read sectors using Queued DMA transfers */
148 #define WIN_READDMA 0xC8 /* read sectors using DMA transfers */
149 #define WIN_READDMA_ONCE 0xC9 /* 28-Bit - without retries */
150 #define WIN_WRITEDMA 0xCA /* write sectors using DMA transfers */
151 #define WIN_WRITEDMA_ONCE 0xCB /* 28-Bit - without retries */
152 #define WIN_WRITEDMA_QUEUED 0xCC /* write sectors using Queued DMA transfers */
153 #define CFA_WRITE_MULTI_WO_ERASE 0xCD /* CFA Write multiple without erase */
154 #define WIN_GETMEDIASTATUS 0xDA
155 #define WIN_ACKMEDIACHANGE 0xDB /* ATA-1, ATA-2 vendor */
156 #define WIN_POSTBOOT 0xDC
157 #define WIN_PREBOOT 0xDD
158 #define WIN_DOORLOCK 0xDE /* lock door on removable drives */
159 #define WIN_DOORUNLOCK 0xDF /* unlock door on removable drives */
160 #define WIN_STANDBYNOW1 0xE0
161 #define WIN_IDLEIMMEDIATE 0xE1 /* force drive to become "ready" */
162 #define WIN_STANDBY 0xE2 /* Set device in Standby Mode */
163 #define WIN_SETIDLE1 0xE3
164 #define WIN_READ_BUFFER 0xE4 /* force read only 1 sector */
165 #define WIN_CHECKPOWERMODE1 0xE5
166 #define WIN_SLEEPNOW1 0xE6
167 #define WIN_FLUSH_CACHE 0xE7
168 #define WIN_WRITE_BUFFER 0xE8 /* force write only 1 sector */
169 #define WIN_WRITE_SAME 0xE9 /* read ata-2 to use */
170 /* SET_FEATURES 0x22 or 0xDD */
171 #define WIN_FLUSH_CACHE_EXT 0xEA /* 48-Bit */
172 #define WIN_IDENTIFY 0xEC /* ask drive to identify itself */
173 #define WIN_MEDIAEJECT 0xED
174 #define WIN_IDENTIFY_DMA 0xEE /* same as WIN_IDENTIFY, but DMA */
175 #define WIN_SETFEATURES 0xEF /* set special drive features */
176 #define EXABYTE_ENABLE_NEST 0xF0
177 #define WIN_SECURITY_SET_PASS 0xF1
178 #define WIN_SECURITY_UNLOCK 0xF2
179 #define WIN_SECURITY_ERASE_PREPARE 0xF3
180 #define WIN_SECURITY_ERASE_UNIT 0xF4
181 #define WIN_SECURITY_FREEZE_LOCK 0xF5
182 #define WIN_SECURITY_DISABLE 0xF6
183 #define WIN_READ_NATIVE_MAX 0xF8 /* return the native maximum address */
184 #define WIN_SET_MAX 0xF9
185 #define DISABLE_SEAGATE 0xFB
187 /* set to 1 set disable mult support */
188 #define MAX_MULT_SECTORS 16
192 #define ATAPI_PACKET_SIZE 12
194 /* The generic packet command opcodes for CD/DVD Logical Units,
195 * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
196 #define GPCMD_BLANK 0xa1
197 #define GPCMD_CLOSE_TRACK 0x5b
198 #define GPCMD_FLUSH_CACHE 0x35
199 #define GPCMD_FORMAT_UNIT 0x04
200 #define GPCMD_GET_CONFIGURATION 0x46
201 #define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
202 #define GPCMD_GET_PERFORMANCE 0xac
203 #define GPCMD_INQUIRY 0x12
204 #define GPCMD_LOAD_UNLOAD 0xa6
205 #define GPCMD_MECHANISM_STATUS 0xbd
206 #define GPCMD_MODE_SELECT_10 0x55
207 #define GPCMD_MODE_SENSE_10 0x5a
208 #define GPCMD_PAUSE_RESUME 0x4b
209 #define GPCMD_PLAY_AUDIO_10 0x45
210 #define GPCMD_PLAY_AUDIO_MSF 0x47
211 #define GPCMD_PLAY_AUDIO_TI 0x48
212 #define GPCMD_PLAY_CD 0xbc
213 #define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1e
214 #define GPCMD_READ_10 0x28
215 #define GPCMD_READ_12 0xa8
216 #define GPCMD_READ_CDVD_CAPACITY 0x25
217 #define GPCMD_READ_CD 0xbe
218 #define GPCMD_READ_CD_MSF 0xb9
219 #define GPCMD_READ_DISC_INFO 0x51
220 #define GPCMD_READ_DVD_STRUCTURE 0xad
221 #define GPCMD_READ_FORMAT_CAPACITIES 0x23
222 #define GPCMD_READ_HEADER 0x44
223 #define GPCMD_READ_TRACK_RZONE_INFO 0x52
224 #define GPCMD_READ_SUBCHANNEL 0x42
225 #define GPCMD_READ_TOC_PMA_ATIP 0x43
226 #define GPCMD_REPAIR_RZONE_TRACK 0x58
227 #define GPCMD_REPORT_KEY 0xa4
228 #define GPCMD_REQUEST_SENSE 0x03
229 #define GPCMD_RESERVE_RZONE_TRACK 0x53
230 #define GPCMD_SCAN 0xba
231 #define GPCMD_SEEK 0x2b
232 #define GPCMD_SEND_DVD_STRUCTURE 0xad
233 #define GPCMD_SEND_EVENT 0xa2
234 #define GPCMD_SEND_KEY 0xa3
235 #define GPCMD_SEND_OPC 0x54
236 #define GPCMD_SET_READ_AHEAD 0xa7
237 #define GPCMD_SET_STREAMING 0xb6
238 #define GPCMD_START_STOP_UNIT 0x1b
239 #define GPCMD_STOP_PLAY_SCAN 0x4e
240 #define GPCMD_TEST_UNIT_READY 0x00
241 #define GPCMD_VERIFY_10 0x2f
242 #define GPCMD_WRITE_10 0x2a
243 #define GPCMD_WRITE_AND_VERIFY_10 0x2e
244 /* This is listed as optional in ATAPI 2.6, but is (curiously)
245 * missing from Mt. Fuji, Table 57. It _is_ mentioned in Mt. Fuji
246 * Table 377 as an MMC command for SCSi devices though... Most ATAPI
247 * drives support it. */
248 #define GPCMD_SET_SPEED 0xbb
249 /* This seems to be a SCSI specific CD-ROM opcode
250 * to play data at track/index */
251 #define GPCMD_PLAYAUDIO_TI 0x48
253 * From MS Media Status Notification Support Specification. For
256 #define GPCMD_GET_MEDIA_STATUS 0xda
258 /* Mode page codes for mode sense/set */
259 #define GPMODE_R_W_ERROR_PAGE 0x01
260 #define GPMODE_WRITE_PARMS_PAGE 0x05
261 #define GPMODE_AUDIO_CTL_PAGE 0x0e
262 #define GPMODE_POWER_PAGE 0x1a
263 #define GPMODE_FAULT_FAIL_PAGE 0x1c
264 #define GPMODE_TO_PROTECT_PAGE 0x1d
265 #define GPMODE_CAPABILITIES_PAGE 0x2a
266 #define GPMODE_ALL_PAGES 0x3f
267 /* Not in Mt. Fuji, but in ATAPI 2.6 -- depricated now in favor
268 * of MODE_SENSE_POWER_PAGE */
269 #define GPMODE_CDROM_PAGE 0x0d
271 #define ATAPI_INT_REASON_CD 0x01 /* 0 = data transfer */
272 #define ATAPI_INT_REASON_IO 0x02 /* 1 = transfer to the host */
273 #define ATAPI_INT_REASON_REL 0x04
274 #define ATAPI_INT_REASON_TAG 0xf8
276 /* same constants as bochs */
277 #define ASC_ILLEGAL_OPCODE 0x20
278 #define ASC_LOGICAL_BLOCK_OOR 0x21
279 #define ASC_INV_FIELD_IN_CMD_PACKET 0x24
280 #define ASC_MEDIUM_NOT_PRESENT 0x3a
281 #define ASC_SAVING_PARAMETERS_NOT_SUPPORTED 0x39
284 #define SENSE_NOT_READY 2
285 #define SENSE_ILLEGAL_REQUEST 5
286 #define SENSE_UNIT_ATTENTION 6
290 typedef void EndTransferFunc(struct IDEState *);
292 /* NOTE: IDEState represents in fact one drive */
293 typedef struct IDEState {
296 int cylinders, heads, sectors;
302 struct BMDMAState *bmdma;
307 uint16_t nsector; /* 0 is 256 to ease computations */
313 /* 0x3f6 command, only meaningful for drive 0 */
315 /* depends on bit 4 in select, only meaningful for drive 0 */
316 struct IDEState *cur_drive;
317 BlockDriverState *bs;
321 int packet_transfer_size;
322 int elementary_transfer_size;
326 int atapi_dma; /* true if dma is requested for the packet cmd */
329 /* PIO transfer handling */
330 int req_nb_sectors; /* number of sectors per interrupt */
331 EndTransferFunc *end_transfer_func;
334 uint8_t io_buffer[MAX_MULT_SECTORS*512 + 4];
335 QEMUTimer *sector_write_timer; /* only used for win2k instal hack */
338 #define BM_STATUS_DMAING 0x01
339 #define BM_STATUS_ERROR 0x02
340 #define BM_STATUS_INT 0x04
342 #define BM_CMD_START 0x01
343 #define BM_CMD_READ 0x08
345 typedef int IDEDMAFunc(IDEState *s,
346 target_phys_addr_t phys_addr,
349 typedef struct BMDMAState {
353 /* current transfer state */
358 typedef struct PCIIDEState {
364 static void ide_dma_start(IDEState *s, IDEDMAFunc *dma_cb);
366 static void padstr(char *str, const char *src, int len)
369 for(i = 0; i < len; i++) {
374 *(char *)((long)str ^ 1) = v;
379 static void padstr8(uint8_t *buf, int buf_size, const char *src)
382 for(i = 0; i < buf_size; i++) {
390 static void put_le16(uint16_t *p, unsigned int v)
395 static void ide_identify(IDEState *s)
398 unsigned int oldsize;
401 memset(s->io_buffer, 0, 512);
402 p = (uint16_t *)s->io_buffer;
403 put_le16(p + 0, 0x0040);
404 put_le16(p + 1, s->cylinders);
405 put_le16(p + 3, s->heads);
406 put_le16(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */
407 put_le16(p + 5, 512); /* XXX: retired, remove ? */
408 put_le16(p + 6, s->sectors);
409 snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
410 padstr((uint8_t *)(p + 10), buf, 20); /* serial number */
411 put_le16(p + 20, 3); /* XXX: retired, remove ? */
412 put_le16(p + 21, 512); /* cache size in sectors */
413 put_le16(p + 22, 4); /* ecc bytes */
414 padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */
415 padstr((uint8_t *)(p + 27), "QEMU HARDDISK", 40); /* model */
416 #if MAX_MULT_SECTORS > 1
417 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
419 put_le16(p + 48, 1); /* dword I/O */
420 put_le16(p + 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
421 put_le16(p + 51, 0x200); /* PIO transfer cycle */
422 put_le16(p + 52, 0x200); /* DMA transfer cycle */
423 put_le16(p + 53, 1 | 1 << 2); /* words 54-58,88 are valid */
424 put_le16(p + 54, s->cylinders);
425 put_le16(p + 55, s->heads);
426 put_le16(p + 56, s->sectors);
427 oldsize = s->cylinders * s->heads * s->sectors;
428 put_le16(p + 57, oldsize);
429 put_le16(p + 58, oldsize >> 16);
431 put_le16(p + 59, 0x100 | s->mult_sectors);
432 put_le16(p + 60, s->nb_sectors);
433 put_le16(p + 61, s->nb_sectors >> 16);
434 put_le16(p + 80, (1 << 1) | (1 << 2));
435 put_le16(p + 82, (1 << 14));
436 put_le16(p + 83, (1 << 14));
437 put_le16(p + 84, (1 << 14));
438 put_le16(p + 85, (1 << 14));
440 put_le16(p + 87, (1 << 14));
441 put_le16(p + 88, 0x1f | (1 << 13));
442 put_le16(p + 93, 1 | (1 << 14) | 0x2000 | 0x4000);
445 static void ide_atapi_identify(IDEState *s)
450 memset(s->io_buffer, 0, 512);
451 p = (uint16_t *)s->io_buffer;
452 /* Removable CDROM, 50us response, 12 byte packets */
453 put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
454 snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
455 padstr((uint8_t *)(p + 10), buf, 20); /* serial number */
456 put_le16(p + 20, 3); /* buffer type */
457 put_le16(p + 21, 512); /* cache size in sectors */
458 put_le16(p + 22, 4); /* ecc bytes */
459 padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */
460 padstr((uint8_t *)(p + 27), "QEMU CD-ROM", 40); /* model */
461 put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
462 put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
463 put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
464 put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
465 put_le16(p + 64, 1); /* PIO modes */
466 put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
467 put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
468 put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
469 put_le16(p + 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
471 put_le16(p + 71, 30); /* in ns */
472 put_le16(p + 72, 30); /* in ns */
474 put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */
477 static void ide_set_signature(IDEState *s)
479 s->select &= 0xf0; /* clear head */
495 static inline void ide_abort_command(IDEState *s)
497 s->status = READY_STAT | ERR_STAT;
501 static inline void ide_set_irq(IDEState *s)
503 BMDMAState *bm = s->bmdma;
504 if (!(s->cmd & IDE_CMD_DISABLE_IRQ)) {
506 bm->status |= BM_STATUS_INT;
509 openpic_set_irq(s->openpic, s->irq, 1);
513 pci_set_irq(s->pci_dev, 0, 1);
515 pic_set_irq(s->irq, 1);
519 /* prepare data transfer and tell what to do after */
520 static void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
521 EndTransferFunc *end_transfer_func)
523 s->end_transfer_func = end_transfer_func;
525 s->data_end = buf + size;
526 s->status |= DRQ_STAT;
529 static void ide_transfer_stop(IDEState *s)
531 s->end_transfer_func = ide_transfer_stop;
532 s->data_ptr = s->io_buffer;
533 s->data_end = s->io_buffer;
534 s->status &= ~DRQ_STAT;
537 static int64_t ide_get_sector(IDEState *s)
540 if (s->select & 0x40) {
542 sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) |
543 (s->lcyl << 8) | s->sector;
545 sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors +
546 (s->select & 0x0f) * s->sectors +
552 static void ide_set_sector(IDEState *s, int64_t sector_num)
555 if (s->select & 0x40) {
556 s->select = (s->select & 0xf0) | (sector_num >> 24);
557 s->hcyl = (sector_num >> 16);
558 s->lcyl = (sector_num >> 8);
559 s->sector = (sector_num);
561 cyl = sector_num / (s->heads * s->sectors);
562 r = sector_num % (s->heads * s->sectors);
565 s->select = (s->select & 0xf0) | ((r / s->sectors) & 0x0f);
566 s->sector = (r % s->sectors) + 1;
570 static void ide_sector_read(IDEState *s)
575 s->status = READY_STAT | SEEK_STAT;
576 s->error = 0; /* not needed by IDE spec, but needed by Windows */
577 sector_num = ide_get_sector(s);
580 /* no more sector to read from disk */
581 ide_transfer_stop(s);
583 #if defined(DEBUG_IDE)
584 printf("read sector=%Ld\n", sector_num);
586 if (n > s->req_nb_sectors)
587 n = s->req_nb_sectors;
588 ret = bdrv_read(s->bs, sector_num, s->io_buffer, n);
589 ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_read);
591 ide_set_sector(s, sector_num + n);
596 static int ide_read_dma_cb(IDEState *s,
597 target_phys_addr_t phys_addr,
600 int len, transfer_size, n;
603 transfer_size = transfer_size1;
604 while (transfer_size > 0) {
605 len = s->io_buffer_size - s->io_buffer_index;
607 /* transfert next data */
611 if (n > MAX_MULT_SECTORS)
612 n = MAX_MULT_SECTORS;
613 sector_num = ide_get_sector(s);
614 bdrv_read(s->bs, sector_num, s->io_buffer, n);
615 s->io_buffer_index = 0;
616 s->io_buffer_size = n * 512;
617 len = s->io_buffer_size;
619 ide_set_sector(s, sector_num);
622 if (len > transfer_size)
624 cpu_physical_memory_write(phys_addr,
625 s->io_buffer + s->io_buffer_index, len);
626 s->io_buffer_index += len;
627 transfer_size -= len;
630 if (s->io_buffer_index >= s->io_buffer_size && s->nsector == 0) {
631 s->status = READY_STAT | SEEK_STAT;
633 #ifdef DEBUG_IDE_ATAPI
634 printf("dma status=0x%x\n", s->status);
638 return transfer_size1 - transfer_size;
641 static void ide_sector_read_dma(IDEState *s)
643 s->status = READY_STAT | SEEK_STAT | DRQ_STAT;
644 s->io_buffer_index = 0;
645 s->io_buffer_size = 0;
646 ide_dma_start(s, ide_read_dma_cb);
649 static void ide_sector_write_timer_cb(void *opaque)
651 IDEState *s = opaque;
655 static void ide_sector_write(IDEState *s)
660 s->status = READY_STAT | SEEK_STAT;
661 sector_num = ide_get_sector(s);
662 #if defined(DEBUG_IDE)
663 printf("write sector=%Ld\n", sector_num);
666 if (n > s->req_nb_sectors)
667 n = s->req_nb_sectors;
668 ret = bdrv_write(s->bs, sector_num, s->io_buffer, n);
670 if (s->nsector == 0) {
671 /* no more sector to write */
672 ide_transfer_stop(s);
675 if (n1 > s->req_nb_sectors)
676 n1 = s->req_nb_sectors;
677 ide_transfer_start(s, s->io_buffer, 512 * n1, ide_sector_write);
679 ide_set_sector(s, sector_num + n);
682 if (win2k_install_hack) {
683 /* It seems there is a bug in the Windows 2000 installer HDD
684 IDE driver which fills the disk with empty logs when the
685 IDE write IRQ comes too early. This hack tries to correct
686 that at the expense of slower write performances. Use this
687 option _only_ to install Windows 2000. You must disable it
689 qemu_mod_timer(s->sector_write_timer,
690 qemu_get_clock(vm_clock) + (ticks_per_sec / 1000));
698 static int ide_write_dma_cb(IDEState *s,
699 target_phys_addr_t phys_addr,
702 int len, transfer_size, n;
705 transfer_size = transfer_size1;
707 len = s->io_buffer_size - s->io_buffer_index;
709 n = s->io_buffer_size >> 9;
710 sector_num = ide_get_sector(s);
711 bdrv_write(s->bs, sector_num, s->io_buffer,
712 s->io_buffer_size >> 9);
714 ide_set_sector(s, sector_num);
718 /* end of transfer */
719 s->status = READY_STAT | SEEK_STAT;
723 if (n > MAX_MULT_SECTORS)
724 n = MAX_MULT_SECTORS;
725 s->io_buffer_index = 0;
726 s->io_buffer_size = n * 512;
727 len = s->io_buffer_size;
729 if (transfer_size <= 0)
731 if (len > transfer_size)
733 cpu_physical_memory_read(phys_addr,
734 s->io_buffer + s->io_buffer_index, len);
735 s->io_buffer_index += len;
736 transfer_size -= len;
739 return transfer_size1 - transfer_size;
742 static void ide_sector_write_dma(IDEState *s)
745 s->status = READY_STAT | SEEK_STAT | DRQ_STAT;
747 if (n > MAX_MULT_SECTORS)
748 n = MAX_MULT_SECTORS;
749 s->io_buffer_index = 0;
750 s->io_buffer_size = n * 512;
751 ide_dma_start(s, ide_write_dma_cb);
754 static void ide_atapi_cmd_ok(IDEState *s)
757 s->status = READY_STAT;
758 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
762 static void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc)
764 #ifdef DEBUG_IDE_ATAPI
765 printf("atapi_cmd_error: sense=0x%x asc=0x%x\n", sense_key, asc);
767 s->error = sense_key << 4;
768 s->status = READY_STAT | ERR_STAT;
769 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
770 s->sense_key = sense_key;
775 static inline void cpu_to_ube16(uint8_t *buf, int val)
781 static inline void cpu_to_ube32(uint8_t *buf, unsigned int val)
789 static inline int ube16_to_cpu(const uint8_t *buf)
791 return (buf[0] << 8) | buf[1];
794 static inline int ube32_to_cpu(const uint8_t *buf)
796 return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
799 static void lba_to_msf(uint8_t *buf, int lba)
802 buf[0] = (lba / 75) / 60;
803 buf[1] = (lba / 75) % 60;
807 static void cd_read_sector(BlockDriverState *bs, int lba, uint8_t *buf,
810 switch(sector_size) {
812 bdrv_read(bs, (int64_t)lba << 2, buf, 4);
817 memset(buf + 1, 0xff, 11);
820 lba_to_msf(buf, lba);
821 buf[3] = 0x01; /* mode 1 data */
824 bdrv_read(bs, (int64_t)lba << 2, buf, 4);
834 /* The whole ATAPI transfer logic is handled in this function */
835 static void ide_atapi_cmd_reply_end(IDEState *s)
837 int byte_count_limit, size;
838 #ifdef DEBUG_IDE_ATAPI
839 printf("reply: tx_size=%d elem_tx_size=%d index=%d\n",
840 s->packet_transfer_size,
841 s->elementary_transfer_size,
844 if (s->packet_transfer_size <= 0) {
845 /* end of transfer */
846 ide_transfer_stop(s);
847 s->status = READY_STAT;
848 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
850 #ifdef DEBUG_IDE_ATAPI
851 printf("status=0x%x\n", s->status);
854 /* see if a new sector must be read */
855 if (s->lba != -1 && s->io_buffer_index >= s->cd_sector_size) {
856 cd_read_sector(s->bs, s->lba, s->io_buffer, s->cd_sector_size);
858 s->io_buffer_index = 0;
860 if (s->elementary_transfer_size > 0) {
861 /* there are some data left to transmit in this elementary
863 size = s->cd_sector_size - s->io_buffer_index;
864 if (size > s->elementary_transfer_size)
865 size = s->elementary_transfer_size;
866 ide_transfer_start(s, s->io_buffer + s->io_buffer_index,
867 size, ide_atapi_cmd_reply_end);
868 s->packet_transfer_size -= size;
869 s->elementary_transfer_size -= size;
870 s->io_buffer_index += size;
872 /* a new transfer is needed */
873 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO;
874 byte_count_limit = s->lcyl | (s->hcyl << 8);
875 #ifdef DEBUG_IDE_ATAPI
876 printf("byte_count_limit=%d\n", byte_count_limit);
878 if (byte_count_limit == 0xffff)
880 size = s->packet_transfer_size;
881 if (size > byte_count_limit) {
882 /* byte count limit must be even if this case */
883 if (byte_count_limit & 1)
885 size = byte_count_limit;
889 s->elementary_transfer_size = size;
890 /* we cannot transmit more than one sector at a time */
892 if (size > (s->cd_sector_size - s->io_buffer_index))
893 size = (s->cd_sector_size - s->io_buffer_index);
895 ide_transfer_start(s, s->io_buffer + s->io_buffer_index,
896 size, ide_atapi_cmd_reply_end);
897 s->packet_transfer_size -= size;
898 s->elementary_transfer_size -= size;
899 s->io_buffer_index += size;
901 #ifdef DEBUG_IDE_ATAPI
902 printf("status=0x%x\n", s->status);
908 /* send a reply of 'size' bytes in s->io_buffer to an ATAPI command */
909 static void ide_atapi_cmd_reply(IDEState *s, int size, int max_size)
913 s->lba = -1; /* no sector read */
914 s->packet_transfer_size = size;
915 s->elementary_transfer_size = 0;
916 s->io_buffer_index = 0;
918 s->status = READY_STAT;
919 ide_atapi_cmd_reply_end(s);
922 /* start a CD-CDROM read command */
923 static void ide_atapi_cmd_read_pio(IDEState *s, int lba, int nb_sectors,
927 s->packet_transfer_size = nb_sectors * sector_size;
928 s->elementary_transfer_size = 0;
929 s->io_buffer_index = sector_size;
930 s->cd_sector_size = sector_size;
932 s->status = READY_STAT;
933 ide_atapi_cmd_reply_end(s);
936 /* ATAPI DMA support */
937 static int ide_atapi_cmd_read_dma_cb(IDEState *s,
938 target_phys_addr_t phys_addr,
941 int len, transfer_size;
943 transfer_size = transfer_size1;
944 while (transfer_size > 0) {
945 if (s->packet_transfer_size <= 0)
947 len = s->cd_sector_size - s->io_buffer_index;
949 /* transfert next data */
950 cd_read_sector(s->bs, s->lba, s->io_buffer, s->cd_sector_size);
952 s->io_buffer_index = 0;
953 len = s->cd_sector_size;
955 if (len > transfer_size)
957 cpu_physical_memory_write(phys_addr,
958 s->io_buffer + s->io_buffer_index, len);
959 s->packet_transfer_size -= len;
960 s->io_buffer_index += len;
961 transfer_size -= len;
964 if (s->packet_transfer_size <= 0) {
965 s->status = READY_STAT;
966 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
968 #ifdef DEBUG_IDE_ATAPI
969 printf("dma status=0x%x\n", s->status);
973 return transfer_size1 - transfer_size;
976 /* start a CD-CDROM read command with DMA */
977 /* XXX: test if DMA is available */
978 static void ide_atapi_cmd_read_dma(IDEState *s, int lba, int nb_sectors,
982 s->packet_transfer_size = nb_sectors * sector_size;
983 s->io_buffer_index = sector_size;
984 s->cd_sector_size = sector_size;
986 s->status = READY_STAT | DRQ_STAT;
987 ide_dma_start(s, ide_atapi_cmd_read_dma_cb);
990 static void ide_atapi_cmd_read(IDEState *s, int lba, int nb_sectors,
993 #ifdef DEBUG_IDE_ATAPI
994 printf("read: LBA=%d nb_sectors=%d\n", lba, nb_sectors);
997 ide_atapi_cmd_read_dma(s, lba, nb_sectors, sector_size);
999 ide_atapi_cmd_read_pio(s, lba, nb_sectors, sector_size);
1003 /* same toc as bochs. Return -1 if error or the toc length */
1004 /* XXX: check this */
1005 static int cdrom_read_toc(IDEState *s, uint8_t *buf, int msf, int start_track)
1008 int nb_sectors, len;
1010 if (start_track > 1 && start_track != 0xaa)
1013 *q++ = 1; /* first session */
1014 *q++ = 1; /* last session */
1015 if (start_track <= 1) {
1016 *q++ = 0; /* reserved */
1017 *q++ = 0x14; /* ADR, control */
1018 *q++ = 1; /* track number */
1019 *q++ = 0; /* reserved */
1021 *q++ = 0; /* reserved */
1022 *q++ = 0; /* minute */
1023 *q++ = 2; /* second */
1024 *q++ = 0; /* frame */
1031 /* lead out track */
1032 *q++ = 0; /* reserved */
1033 *q++ = 0x16; /* ADR, control */
1034 *q++ = 0xaa; /* track number */
1035 *q++ = 0; /* reserved */
1036 nb_sectors = s->nb_sectors >> 2;
1038 *q++ = 0; /* reserved */
1039 lba_to_msf(q, nb_sectors);
1042 cpu_to_ube32(q, nb_sectors);
1046 cpu_to_ube16(buf, len - 2);
1050 /* mostly same info as PearPc */
1051 static int cdrom_read_toc_raw(IDEState *s, uint8_t *buf, int msf,
1055 int nb_sectors, len;
1058 *q++ = 1; /* first session */
1059 *q++ = 1; /* last session */
1061 *q++ = 1; /* session number */
1062 *q++ = 0x14; /* data track */
1063 *q++ = 0; /* track number */
1064 *q++ = 0xa0; /* lead-in */
1067 *q++ = 0; /* frame */
1069 *q++ = 1; /* first track */
1070 *q++ = 0x00; /* disk type */
1073 *q++ = 1; /* session number */
1074 *q++ = 0x14; /* data track */
1075 *q++ = 0; /* track number */
1079 *q++ = 0; /* frame */
1081 *q++ = 1; /* last track */
1085 *q++ = 1; /* session number */
1086 *q++ = 0x14; /* data track */
1087 *q++ = 0; /* track number */
1088 *q++ = 0xa2; /* lead-out */
1091 *q++ = 0; /* frame */
1092 nb_sectors = s->nb_sectors >> 2;
1094 *q++ = 0; /* reserved */
1095 lba_to_msf(q, nb_sectors);
1098 cpu_to_ube32(q, nb_sectors);
1102 *q++ = 1; /* session number */
1103 *q++ = 0x14; /* ADR, control */
1104 *q++ = 0; /* track number */
1105 *q++ = 1; /* point */
1108 *q++ = 0; /* frame */
1115 cpu_to_ube16(buf, len - 2);
1119 static void ide_atapi_cmd(IDEState *s)
1121 const uint8_t *packet;
1125 packet = s->io_buffer;
1127 #ifdef DEBUG_IDE_ATAPI
1130 printf("ATAPI limit=0x%x packet:", s->lcyl | (s->hcyl << 8));
1131 for(i = 0; i < ATAPI_PACKET_SIZE; i++) {
1132 printf(" %02x", packet[i]);
1137 switch(s->io_buffer[0]) {
1138 case GPCMD_TEST_UNIT_READY:
1139 if (bdrv_is_inserted(s->bs)) {
1140 ide_atapi_cmd_ok(s);
1142 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1143 ASC_MEDIUM_NOT_PRESENT);
1146 case GPCMD_MODE_SENSE_10:
1149 max_len = ube16_to_cpu(packet + 7);
1150 action = packet[2] >> 6;
1151 code = packet[2] & 0x3f;
1153 case 0: /* current values */
1155 case 0x01: /* error recovery */
1156 cpu_to_ube16(&buf[0], 16 + 6);
1172 ide_atapi_cmd_reply(s, 16, max_len);
1175 cpu_to_ube16(&buf[0], 28 + 6);
1190 buf[14] = (1 << 0) | (1 << 3) | (1 << 5);
1191 if (bdrv_is_locked(s->bs))
1194 cpu_to_ube16(&buf[16], 706);
1197 cpu_to_ube16(&buf[20], 512);
1198 cpu_to_ube16(&buf[22], 706);
1203 ide_atapi_cmd_reply(s, 28, max_len);
1209 case 1: /* changeable values */
1211 case 2: /* default values */
1214 case 3: /* saved values */
1215 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1216 ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
1221 case GPCMD_REQUEST_SENSE:
1222 max_len = packet[4];
1224 buf[0] = 0x70 | (1 << 7);
1225 buf[2] = s->sense_key;
1228 ide_atapi_cmd_reply(s, 18, max_len);
1230 case GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
1231 if (bdrv_is_inserted(s->bs)) {
1232 bdrv_set_locked(s->bs, packet[4] & 1);
1233 ide_atapi_cmd_ok(s);
1235 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1236 ASC_MEDIUM_NOT_PRESENT);
1242 int nb_sectors, lba;
1244 if (!bdrv_is_inserted(s->bs)) {
1245 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1246 ASC_MEDIUM_NOT_PRESENT);
1249 if (packet[0] == GPCMD_READ_10)
1250 nb_sectors = ube16_to_cpu(packet + 7);
1252 nb_sectors = ube32_to_cpu(packet + 6);
1253 lba = ube32_to_cpu(packet + 2);
1254 if (nb_sectors == 0) {
1255 ide_atapi_cmd_ok(s);
1258 if (((int64_t)(lba + nb_sectors) << 2) > s->nb_sectors) {
1259 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1260 ASC_LOGICAL_BLOCK_OOR);
1263 ide_atapi_cmd_read(s, lba, nb_sectors, 2048);
1268 int nb_sectors, lba, transfer_request;
1270 if (!bdrv_is_inserted(s->bs)) {
1271 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1272 ASC_MEDIUM_NOT_PRESENT);
1275 nb_sectors = (packet[6] << 16) | (packet[7] << 8) | packet[8];
1276 lba = ube32_to_cpu(packet + 2);
1277 if (nb_sectors == 0) {
1278 ide_atapi_cmd_ok(s);
1281 if (((int64_t)(lba + nb_sectors) << 2) > s->nb_sectors) {
1282 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1283 ASC_LOGICAL_BLOCK_OOR);
1286 transfer_request = packet[9];
1287 switch(transfer_request & 0xf8) {
1290 ide_atapi_cmd_ok(s);
1294 ide_atapi_cmd_read(s, lba, nb_sectors, 2048);
1298 ide_atapi_cmd_read(s, lba, nb_sectors, 2352);
1301 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1302 ASC_INV_FIELD_IN_CMD_PACKET);
1310 if (!bdrv_is_inserted(s->bs)) {
1311 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1312 ASC_MEDIUM_NOT_PRESENT);
1315 lba = ube32_to_cpu(packet + 2);
1316 if (((int64_t)lba << 2) > s->nb_sectors) {
1317 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1318 ASC_LOGICAL_BLOCK_OOR);
1321 ide_atapi_cmd_ok(s);
1324 case GPCMD_START_STOP_UNIT:
1327 start = packet[4] & 1;
1328 eject = (packet[4] >> 1) & 1;
1330 if (eject && !start) {
1331 /* eject the disk */
1334 ide_atapi_cmd_ok(s);
1337 case GPCMD_MECHANISM_STATUS:
1339 max_len = ube16_to_cpu(packet + 8);
1340 cpu_to_ube16(buf, 0);
1341 /* no current LBA */
1346 cpu_to_ube16(buf + 6, 0);
1347 ide_atapi_cmd_reply(s, 8, max_len);
1350 case GPCMD_READ_TOC_PMA_ATIP:
1352 int format, msf, start_track, len;
1354 if (!bdrv_is_inserted(s->bs)) {
1355 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1356 ASC_MEDIUM_NOT_PRESENT);
1359 max_len = ube16_to_cpu(packet + 7);
1360 format = packet[9] >> 6;
1361 msf = (packet[1] >> 1) & 1;
1362 start_track = packet[6];
1365 len = cdrom_read_toc(s, buf, msf, start_track);
1368 ide_atapi_cmd_reply(s, len, max_len);
1371 /* multi session : only a single session defined */
1376 ide_atapi_cmd_reply(s, 12, max_len);
1379 len = cdrom_read_toc_raw(s, buf, msf, start_track);
1382 ide_atapi_cmd_reply(s, len, max_len);
1386 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1387 ASC_INV_FIELD_IN_CMD_PACKET);
1392 case GPCMD_READ_CDVD_CAPACITY:
1393 if (!bdrv_is_inserted(s->bs)) {
1394 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1395 ASC_MEDIUM_NOT_PRESENT);
1398 /* NOTE: it is really the number of sectors minus 1 */
1399 cpu_to_ube32(buf, (s->nb_sectors >> 2) - 1);
1400 cpu_to_ube32(buf + 4, 2048);
1401 ide_atapi_cmd_reply(s, 8, 8);
1404 max_len = packet[4];
1405 buf[0] = 0x05; /* CD-ROM */
1406 buf[1] = 0x80; /* removable */
1407 buf[2] = 0x00; /* ISO */
1408 buf[3] = 0x21; /* ATAPI-2 (XXX: put ATAPI-4 ?) */
1409 buf[4] = 31; /* additionnal length */
1410 buf[5] = 0; /* reserved */
1411 buf[6] = 0; /* reserved */
1412 buf[7] = 0; /* reserved */
1413 padstr8(buf + 8, 8, "QEMU");
1414 padstr8(buf + 16, 16, "QEMU CD-ROM");
1415 padstr8(buf + 32, 4, QEMU_VERSION);
1416 ide_atapi_cmd_reply(s, 36, max_len);
1419 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1420 ASC_ILLEGAL_OPCODE);
1425 /* called when the inserted state of the media has changed */
1426 static void cdrom_change_cb(void *opaque)
1428 IDEState *s = opaque;
1431 /* XXX: send interrupt too */
1432 bdrv_get_geometry(s->bs, &nb_sectors);
1433 s->nb_sectors = nb_sectors;
1436 static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)
1438 IDEState *ide_if = opaque;
1443 printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);
1450 /* NOTE: data is written to the two drives */
1451 ide_if[0].feature = val;
1452 ide_if[1].feature = val;
1457 ide_if[0].nsector = val;
1458 ide_if[1].nsector = val;
1461 ide_if[0].sector = val;
1462 ide_if[1].sector = val;
1465 ide_if[0].lcyl = val;
1466 ide_if[1].lcyl = val;
1469 ide_if[0].hcyl = val;
1470 ide_if[1].hcyl = val;
1473 ide_if[0].select = (val & ~0x10) | 0xa0;
1474 ide_if[1].select = (val | 0x10) | 0xa0;
1476 unit = (val >> 4) & 1;
1478 ide_if->cur_drive = s;
1483 #if defined(DEBUG_IDE)
1484 printf("ide: CMD=%02x\n", val);
1486 s = ide_if->cur_drive;
1487 /* ignore commands to non existant slave */
1488 if (s != ide_if && !s->bs)
1492 if (s->bs && !s->is_cdrom) {
1494 s->status = READY_STAT | SEEK_STAT;
1495 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1498 ide_set_signature(s);
1500 ide_abort_command(s);
1507 s->status = READY_STAT | SEEK_STAT;
1511 if (s->nsector > MAX_MULT_SECTORS ||
1513 (s->nsector & (s->nsector - 1)) != 0) {
1514 ide_abort_command(s);
1516 s->mult_sectors = s->nsector;
1517 s->status = READY_STAT;
1522 case WIN_VERIFY_ONCE:
1523 /* do sector number check ? */
1524 s->status = READY_STAT;
1531 s->req_nb_sectors = 1;
1535 case WIN_WRITE_ONCE:
1537 s->status = SEEK_STAT | READY_STAT;
1538 s->req_nb_sectors = 1;
1539 ide_transfer_start(s, s->io_buffer, 512, ide_sector_write);
1542 if (!s->mult_sectors)
1544 s->req_nb_sectors = s->mult_sectors;
1548 if (!s->mult_sectors)
1551 s->status = SEEK_STAT | READY_STAT;
1552 s->req_nb_sectors = s->mult_sectors;
1554 if (n > s->req_nb_sectors)
1555 n = s->req_nb_sectors;
1556 ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write);
1559 case WIN_READDMA_ONCE:
1562 ide_sector_read_dma(s);
1565 case WIN_WRITEDMA_ONCE:
1568 ide_sector_write_dma(s);
1570 case WIN_READ_NATIVE_MAX:
1571 ide_set_sector(s, s->nb_sectors - 1);
1572 s->status = READY_STAT;
1575 case WIN_CHECKPOWERMODE1:
1576 s->nsector = 0xff; /* device active or idle */
1577 s->status = READY_STAT;
1580 case WIN_SETFEATURES:
1583 /* XXX: valid for CDROM ? */
1584 switch(s->feature) {
1585 case 0x02: /* write cache enable */
1586 case 0x03: /* set transfer mode */
1587 case 0x82: /* write cache disable */
1588 case 0xaa: /* read look-ahead enable */
1589 case 0x55: /* read look-ahead disable */
1590 s->status = READY_STAT | SEEK_STAT;
1597 case WIN_STANDBYNOW1:
1598 case WIN_IDLEIMMEDIATE:
1599 s->status = READY_STAT;
1602 /* ATAPI commands */
1605 ide_atapi_identify(s);
1606 s->status = READY_STAT;
1607 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1609 ide_abort_command(s);
1614 ide_set_signature(s);
1615 s->status = 0x00; /* NOTE: READY is _not_ set */
1621 ide_set_signature(s);
1622 s->status = 0x00; /* NOTE: READY is _not_ set */
1628 /* overlapping commands not supported */
1629 if (s->feature & 0x02)
1631 s->atapi_dma = s->feature & 1;
1633 ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE,
1638 ide_abort_command(s);
1645 static uint32_t ide_ioport_read(void *opaque, uint32_t addr1)
1647 IDEState *ide_if = opaque;
1648 IDEState *s = ide_if->cur_drive;
1658 if (!ide_if[0].bs && !ide_if[1].bs)
1664 if (!ide_if[0].bs && !ide_if[1].bs)
1667 ret = s->nsector & 0xff;
1670 if (!ide_if[0].bs && !ide_if[1].bs)
1676 if (!ide_if[0].bs && !ide_if[1].bs)
1682 if (!ide_if[0].bs && !ide_if[1].bs)
1688 if (!ide_if[0].bs && !ide_if[1].bs)
1695 if ((!ide_if[0].bs && !ide_if[1].bs) ||
1696 (s != ide_if && !s->bs))
1702 openpic_set_irq(s->openpic, s->irq, 0);
1706 pci_set_irq(s->pci_dev, 0, 0);
1708 pic_set_irq(s->irq, 0);
1712 printf("ide: read addr=0x%x val=%02x\n", addr1, ret);
1717 static uint32_t ide_status_read(void *opaque, uint32_t addr)
1719 IDEState *ide_if = opaque;
1720 IDEState *s = ide_if->cur_drive;
1723 if ((!ide_if[0].bs && !ide_if[1].bs) ||
1724 (s != ide_if && !s->bs))
1729 printf("ide: read status addr=0x%x val=%02x\n", addr, ret);
1734 static void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val)
1736 IDEState *ide_if = opaque;
1741 printf("ide: write control addr=0x%x val=%02x\n", addr, val);
1743 /* common for both drives */
1744 if (!(ide_if[0].cmd & IDE_CMD_RESET) &&
1745 (val & IDE_CMD_RESET)) {
1746 /* reset low to high */
1747 for(i = 0;i < 2; i++) {
1749 s->status = BUSY_STAT | SEEK_STAT;
1752 } else if ((ide_if[0].cmd & IDE_CMD_RESET) &&
1753 !(val & IDE_CMD_RESET)) {
1755 for(i = 0;i < 2; i++) {
1758 s->status = 0x00; /* NOTE: READY is _not_ set */
1760 s->status = READY_STAT | SEEK_STAT;
1761 ide_set_signature(s);
1765 ide_if[0].cmd = val;
1766 ide_if[1].cmd = val;
1769 static void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)
1771 IDEState *s = ((IDEState *)opaque)->cur_drive;
1775 *(uint16_t *)p = le16_to_cpu(val);
1778 if (p >= s->data_end)
1779 s->end_transfer_func(s);
1782 static uint32_t ide_data_readw(void *opaque, uint32_t addr)
1784 IDEState *s = ((IDEState *)opaque)->cur_drive;
1788 ret = cpu_to_le16(*(uint16_t *)p);
1791 if (p >= s->data_end)
1792 s->end_transfer_func(s);
1796 static void ide_data_writel(void *opaque, uint32_t addr, uint32_t val)
1798 IDEState *s = ((IDEState *)opaque)->cur_drive;
1802 *(uint32_t *)p = le32_to_cpu(val);
1805 if (p >= s->data_end)
1806 s->end_transfer_func(s);
1809 static uint32_t ide_data_readl(void *opaque, uint32_t addr)
1811 IDEState *s = ((IDEState *)opaque)->cur_drive;
1816 ret = cpu_to_le32(*(uint32_t *)p);
1819 if (p >= s->data_end)
1820 s->end_transfer_func(s);
1824 static void ide_dummy_transfer_stop(IDEState *s)
1826 s->data_ptr = s->io_buffer;
1827 s->data_end = s->io_buffer;
1828 s->io_buffer[0] = 0xff;
1829 s->io_buffer[1] = 0xff;
1830 s->io_buffer[2] = 0xff;
1831 s->io_buffer[3] = 0xff;
1834 static void ide_reset(IDEState *s)
1836 s->mult_sectors = MAX_MULT_SECTORS;
1839 s->status = READY_STAT;
1840 ide_set_signature(s);
1841 /* init the transfer handler so that 0xffff is returned on data
1843 s->end_transfer_func = ide_dummy_transfer_stop;
1844 ide_dummy_transfer_stop(s);
1848 uint8_t boot_ind; /* 0x80 - active */
1849 uint8_t head; /* starting head */
1850 uint8_t sector; /* starting sector */
1851 uint8_t cyl; /* starting cylinder */
1852 uint8_t sys_ind; /* What partition type */
1853 uint8_t end_head; /* end head */
1854 uint8_t end_sector; /* end sector */
1855 uint8_t end_cyl; /* end cylinder */
1856 uint32_t start_sect; /* starting sector counting from 0 */
1857 uint32_t nr_sects; /* nr of sectors in partition */
1858 } __attribute__((packed));
1860 /* try to guess the disk logical geometry from the MSDOS partition table. Return 0 if OK, -1 if could not guess */
1861 static int guess_disk_lchs(IDEState *s,
1862 int *pcylinders, int *pheads, int *psectors)
1865 int ret, i, heads, sectors, cylinders;
1866 struct partition *p;
1869 ret = bdrv_read(s->bs, 0, buf, 1);
1872 /* test msdos magic */
1873 if (buf[510] != 0x55 || buf[511] != 0xaa)
1875 for(i = 0; i < 4; i++) {
1876 p = ((struct partition *)(buf + 0x1be)) + i;
1877 nr_sects = le32_to_cpu(p->nr_sects);
1878 if (nr_sects && p->end_head) {
1879 /* We make the assumption that the partition terminates on
1880 a cylinder boundary */
1881 heads = p->end_head + 1;
1882 sectors = p->end_sector & 63;
1885 cylinders = s->nb_sectors / (heads * sectors);
1886 if (cylinders < 1 || cylinders > 16383)
1889 *psectors = sectors;
1890 *pcylinders = cylinders;
1892 printf("guessed geometry: LCHS=%d %d %d\n",
1893 cylinders, heads, sectors);
1901 static void ide_init2(IDEState *ide_state, int irq,
1902 BlockDriverState *hd0, BlockDriverState *hd1)
1905 static int drive_serial = 1;
1906 int i, cylinders, heads, secs, translation;
1909 for(i = 0; i < 2; i++) {
1916 bdrv_get_geometry(s->bs, &nb_sectors);
1917 s->nb_sectors = nb_sectors;
1918 /* if a geometry hint is available, use it */
1919 bdrv_get_geometry_hint(s->bs, &cylinders, &heads, &secs);
1920 if (cylinders != 0) {
1921 s->cylinders = cylinders;
1925 if (guess_disk_lchs(s, &cylinders, &heads, &secs) == 0) {
1927 /* if heads > 16, it means that a BIOS LBA
1928 translation was active, so the default
1929 hardware geometry is OK */
1930 goto default_geometry;
1932 s->cylinders = cylinders;
1935 /* disable any translation to be in sync with
1936 the logical geometry */
1937 translation = bdrv_get_translation_hint(s->bs);
1938 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
1939 bdrv_set_translation_hint(s->bs,
1940 BIOS_ATA_TRANSLATION_NONE);
1945 /* if no geometry, use a standard physical disk geometry */
1946 cylinders = nb_sectors / (16 * 63);
1947 if (cylinders > 16383)
1949 else if (cylinders < 2)
1951 s->cylinders = cylinders;
1955 bdrv_set_geometry_hint(s->bs, s->cylinders, s->heads, s->sectors);
1957 if (bdrv_get_type_hint(s->bs) == BDRV_TYPE_CDROM) {
1959 bdrv_set_change_cb(s->bs, cdrom_change_cb, s);
1962 s->drive_serial = drive_serial++;
1964 s->sector_write_timer = qemu_new_timer(vm_clock,
1965 ide_sector_write_timer_cb, s);
1970 static void ide_init_ioport(IDEState *ide_state, int iobase, int iobase2)
1972 register_ioport_write(iobase, 8, 1, ide_ioport_write, ide_state);
1973 register_ioport_read(iobase, 8, 1, ide_ioport_read, ide_state);
1975 register_ioport_read(iobase2, 1, 1, ide_status_read, ide_state);
1976 register_ioport_write(iobase2, 1, 1, ide_cmd_write, ide_state);
1980 register_ioport_write(iobase, 2, 2, ide_data_writew, ide_state);
1981 register_ioport_read(iobase, 2, 2, ide_data_readw, ide_state);
1982 register_ioport_write(iobase, 4, 4, ide_data_writel, ide_state);
1983 register_ioport_read(iobase, 4, 4, ide_data_readl, ide_state);
1986 /***********************************************************/
1987 /* ISA IDE definitions */
1989 void isa_ide_init(int iobase, int iobase2, int irq,
1990 BlockDriverState *hd0, BlockDriverState *hd1)
1992 IDEState *ide_state;
1994 ide_state = qemu_mallocz(sizeof(IDEState) * 2);
1998 ide_init2(ide_state, irq, hd0, hd1);
1999 ide_init_ioport(ide_state, iobase, iobase2);
2002 /***********************************************************/
2003 /* PCI IDE definitions */
2005 static void ide_map(PCIDevice *pci_dev, int region_num,
2006 uint32_t addr, uint32_t size, int type)
2008 PCIIDEState *d = (PCIIDEState *)pci_dev;
2009 IDEState *ide_state;
2011 if (region_num <= 3) {
2012 ide_state = &d->ide_if[(region_num >> 1) * 2];
2013 if (region_num & 1) {
2014 register_ioport_read(addr + 2, 1, 1, ide_status_read, ide_state);
2015 register_ioport_write(addr + 2, 1, 1, ide_cmd_write, ide_state);
2017 register_ioport_write(addr, 8, 1, ide_ioport_write, ide_state);
2018 register_ioport_read(addr, 8, 1, ide_ioport_read, ide_state);
2021 register_ioport_write(addr, 2, 2, ide_data_writew, ide_state);
2022 register_ioport_read(addr, 2, 2, ide_data_readw, ide_state);
2023 register_ioport_write(addr, 4, 4, ide_data_writel, ide_state);
2024 register_ioport_read(addr, 4, 4, ide_data_readl, ide_state);
2029 /* XXX: full callback usage to prepare non blocking I/Os support -
2031 static void ide_dma_loop(BMDMAState *bm)
2037 target_phys_addr_t cur_addr;
2040 cur_addr = bm->addr;
2041 /* at most one page to avoid hanging if erroneous parameters */
2042 for(i = 0; i < 512; i++) {
2043 cpu_physical_memory_read(cur_addr, (uint8_t *)&prd, 8);
2044 prd.addr = le32_to_cpu(prd.addr);
2045 prd.size = le32_to_cpu(prd.size);
2047 printf("ide: dma: prd: %08x: addr=0x%08x size=0x%08x\n",
2048 (int)cur_addr, prd.addr, prd.size);
2050 len = prd.size & 0xfffe;
2054 len1 = bm->dma_cb(bm->ide_if, prd.addr, len);
2060 /* end of transfer */
2061 if (prd.size & 0x80000000)
2065 /* end of transfer */
2067 bm->status &= ~BM_STATUS_DMAING;
2068 bm->status |= BM_STATUS_INT;
2073 static void ide_dma_start(IDEState *s, IDEDMAFunc *dma_cb)
2075 BMDMAState *bm = s->bmdma;
2079 bm->dma_cb = dma_cb;
2080 if (bm->status & BM_STATUS_DMAING) {
2085 static uint32_t bmdma_cmd_readb(void *opaque, uint32_t addr)
2087 BMDMAState *bm = opaque;
2091 printf("%s: 0x%08x\n", __func__, val);
2096 static void bmdma_cmd_writeb(void *opaque, uint32_t addr, uint32_t val)
2098 BMDMAState *bm = opaque;
2100 printf("%s: 0x%08x\n", __func__, val);
2102 if (!(val & BM_CMD_START)) {
2103 /* XXX: do it better */
2104 bm->status &= ~BM_STATUS_DMAING;
2105 bm->cmd = val & 0x09;
2107 bm->status |= BM_STATUS_DMAING;
2108 bm->cmd = val & 0x09;
2109 /* start dma transfer if possible */
2115 static uint32_t bmdma_status_readb(void *opaque, uint32_t addr)
2117 BMDMAState *bm = opaque;
2121 printf("%s: 0x%08x\n", __func__, val);
2126 static void bmdma_status_writeb(void *opaque, uint32_t addr, uint32_t val)
2128 BMDMAState *bm = opaque;
2130 printf("%s: 0x%08x\n", __func__, val);
2132 bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
2135 static uint32_t bmdma_addr_readl(void *opaque, uint32_t addr)
2137 BMDMAState *bm = opaque;
2141 printf("%s: 0x%08x\n", __func__, val);
2146 static void bmdma_addr_writel(void *opaque, uint32_t addr, uint32_t val)
2148 BMDMAState *bm = opaque;
2150 printf("%s: 0x%08x\n", __func__, val);
2152 bm->addr = val & ~3;
2155 static void bmdma_map(PCIDevice *pci_dev, int region_num,
2156 uint32_t addr, uint32_t size, int type)
2158 PCIIDEState *d = (PCIIDEState *)pci_dev;
2161 for(i = 0;i < 2; i++) {
2162 BMDMAState *bm = &d->bmdma[i];
2163 d->ide_if[2 * i].bmdma = bm;
2164 d->ide_if[2 * i + 1].bmdma = bm;
2166 register_ioport_write(addr, 1, 1, bmdma_cmd_writeb, bm);
2167 register_ioport_read(addr, 1, 1, bmdma_cmd_readb, bm);
2169 register_ioport_write(addr + 2, 1, 1, bmdma_status_writeb, bm);
2170 register_ioport_read(addr + 2, 1, 1, bmdma_status_readb, bm);
2172 register_ioport_write(addr + 4, 4, 4, bmdma_addr_writel, bm);
2173 register_ioport_read(addr + 4, 4, 4, bmdma_addr_readl, bm);
2178 /* hd_table must contain 4 block drivers */
2179 void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table)
2185 d = (PCIIDEState *)pci_register_device(bus, "IDE", sizeof(PCIIDEState),
2188 pci_conf = d->dev.config;
2189 pci_conf[0x00] = 0x86; // Intel
2190 pci_conf[0x01] = 0x80;
2191 pci_conf[0x02] = 0x00; // fake
2192 pci_conf[0x03] = 0x01; // fake
2193 pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
2194 pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
2195 pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic
2197 pci_conf[0x2c] = 0x86; // subsys vendor
2198 pci_conf[0x2d] = 0x80; // subsys vendor
2199 pci_conf[0x2e] = 0x00; // fake
2200 pci_conf[0x2f] = 0x01; // fake
2202 pci_register_io_region((PCIDevice *)d, 0, 0x8,
2203 PCI_ADDRESS_SPACE_IO, ide_map);
2204 pci_register_io_region((PCIDevice *)d, 1, 0x4,
2205 PCI_ADDRESS_SPACE_IO, ide_map);
2206 pci_register_io_region((PCIDevice *)d, 2, 0x8,
2207 PCI_ADDRESS_SPACE_IO, ide_map);
2208 pci_register_io_region((PCIDevice *)d, 3, 0x4,
2209 PCI_ADDRESS_SPACE_IO, ide_map);
2210 pci_register_io_region((PCIDevice *)d, 4, 0x10,
2211 PCI_ADDRESS_SPACE_IO, bmdma_map);
2213 pci_conf[0x3d] = 0x01; // interrupt on pin 1
2215 for(i = 0; i < 4; i++)
2216 d->ide_if[i].pci_dev = (PCIDevice *)d;
2217 ide_init2(&d->ide_if[0], 16, hd_table[0], hd_table[1]);
2218 ide_init2(&d->ide_if[2], 16, hd_table[2], hd_table[3]);
2221 /* hd_table must contain 4 block drivers */
2222 /* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
2223 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table)
2228 /* register a function 1 of PIIX3 */
2229 d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE",
2230 sizeof(PCIIDEState),
2231 ((PCIDevice *)piix3_state)->devfn + 1,
2233 pci_conf = d->dev.config;
2234 pci_conf[0x00] = 0x86; // Intel
2235 pci_conf[0x01] = 0x80;
2236 pci_conf[0x02] = 0x10;
2237 pci_conf[0x03] = 0x70;
2238 pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
2239 pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
2240 pci_conf[0x0e] = 0x00; // header_type
2242 pci_register_io_region((PCIDevice *)d, 4, 0x10,
2243 PCI_ADDRESS_SPACE_IO, bmdma_map);
2245 ide_init2(&d->ide_if[0], 14, hd_table[0], hd_table[1]);
2246 ide_init2(&d->ide_if[2], 15, hd_table[2], hd_table[3]);
2247 ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6);
2248 ide_init_ioport(&d->ide_if[2], 0x170, 0x376);
2251 /***********************************************************/
2252 /* MacIO based PowerPC IDE */
2254 /* PowerMac IDE memory IO */
2255 static void pmac_ide_writeb (void *opaque,
2256 target_phys_addr_t addr, uint32_t val)
2258 addr = (addr & 0xFFF) >> 4;
2261 ide_ioport_write(opaque, addr, val);
2265 ide_cmd_write(opaque, 0, val);
2272 static uint32_t pmac_ide_readb (void *opaque,target_phys_addr_t addr)
2276 addr = (addr & 0xFFF) >> 4;
2279 retval = ide_ioport_read(opaque, addr);
2283 retval = ide_status_read(opaque, 0);
2292 static void pmac_ide_writew (void *opaque,
2293 target_phys_addr_t addr, uint32_t val)
2295 addr = (addr & 0xFFF) >> 4;
2296 #ifdef TARGET_WORDS_BIGENDIAN
2300 ide_data_writew(opaque, 0, val);
2304 static uint32_t pmac_ide_readw (void *opaque,target_phys_addr_t addr)
2308 addr = (addr & 0xFFF) >> 4;
2310 retval = ide_data_readw(opaque, 0);
2314 #ifdef TARGET_WORDS_BIGENDIAN
2315 retval = bswap16(retval);
2320 static void pmac_ide_writel (void *opaque,
2321 target_phys_addr_t addr, uint32_t val)
2323 addr = (addr & 0xFFF) >> 4;
2324 #ifdef TARGET_WORDS_BIGENDIAN
2328 ide_data_writel(opaque, 0, val);
2332 static uint32_t pmac_ide_readl (void *opaque,target_phys_addr_t addr)
2336 addr = (addr & 0xFFF) >> 4;
2338 retval = ide_data_readl(opaque, 0);
2340 retval = 0xFFFFFFFF;
2342 #ifdef TARGET_WORDS_BIGENDIAN
2343 retval = bswap32(retval);
2348 static CPUWriteMemoryFunc *pmac_ide_write[] = {
2354 static CPUReadMemoryFunc *pmac_ide_read[] = {
2360 /* hd_table must contain 4 block drivers */
2361 /* PowerMac uses memory mapped registers, not I/O. Return the memory
2362 I/O index to access the ide. */
2363 int pmac_ide_init (BlockDriverState **hd_table,
2364 openpic_t *openpic, int irq)
2367 int pmac_ide_memory;
2369 ide_if = qemu_mallocz(sizeof(IDEState) * 2);
2370 ide_init2(&ide_if[0], irq, hd_table[0], hd_table[1]);
2371 ide_if[0].openpic = openpic;
2372 ide_if[1].openpic = openpic;
2374 pmac_ide_memory = cpu_register_io_memory(0, pmac_ide_read,
2375 pmac_ide_write, &ide_if[0]);
2376 return pmac_ide_memory;