2 * QEMU MC146818 RTC emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu-timer.h"
29 #include "hpet_emul.h"
34 #define RTC_SECONDS_ALARM 1
36 #define RTC_MINUTES_ALARM 3
38 #define RTC_HOURS_ALARM 5
39 #define RTC_ALARM_DONT_CARE 0xC0
41 #define RTC_DAY_OF_WEEK 6
42 #define RTC_DAY_OF_MONTH 7
51 #define REG_A_UIP 0x80
53 #define REG_B_SET 0x80
54 #define REG_B_PIE 0x40
55 #define REG_B_AIE 0x20
56 #define REG_B_UIE 0x10
60 uint8_t cmos_data[128];
67 QEMUTimer *periodic_timer;
68 int64_t next_periodic_time;
70 int64_t next_second_time;
72 uint32_t irq_coalesced;
75 QEMUTimer *second_timer;
76 QEMUTimer *second_timer2;
79 static void rtc_irq_raise(qemu_irq irq) {
80 /* When HPET is operating in legacy mode, RTC interrupts are disabled
81 * We block qemu_irq_raise, but not qemu_irq_lower, in case legacy
82 * mode is established while interrupt is raised. We want it to
83 * be lowered in any case
85 #if defined TARGET_I386 || defined TARGET_X86_64
86 if (!hpet_in_legacy_mode())
91 static void rtc_set_time(RTCState *s);
92 static void rtc_copy_date(RTCState *s);
94 static void rtc_timer_update(RTCState *s, int64_t current_time)
96 int period_code, period;
97 int64_t cur_clock, next_irq_clock;
99 period_code = s->cmos_data[RTC_REG_A] & 0x0f;
100 #if defined TARGET_I386 || defined TARGET_X86_64
101 /* disable periodic timer if hpet is in legacy mode, since interrupts are
104 if (period_code != 0 && (s->cmos_data[RTC_REG_B] & REG_B_PIE) && !hpet_in_legacy_mode()) {
106 if (period_code != 0 && (s->cmos_data[RTC_REG_B] & REG_B_PIE)) {
108 if (period_code <= 2)
110 /* period in 32 Khz cycles */
111 period = 1 << (period_code - 1);
113 if(period != s->period)
114 s->irq_coalesced = (s->irq_coalesced * s->period) / period;
117 /* compute 32 khz clock */
118 cur_clock = muldiv64(current_time, 32768, ticks_per_sec);
119 next_irq_clock = (cur_clock & ~(period - 1)) + period;
120 s->next_periodic_time = muldiv64(next_irq_clock, ticks_per_sec, 32768) + 1;
121 qemu_mod_timer(s->periodic_timer, s->next_periodic_time);
124 s->irq_coalesced = 0;
126 qemu_del_timer(s->periodic_timer);
130 static void rtc_periodic_timer(void *opaque)
132 RTCState *s = opaque;
134 rtc_timer_update(s, s->next_periodic_time);
136 if ((s->cmos_data[RTC_REG_C] & 0xc0) && rtc_td_hack) {
141 s->cmos_data[RTC_REG_C] |= 0xc0;
142 rtc_irq_raise(s->irq);
145 static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data)
147 RTCState *s = opaque;
149 if ((addr & 1) == 0) {
150 s->cmos_index = data & 0x7f;
153 printf("cmos: write index=0x%02x val=0x%02x\n",
154 s->cmos_index, data);
156 switch(s->cmos_index) {
157 case RTC_SECONDS_ALARM:
158 case RTC_MINUTES_ALARM:
159 case RTC_HOURS_ALARM:
160 /* XXX: not supported */
161 s->cmos_data[s->cmos_index] = data;
166 case RTC_DAY_OF_WEEK:
167 case RTC_DAY_OF_MONTH:
170 s->cmos_data[s->cmos_index] = data;
171 /* if in set mode, do not update the time */
172 if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
177 /* UIP bit is read only */
178 s->cmos_data[RTC_REG_A] = (data & ~REG_A_UIP) |
179 (s->cmos_data[RTC_REG_A] & REG_A_UIP);
180 rtc_timer_update(s, qemu_get_clock(vm_clock));
183 if (data & REG_B_SET) {
184 /* set mode: reset UIP mode */
185 s->cmos_data[RTC_REG_A] &= ~REG_A_UIP;
188 /* if disabling set mode, update the time */
189 if (s->cmos_data[RTC_REG_B] & REG_B_SET) {
193 s->cmos_data[RTC_REG_B] = data;
194 rtc_timer_update(s, qemu_get_clock(vm_clock));
198 /* cannot write to them */
201 s->cmos_data[s->cmos_index] = data;
207 static inline int to_bcd(RTCState *s, int a)
209 if (s->cmos_data[RTC_REG_B] & REG_B_DM) {
212 return ((a / 10) << 4) | (a % 10);
216 static inline int from_bcd(RTCState *s, int a)
218 if (s->cmos_data[RTC_REG_B] & REG_B_DM) {
221 return ((a >> 4) * 10) + (a & 0x0f);
225 static void rtc_set_time(RTCState *s)
227 struct tm *tm = &s->current_tm;
229 tm->tm_sec = from_bcd(s, s->cmos_data[RTC_SECONDS]);
230 tm->tm_min = from_bcd(s, s->cmos_data[RTC_MINUTES]);
231 tm->tm_hour = from_bcd(s, s->cmos_data[RTC_HOURS] & 0x7f);
232 if (!(s->cmos_data[RTC_REG_B] & 0x02) &&
233 (s->cmos_data[RTC_HOURS] & 0x80)) {
236 tm->tm_wday = from_bcd(s, s->cmos_data[RTC_DAY_OF_WEEK]) - 1;
237 tm->tm_mday = from_bcd(s, s->cmos_data[RTC_DAY_OF_MONTH]);
238 tm->tm_mon = from_bcd(s, s->cmos_data[RTC_MONTH]) - 1;
239 tm->tm_year = from_bcd(s, s->cmos_data[RTC_YEAR]) + s->base_year - 1900;
242 static void rtc_copy_date(RTCState *s)
244 const struct tm *tm = &s->current_tm;
247 s->cmos_data[RTC_SECONDS] = to_bcd(s, tm->tm_sec);
248 s->cmos_data[RTC_MINUTES] = to_bcd(s, tm->tm_min);
249 if (s->cmos_data[RTC_REG_B] & 0x02) {
251 s->cmos_data[RTC_HOURS] = to_bcd(s, tm->tm_hour);
254 s->cmos_data[RTC_HOURS] = to_bcd(s, tm->tm_hour % 12);
255 if (tm->tm_hour >= 12)
256 s->cmos_data[RTC_HOURS] |= 0x80;
258 s->cmos_data[RTC_DAY_OF_WEEK] = to_bcd(s, tm->tm_wday + 1);
259 s->cmos_data[RTC_DAY_OF_MONTH] = to_bcd(s, tm->tm_mday);
260 s->cmos_data[RTC_MONTH] = to_bcd(s, tm->tm_mon + 1);
261 year = (tm->tm_year - s->base_year) % 100;
264 s->cmos_data[RTC_YEAR] = to_bcd(s, year);
267 /* month is between 0 and 11. */
268 static int get_days_in_month(int month, int year)
270 static const int days_tab[12] = {
271 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
274 if ((unsigned )month >= 12)
278 if ((year % 4) == 0 && ((year % 100) != 0 || (year % 400) == 0))
284 /* update 'tm' to the next second */
285 static void rtc_next_second(struct tm *tm)
290 if ((unsigned)tm->tm_sec >= 60) {
293 if ((unsigned)tm->tm_min >= 60) {
296 if ((unsigned)tm->tm_hour >= 24) {
300 if ((unsigned)tm->tm_wday >= 7)
302 days_in_month = get_days_in_month(tm->tm_mon,
305 if (tm->tm_mday < 1) {
307 } else if (tm->tm_mday > days_in_month) {
310 if (tm->tm_mon >= 12) {
321 static void rtc_update_second(void *opaque)
323 RTCState *s = opaque;
326 /* if the oscillator is not in normal operation, we do not update */
327 if ((s->cmos_data[RTC_REG_A] & 0x70) != 0x20) {
328 s->next_second_time += ticks_per_sec;
329 qemu_mod_timer(s->second_timer, s->next_second_time);
331 rtc_next_second(&s->current_tm);
333 if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
334 /* update in progress bit */
335 s->cmos_data[RTC_REG_A] |= REG_A_UIP;
337 /* should be 244 us = 8 / 32768 seconds, but currently the
338 timers do not have the necessary resolution. */
339 delay = (ticks_per_sec * 1) / 100;
342 qemu_mod_timer(s->second_timer2,
343 s->next_second_time + delay);
347 static void rtc_update_second2(void *opaque)
349 RTCState *s = opaque;
351 if (!(s->cmos_data[RTC_REG_B] & REG_B_SET)) {
356 if (s->cmos_data[RTC_REG_B] & REG_B_AIE) {
357 if (((s->cmos_data[RTC_SECONDS_ALARM] & 0xc0) == 0xc0 ||
358 s->cmos_data[RTC_SECONDS_ALARM] == s->current_tm.tm_sec) &&
359 ((s->cmos_data[RTC_MINUTES_ALARM] & 0xc0) == 0xc0 ||
360 s->cmos_data[RTC_MINUTES_ALARM] == s->current_tm.tm_mon) &&
361 ((s->cmos_data[RTC_HOURS_ALARM] & 0xc0) == 0xc0 ||
362 s->cmos_data[RTC_HOURS_ALARM] == s->current_tm.tm_hour)) {
364 s->cmos_data[RTC_REG_C] |= 0xa0;
365 rtc_irq_raise(s->irq);
369 /* update ended interrupt */
370 if (s->cmos_data[RTC_REG_B] & REG_B_UIE) {
371 s->cmos_data[RTC_REG_C] |= 0x90;
372 rtc_irq_raise(s->irq);
375 /* clear update in progress bit */
376 s->cmos_data[RTC_REG_A] &= ~REG_A_UIP;
378 s->next_second_time += ticks_per_sec;
379 qemu_mod_timer(s->second_timer, s->next_second_time);
382 static uint32_t cmos_ioport_read(void *opaque, uint32_t addr)
384 RTCState *s = opaque;
386 if ((addr & 1) == 0) {
389 switch(s->cmos_index) {
393 case RTC_DAY_OF_WEEK:
394 case RTC_DAY_OF_MONTH:
397 ret = s->cmos_data[s->cmos_index];
400 ret = s->cmos_data[s->cmos_index];
403 ret = s->cmos_data[s->cmos_index];
404 qemu_irq_lower(s->irq);
406 if(s->irq_coalesced) {
407 apic_reset_irq_delivered();
408 qemu_irq_raise(s->irq);
409 if (apic_get_irq_delivered())
414 s->cmos_data[RTC_REG_C] = 0x00;
417 ret = s->cmos_data[s->cmos_index];
421 printf("cmos: read index=0x%02x val=0x%02x\n",
428 void rtc_set_memory(RTCState *s, int addr, int val)
430 if (addr >= 0 && addr <= 127)
431 s->cmos_data[addr] = val;
434 void rtc_set_date(RTCState *s, const struct tm *tm)
440 /* PC cmos mappings */
441 #define REG_IBM_CENTURY_BYTE 0x32
442 #define REG_IBM_PS2_CENTURY_BYTE 0x37
444 static void rtc_set_date_from_host(RTCState *s)
449 /* set the CMOS date */
450 qemu_get_timedate(&tm, 0);
451 rtc_set_date(s, &tm);
453 val = to_bcd(s, (tm.tm_year / 100) + 19);
454 rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
455 rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
458 static void rtc_save(QEMUFile *f, void *opaque)
460 RTCState *s = opaque;
462 qemu_put_buffer(f, s->cmos_data, 128);
463 qemu_put_8s(f, &s->cmos_index);
465 qemu_put_be32(f, s->current_tm.tm_sec);
466 qemu_put_be32(f, s->current_tm.tm_min);
467 qemu_put_be32(f, s->current_tm.tm_hour);
468 qemu_put_be32(f, s->current_tm.tm_wday);
469 qemu_put_be32(f, s->current_tm.tm_mday);
470 qemu_put_be32(f, s->current_tm.tm_mon);
471 qemu_put_be32(f, s->current_tm.tm_year);
473 qemu_put_timer(f, s->periodic_timer);
474 qemu_put_be64(f, s->next_periodic_time);
476 qemu_put_be64(f, s->next_second_time);
477 qemu_put_timer(f, s->second_timer);
478 qemu_put_timer(f, s->second_timer2);
481 static int rtc_load(QEMUFile *f, void *opaque, int version_id)
483 RTCState *s = opaque;
488 qemu_get_buffer(f, s->cmos_data, 128);
489 qemu_get_8s(f, &s->cmos_index);
491 s->current_tm.tm_sec=qemu_get_be32(f);
492 s->current_tm.tm_min=qemu_get_be32(f);
493 s->current_tm.tm_hour=qemu_get_be32(f);
494 s->current_tm.tm_wday=qemu_get_be32(f);
495 s->current_tm.tm_mday=qemu_get_be32(f);
496 s->current_tm.tm_mon=qemu_get_be32(f);
497 s->current_tm.tm_year=qemu_get_be32(f);
499 qemu_get_timer(f, s->periodic_timer);
500 s->next_periodic_time=qemu_get_be64(f);
502 s->next_second_time=qemu_get_be64(f);
503 qemu_get_timer(f, s->second_timer);
504 qemu_get_timer(f, s->second_timer2);
509 static void rtc_save_td(QEMUFile *f, void *opaque)
511 RTCState *s = opaque;
513 qemu_put_be32(f, s->irq_coalesced);
514 qemu_put_be32(f, s->period);
517 static int rtc_load_td(QEMUFile *f, void *opaque, int version_id)
519 RTCState *s = opaque;
524 s->irq_coalesced = qemu_get_be32(f);
525 s->period = qemu_get_be32(f);
530 RTCState *rtc_init(int base, qemu_irq irq, int base_year)
534 s = qemu_mallocz(sizeof(RTCState));
537 s->cmos_data[RTC_REG_A] = 0x26;
538 s->cmos_data[RTC_REG_B] = 0x02;
539 s->cmos_data[RTC_REG_C] = 0x00;
540 s->cmos_data[RTC_REG_D] = 0x80;
542 s->base_year = base_year;
543 rtc_set_date_from_host(s);
545 s->periodic_timer = qemu_new_timer(vm_clock,
546 rtc_periodic_timer, s);
547 s->second_timer = qemu_new_timer(vm_clock,
548 rtc_update_second, s);
549 s->second_timer2 = qemu_new_timer(vm_clock,
550 rtc_update_second2, s);
552 s->next_second_time = qemu_get_clock(vm_clock) + (ticks_per_sec * 99) / 100;
553 qemu_mod_timer(s->second_timer2, s->next_second_time);
555 register_ioport_write(base, 2, 1, cmos_ioport_write, s);
556 register_ioport_read(base, 2, 1, cmos_ioport_read, s);
558 register_savevm("mc146818rtc", base, 1, rtc_save, rtc_load, s);
561 register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s);
566 /* Memory mapped interface */
567 static uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr)
569 RTCState *s = opaque;
571 return cmos_ioport_read(s, addr >> s->it_shift) & 0xFF;
574 static void cmos_mm_writeb (void *opaque,
575 target_phys_addr_t addr, uint32_t value)
577 RTCState *s = opaque;
579 cmos_ioport_write(s, addr >> s->it_shift, value & 0xFF);
582 static uint32_t cmos_mm_readw (void *opaque, target_phys_addr_t addr)
584 RTCState *s = opaque;
587 val = cmos_ioport_read(s, addr >> s->it_shift) & 0xFFFF;
588 #ifdef TARGET_WORDS_BIGENDIAN
594 static void cmos_mm_writew (void *opaque,
595 target_phys_addr_t addr, uint32_t value)
597 RTCState *s = opaque;
598 #ifdef TARGET_WORDS_BIGENDIAN
599 value = bswap16(value);
601 cmos_ioport_write(s, addr >> s->it_shift, value & 0xFFFF);
604 static uint32_t cmos_mm_readl (void *opaque, target_phys_addr_t addr)
606 RTCState *s = opaque;
609 val = cmos_ioport_read(s, addr >> s->it_shift);
610 #ifdef TARGET_WORDS_BIGENDIAN
616 static void cmos_mm_writel (void *opaque,
617 target_phys_addr_t addr, uint32_t value)
619 RTCState *s = opaque;
620 #ifdef TARGET_WORDS_BIGENDIAN
621 value = bswap32(value);
623 cmos_ioport_write(s, addr >> s->it_shift, value);
626 static CPUReadMemoryFunc *rtc_mm_read[] = {
632 static CPUWriteMemoryFunc *rtc_mm_write[] = {
638 RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
644 s = qemu_mallocz(sizeof(RTCState));
647 s->cmos_data[RTC_REG_A] = 0x26;
648 s->cmos_data[RTC_REG_B] = 0x02;
649 s->cmos_data[RTC_REG_C] = 0x00;
650 s->cmos_data[RTC_REG_D] = 0x80;
652 s->base_year = base_year;
653 rtc_set_date_from_host(s);
655 s->periodic_timer = qemu_new_timer(vm_clock,
656 rtc_periodic_timer, s);
657 s->second_timer = qemu_new_timer(vm_clock,
658 rtc_update_second, s);
659 s->second_timer2 = qemu_new_timer(vm_clock,
660 rtc_update_second2, s);
662 s->next_second_time = qemu_get_clock(vm_clock) + (ticks_per_sec * 99) / 100;
663 qemu_mod_timer(s->second_timer2, s->next_second_time);
665 io_memory = cpu_register_io_memory(0, rtc_mm_read, rtc_mm_write, s);
666 cpu_register_physical_memory(base, 2 << it_shift, io_memory);
668 register_savevm("mc146818rtc", base, 1, rtc_save, rtc_load, s);
671 register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s);