2 * QEMU Malta board support
4 * Copyright (c) 2007 Hervé Poussineau
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #ifdef TARGET_WORDS_BIGENDIAN
28 #define BIOS_FILENAME "mips_bios.bin"
30 #define BIOS_FILENAME "mipsel_bios.bin"
34 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffULL)
36 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffU)
39 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
41 static const int ide_iobase[2] = { 0x1f0, 0x170 };
42 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
43 static const int ide_irq[2] = { 14, 15 };
45 static uint32_t serial_base[MAX_SERIAL_PORTS] = { 0x80006000, 0x80007000 };
46 static int serial_irq[MAX_SERIAL_PORTS] = { 8, 9 };
50 static void main_cpu_reset(void *opaque)
52 CPUState *env = opaque;
57 void mips_pica61_init (int ram_size, int vga_ram_size, int boot_device,
58 DisplayState *ds, const char **fd_filename, int snapshot,
59 const char *kernel_filename, const char *kernel_cmdline,
60 const char *initrd_filename, const char *cpu_model)
63 unsigned long bios_offset;
72 if (cpu_model == NULL) {
79 if (mips_find_by_name(cpu_model, &def) != 0)
82 cpu_mips_register(env, def);
83 register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
84 qemu_register_reset(main_cpu_reset, env);
86 /* allocate RAM (limited to 256 MB) */
87 if (ram_size < 256 * 1024 * 1024)
88 available_ram = ram_size;
90 available_ram = 256 * 1024 * 1024;
91 cpu_register_physical_memory(0, available_ram, IO_MEM_RAM);
93 /* load a BIOS image */
94 bios_offset = ram_size + vga_ram_size;
95 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
96 bios_size = load_image(buf, phys_ram_base + bios_offset);
97 if ((bios_size <= 0) || (bios_size > BIOS_SIZE)) {
99 fprintf(stderr, "qemu: Error, could not load MIPS bios '%s'\n",
103 cpu_register_physical_memory(0x1fc00000,
104 BIOS_SIZE, bios_offset | IO_MEM_ROM);
108 * addr 0xe0004000: mc146818
109 * addr 0xe0005000 intr 6: ps2 keyboard
110 * addr 0xe0005000 intr 7: ps2 mouse
111 * addr 0xe0006000 intr 8: ns16550a,
112 * addr 0xe0007000 intr 9: ns16550a
113 * isa_io_base 0xe2000000 isa_mem_base 0xe3000000
116 /* Init CPU internal devices */
117 cpu_mips_irq_init_cpu(env);
118 cpu_mips_clock_init(env);
119 cpu_mips_irqctrl_init();
121 /* Register 64 KB of ISA IO space at 0x10000000 */
122 isa_mmio_init(0x10000000, 0x00010000);
123 isa_mem_base = 0x11000000;
125 /* PC style IRQ (i8259/i8254) and DMA (i8257) */
126 /* The PIC is attached to the MIPS CPU INT0 pin */
127 i8259 = i8259_init(env->irq[2]);
128 rtc_mm_init(0x80004070, i8259[14]);
131 /* Keyboard (i8042) */
132 i8042_mm_init(i8259[6], i8259[7], 0x80005060, 0);
135 for(i = 0; i < 2; i++)
136 isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
137 bs_table[2 * i], bs_table[2 * i + 1]);
139 /* Network controller */
140 /* FIXME: missing NS SONIC DP83932 */
143 /* FIXME: missing NCR 53C94 */
145 /* ISA devices (floppy, serial, parallel) */
146 fdctrl_init(i8259[1], 1, 1, 0x80003000, fd_table);
147 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
149 serial_mm_init(serial_base[i], 0, i8259[serial_irq[i]], serial_hds[i], 1);
152 for (i = 0; i < MAX_PARALLEL_PORTS; i++) {
153 if (parallel_hds[i]) {
154 /* FIXME: memory mapped! parallel_init(0x80008000, i8259[17], parallel_hds[i]); */
159 /* FIXME: missing Jazz sound, IRQ 18 */
162 /* FIXME: missing LED indicator */
165 ds1225y_init(0x80009000, "nvram");
168 //isa_vga_init(ds, phys_ram_base + ram_size, ram_size, vga_ram_size);
171 QEMUMachine mips_pica61_machine = {