3 #define BIOS_FILENAME "mips_bios.bin"
4 //#define BIOS_FILENAME "system.bin"
5 #define KERNEL_LOAD_ADDR 0x80010000
6 #define INITRD_LOAD_ADDR 0x80800000
12 static void pic_irq_request(void *opaque, int level)
14 CPUState *env = first_cpu;
16 env->CP0_Cause |= 0x00000400;
17 cpu_interrupt(env, CPU_INTERRUPT_HARD);
19 env->CP0_Cause &= ~0x00000400;
20 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
24 void cpu_mips_irqctrl_init (void)
28 uint32_t cpu_mips_get_random (CPUState *env)
30 uint32_t now = qemu_get_clock(vm_clock);
32 return now % (MIPS_TLB_NB - env->CP0_Wired) + env->CP0_Wired;
36 uint32_t cpu_mips_get_count (CPUState *env)
38 return env->CP0_Count +
39 (uint32_t)muldiv64(qemu_get_clock(vm_clock),
40 100 * 1000 * 1000, ticks_per_sec);
43 static void cpu_mips_update_count (CPUState *env, uint32_t count,
52 now = qemu_get_clock(vm_clock);
53 next = now + muldiv64(compare - tmp, ticks_per_sec, 100 * 1000 * 1000);
58 fprintf(logfile, "%s: 0x%08llx %08x %08x => 0x%08llx\n",
59 __func__, now, count, compare, next - now);
62 /* Store new count and compare registers */
63 env->CP0_Compare = compare;
65 count - (uint32_t)muldiv64(now, 100 * 1000 * 1000, ticks_per_sec);
67 qemu_mod_timer(env->timer, next);
70 void cpu_mips_store_count (CPUState *env, uint32_t value)
72 cpu_mips_update_count(env, value, env->CP0_Compare);
75 void cpu_mips_store_compare (CPUState *env, uint32_t value)
77 cpu_mips_update_count(env, cpu_mips_get_count(env), value);
78 env->CP0_Cause &= ~0x00008000;
79 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
82 static void mips_timer_cb (void *opaque)
89 fprintf(logfile, "%s\n", __func__);
92 cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare);
93 env->CP0_Cause |= 0x00008000;
94 cpu_interrupt(env, CPU_INTERRUPT_HARD);
97 void cpu_mips_clock_init (CPUState *env)
99 env->timer = qemu_new_timer(vm_clock, &mips_timer_cb, env);
100 env->CP0_Compare = 0;
101 cpu_mips_update_count(env, 1, 0);
104 static void io_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
107 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
108 cpu_outb(NULL, addr & 0xffff, value);
111 static uint32_t io_readb (void *opaque, target_phys_addr_t addr)
113 uint32_t ret = cpu_inb(NULL, addr & 0xffff);
115 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
119 static void io_writew (void *opaque, target_phys_addr_t addr, uint32_t value)
122 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
123 #ifdef TARGET_WORDS_BIGENDIAN
124 value = bswap16(value);
126 cpu_outw(NULL, addr & 0xffff, value);
129 static uint32_t io_readw (void *opaque, target_phys_addr_t addr)
131 uint32_t ret = cpu_inw(NULL, addr & 0xffff);
132 #ifdef TARGET_WORDS_BIGENDIAN
136 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
140 static void io_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
143 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
144 #ifdef TARGET_WORDS_BIGENDIAN
145 value = bswap32(value);
147 cpu_outl(NULL, addr & 0xffff, value);
150 static uint32_t io_readl (void *opaque, target_phys_addr_t addr)
152 uint32_t ret = cpu_inl(NULL, addr & 0xffff);
154 #ifdef TARGET_WORDS_BIGENDIAN
158 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
162 CPUWriteMemoryFunc *io_write[] = {
168 CPUReadMemoryFunc *io_read[] = {
174 void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
175 DisplayState *ds, const char **fd_filename, int snapshot,
176 const char *kernel_filename, const char *kernel_cmdline,
177 const char *initrd_filename)
180 target_ulong kernel_base, kernel_size, initrd_base, initrd_size;
181 unsigned long bios_offset;
187 printf("%s: start\n", __func__);
188 linux_boot = (kernel_filename != NULL);
191 register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
194 cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
195 bios_offset = ram_size + vga_ram_size;
196 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
197 printf("%s: load BIOS '%s' size %d\n", __func__, buf, BIOS_SIZE);
198 ret = load_image(buf, phys_ram_base + bios_offset);
199 if (ret != BIOS_SIZE) {
200 fprintf(stderr, "qemu: could not load MIPS bios '%s'\n", buf);
203 cpu_register_physical_memory((uint32_t)(0x1fc00000),
204 BIOS_SIZE, bios_offset | IO_MEM_ROM);
206 memcpy(phys_ram_base + 0x10000, phys_ram_base + bios_offset, BIOS_SIZE);
207 env->PC = 0x80010004;
209 env->PC = 0xBFC00004;
212 kernel_base = KERNEL_LOAD_ADDR;
213 /* now we can load the kernel */
214 kernel_size = load_image(kernel_filename,
215 phys_ram_base + (kernel_base - 0x80000000));
216 if (kernel_size == (target_ulong) -1) {
217 fprintf(stderr, "qemu: could not load kernel '%s'\n",
222 if (initrd_filename) {
223 initrd_base = INITRD_LOAD_ADDR;
224 initrd_size = load_image(initrd_filename,
225 phys_ram_base + initrd_base);
226 if (initrd_size == (target_ulong) -1) {
227 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
235 env->PC = KERNEL_LOAD_ADDR;
243 /* Init internal devices */
244 cpu_mips_clock_init(env);
245 cpu_mips_irqctrl_init();
247 /* Register 64 KB of ISA IO space at 0x14000000 */
248 io_memory = cpu_register_io_memory(0, io_read, io_write, NULL);
249 cpu_register_physical_memory(0x14000000, 0x00010000, io_memory);
250 isa_mem_base = 0x10000000;
252 isa_pic = pic_init(pic_irq_request, env);
253 pit = pit_init(0x40, 0);
254 serial_init(0x3f8, 4, serial_hds[0]);
255 vga_initialize(NULL, ds, phys_ram_base + ram_size, ram_size,
258 isa_ne2000_init(0x300, 9, &nd_table[0]);
261 QEMUMachine mips_machine = {