2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
30 #include "audio/audio.h"
36 #include "virtio-console.h"
37 #include "hpet_emul.h"
41 /* output Bochs bios info messages */
44 #define BIOS_FILENAME "bios.bin"
45 #define VGABIOS_FILENAME "vgabios.bin"
46 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
48 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
50 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
51 #define ACPI_DATA_SIZE 0x10000
52 #define BIOS_CFG_IOPORT 0x510
53 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
54 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
58 static fdctrl_t *floppy_controller;
59 static RTCState *rtc_state;
61 static IOAPICState *ioapic;
62 static PCIDevice *i440fx_state;
64 typedef struct rom_reset_data {
66 target_phys_addr_t addr;
70 static void option_rom_reset(void *_rrd)
72 RomResetData *rrd = _rrd;
74 cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
77 static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
79 RomResetData *rrd = qemu_malloc(sizeof *rrd);
81 rrd->data = qemu_malloc(size);
82 cpu_physical_memory_read(addr, rrd->data, size);
85 qemu_register_reset(option_rom_reset, rrd);
88 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
92 /* MSDOS compatibility mode FPU exception support */
93 static qemu_irq ferr_irq;
94 /* XXX: add IGNNE support */
95 void cpu_set_ferr(CPUX86State *s)
97 qemu_irq_raise(ferr_irq);
100 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
102 qemu_irq_lower(ferr_irq);
106 uint64_t cpu_get_tsc(CPUX86State *env)
108 /* Note: when using kqemu, it is more logical to return the host TSC
109 because kqemu does not trap the RDTSC instruction for
110 performance reasons */
112 if (env->kqemu_enabled) {
113 return cpu_get_real_ticks();
117 return cpu_get_ticks();
122 void cpu_smm_update(CPUState *env)
124 if (i440fx_state && env == first_cpu)
125 i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
130 int cpu_get_pic_interrupt(CPUState *env)
134 intno = apic_get_interrupt(env);
136 /* set irq request if a PIC irq is still pending */
137 /* XXX: improve that */
138 pic_update_irq(isa_pic);
141 /* read the irq from the PIC */
142 if (!apic_accept_pic_intr(env))
145 intno = pic_read_irq(isa_pic);
149 static void pic_irq_request(void *opaque, int irq, int level)
151 CPUState *env = first_cpu;
153 if (env->apic_state) {
155 if (apic_accept_pic_intr(env))
156 apic_deliver_pic_intr(env, level);
161 cpu_interrupt(env, CPU_INTERRUPT_HARD);
163 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
167 /* PC cmos mappings */
169 #define REG_EQUIPMENT_BYTE 0x14
171 static int cmos_get_fd_drive_type(int fd0)
177 /* 1.44 Mb 3"5 drive */
181 /* 2.88 Mb 3"5 drive */
185 /* 1.2 Mb 5"5 drive */
195 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
197 RTCState *s = rtc_state;
198 int cylinders, heads, sectors;
199 bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors);
200 rtc_set_memory(s, type_ofs, 47);
201 rtc_set_memory(s, info_ofs, cylinders);
202 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
203 rtc_set_memory(s, info_ofs + 2, heads);
204 rtc_set_memory(s, info_ofs + 3, 0xff);
205 rtc_set_memory(s, info_ofs + 4, 0xff);
206 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
207 rtc_set_memory(s, info_ofs + 6, cylinders);
208 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
209 rtc_set_memory(s, info_ofs + 8, sectors);
212 /* convert boot_device letter to something recognizable by the bios */
213 static int boot_device2nibble(char boot_device)
215 switch(boot_device) {
218 return 0x01; /* floppy boot */
220 return 0x02; /* hard drive boot */
222 return 0x03; /* CD-ROM boot */
224 return 0x04; /* Network boot */
229 /* copy/pasted from cmos_init, should be made a general function
230 and used there as well */
231 static int pc_boot_set(void *opaque, const char *boot_device)
233 Monitor *mon = cur_mon;
234 #define PC_MAX_BOOT_DEVICES 3
235 RTCState *s = (RTCState *)opaque;
236 int nbds, bds[3] = { 0, };
239 nbds = strlen(boot_device);
240 if (nbds > PC_MAX_BOOT_DEVICES) {
241 monitor_printf(mon, "Too many boot devices for PC\n");
244 for (i = 0; i < nbds; i++) {
245 bds[i] = boot_device2nibble(boot_device[i]);
247 monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
252 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
253 rtc_set_memory(s, 0x38, (bds[2] << 4));
257 /* hd_table must contain 4 block drivers */
258 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
259 const char *boot_device, BlockDriverState **hd_table)
261 RTCState *s = rtc_state;
262 int nbds, bds[3] = { 0, };
267 /* various important CMOS locations needed by PC/Bochs bios */
270 val = 640; /* base memory in K */
271 rtc_set_memory(s, 0x15, val);
272 rtc_set_memory(s, 0x16, val >> 8);
274 val = (ram_size / 1024) - 1024;
277 rtc_set_memory(s, 0x17, val);
278 rtc_set_memory(s, 0x18, val >> 8);
279 rtc_set_memory(s, 0x30, val);
280 rtc_set_memory(s, 0x31, val >> 8);
282 if (above_4g_mem_size) {
283 rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
284 rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
285 rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
288 if (ram_size > (16 * 1024 * 1024))
289 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
294 rtc_set_memory(s, 0x34, val);
295 rtc_set_memory(s, 0x35, val >> 8);
297 /* set the number of CPU */
298 rtc_set_memory(s, 0x5f, smp_cpus - 1);
300 /* set boot devices, and disable floppy signature check if requested */
301 #define PC_MAX_BOOT_DEVICES 3
302 nbds = strlen(boot_device);
303 if (nbds > PC_MAX_BOOT_DEVICES) {
304 fprintf(stderr, "Too many boot devices for PC\n");
307 for (i = 0; i < nbds; i++) {
308 bds[i] = boot_device2nibble(boot_device[i]);
310 fprintf(stderr, "Invalid boot device for PC: '%c'\n",
315 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
316 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
320 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
321 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
323 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
324 rtc_set_memory(s, 0x10, val);
336 val |= 0x01; /* 1 drive, ready for boot */
339 val |= 0x41; /* 2 drives, ready for boot */
342 val |= 0x02; /* FPU is there */
343 val |= 0x04; /* PS/2 mouse installed */
344 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
348 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
350 cmos_init_hd(0x19, 0x1b, hd_table[0]);
352 cmos_init_hd(0x1a, 0x24, hd_table[1]);
355 for (i = 0; i < 4; i++) {
357 int cylinders, heads, sectors, translation;
358 /* NOTE: bdrv_get_geometry_hint() returns the physical
359 geometry. It is always such that: 1 <= sects <= 63, 1
360 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
361 geometry can be different if a translation is done. */
362 translation = bdrv_get_translation_hint(hd_table[i]);
363 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
364 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors);
365 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
366 /* No translation. */
369 /* LBA translation. */
375 val |= translation << (i * 2);
378 rtc_set_memory(s, 0x39, val);
381 void ioport_set_a20(int enable)
383 /* XXX: send to all CPUs ? */
384 cpu_x86_set_a20(first_cpu, enable);
387 int ioport_get_a20(void)
389 return ((first_cpu->a20_mask >> 20) & 1);
392 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
394 ioport_set_a20((val >> 1) & 1);
395 /* XXX: bit 0 is fast reset */
398 static uint32_t ioport92_read(void *opaque, uint32_t addr)
400 return ioport_get_a20() << 1;
403 /***********************************************************/
404 /* Bochs BIOS debug ports */
406 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
408 static const char shutdown_str[8] = "Shutdown";
409 static int shutdown_index = 0;
412 /* Bochs BIOS messages */
415 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
420 fprintf(stderr, "%c", val);
424 /* same as Bochs power off */
425 if (val == shutdown_str[shutdown_index]) {
427 if (shutdown_index == 8) {
429 qemu_system_shutdown_request();
436 /* LGPL'ed VGA BIOS messages */
439 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
444 fprintf(stderr, "%c", val);
450 extern uint64_t node_cpumask[MAX_NODES];
452 static void bochs_bios_init(void)
455 uint8_t *smbios_table;
457 uint64_t *numa_fw_cfg;
460 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
461 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
462 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
463 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
464 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
466 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
467 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
468 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
469 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
471 fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
472 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
473 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
474 fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
477 smbios_table = smbios_get_table(&smbios_len);
479 fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
480 smbios_table, smbios_len);
482 /* allocate memory for the NUMA channel: one (64bit) word for the number
483 * of nodes, one word for each VCPU->node and one word for each node to
484 * hold the amount of memory.
486 numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
487 numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
488 for (i = 0; i < smp_cpus; i++) {
489 for (j = 0; j < nb_numa_nodes; j++) {
490 if (node_cpumask[j] & (1 << i)) {
491 numa_fw_cfg[i + 1] = cpu_to_le64(j);
496 for (i = 0; i < nb_numa_nodes; i++) {
497 numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
499 fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
500 (1 + smp_cpus + nb_numa_nodes) * 8);
503 /* Generate an initial boot sector which sets state and jump to
504 a specified vector */
505 static void generate_bootsect(target_phys_addr_t option_rom,
506 uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
508 uint8_t rom[512], *p, *reloc;
512 memset(rom, 0, sizeof(rom));
515 /* Make sure we have an option rom signature */
519 /* ROM size in sectors*/
524 *p++ = 0x50; /* push ax */
525 *p++ = 0x1e; /* push ds */
526 *p++ = 0x31; *p++ = 0xc0; /* xor ax, ax */
527 *p++ = 0x8e; *p++ = 0xd8; /* mov ax, ds */
529 *p++ = 0xc7; *p++ = 0x06; /* movvw _start,0x64 */
530 *p++ = 0x64; *p++ = 0x00;
532 *p++ = 0x00; *p++ = 0x00;
534 *p++ = 0x8c; *p++ = 0x0e; /* mov cs,0x66 */
535 *p++ = 0x66; *p++ = 0x00;
537 *p++ = 0x1f; /* pop ds */
538 *p++ = 0x58; /* pop ax */
539 *p++ = 0xcb; /* lret */
544 *p++ = 0xfa; /* CLI */
545 *p++ = 0xfc; /* CLD */
547 for (i = 0; i < 6; i++) {
548 if (i == 1) /* Skip CS */
551 *p++ = 0xb8; /* MOV AX,imm16 */
554 *p++ = 0x8e; /* MOV <seg>,AX */
555 *p++ = 0xc0 + (i << 3);
558 for (i = 0; i < 8; i++) {
559 *p++ = 0x66; /* 32-bit operand size */
560 *p++ = 0xb8 + i; /* MOV <reg>,imm32 */
567 *p++ = 0xea; /* JMP FAR */
570 *p++ = segs[1]; /* CS */
575 for (i = 0; i < (sizeof(rom) - 1); i++)
577 rom[sizeof(rom) - 1] = -sum;
579 cpu_physical_memory_write_rom(option_rom, rom, sizeof(rom));
580 option_rom_setup_reset(option_rom, sizeof (rom));
583 static long get_file_size(FILE *f)
587 /* XXX: on Unix systems, using fstat() probably makes more sense */
590 fseek(f, 0, SEEK_END);
592 fseek(f, where, SEEK_SET);
597 static void load_linux(target_phys_addr_t option_rom,
598 const char *kernel_filename,
599 const char *initrd_filename,
600 const char *kernel_cmdline)
606 int setup_size, kernel_size, initrd_size, cmdline_size;
608 uint8_t header[1024];
609 target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
612 /* Align to 16 bytes as a paranoia measure */
613 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
615 /* load the kernel header */
616 f = fopen(kernel_filename, "rb");
617 if (!f || !(kernel_size = get_file_size(f)) ||
618 fread(header, 1, 1024, f) != 1024) {
619 fprintf(stderr, "qemu: could not load kernel '%s'\n",
624 /* kernel protocol version */
626 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
628 if (ldl_p(header+0x202) == 0x53726448)
629 protocol = lduw_p(header+0x206);
633 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
636 cmdline_addr = 0x9a000 - cmdline_size;
638 } else if (protocol < 0x202) {
639 /* High but ancient kernel */
641 cmdline_addr = 0x9a000 - cmdline_size;
642 prot_addr = 0x100000;
644 /* High and recent kernel */
646 cmdline_addr = 0x20000;
647 prot_addr = 0x100000;
652 "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
653 "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
654 "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
660 /* highest address for loading the initrd */
661 if (protocol >= 0x203)
662 initrd_max = ldl_p(header+0x22c);
664 initrd_max = 0x37ffffff;
666 if (initrd_max >= ram_size-ACPI_DATA_SIZE)
667 initrd_max = ram_size-ACPI_DATA_SIZE-1;
669 /* kernel command line */
670 pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
672 if (protocol >= 0x202) {
673 stl_p(header+0x228, cmdline_addr);
675 stw_p(header+0x20, 0xA33F);
676 stw_p(header+0x22, cmdline_addr-real_addr);
680 /* High nybble = B reserved for Qemu; low nybble is revision number.
681 If this code is substantially changed, you may want to consider
682 incrementing the revision. */
683 if (protocol >= 0x200)
684 header[0x210] = 0xB0;
687 if (protocol >= 0x201) {
688 header[0x211] |= 0x80; /* CAN_USE_HEAP */
689 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
693 if (initrd_filename) {
694 if (protocol < 0x200) {
695 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
699 fi = fopen(initrd_filename, "rb");
701 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
706 initrd_size = get_file_size(fi);
707 initrd_addr = (initrd_max-initrd_size) & ~4095;
709 fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
710 "\n", initrd_size, initrd_addr);
712 if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
713 fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
719 stl_p(header+0x218, initrd_addr);
720 stl_p(header+0x21c, initrd_size);
723 /* store the finalized header and load the rest of the kernel */
724 cpu_physical_memory_write(real_addr, header, 1024);
726 setup_size = header[0x1f1];
730 setup_size = (setup_size+1)*512;
731 kernel_size -= setup_size; /* Size of protected-mode code */
733 if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
734 !fread_targphys_ok(prot_addr, kernel_size, f)) {
735 fprintf(stderr, "qemu: read error on kernel '%s'\n",
741 /* generate bootsector to set up the initial register state */
742 real_seg = real_addr >> 4;
743 seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
744 seg[1] = real_seg+0x20; /* CS */
745 memset(gpr, 0, sizeof gpr);
746 gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
748 option_rom_setup_reset(real_addr, setup_size);
749 option_rom_setup_reset(prot_addr, kernel_size);
750 option_rom_setup_reset(cmdline_addr, cmdline_size);
752 option_rom_setup_reset(initrd_addr, initrd_size);
754 generate_bootsect(option_rom, gpr, seg, 0);
757 static void main_cpu_reset(void *opaque)
759 CPUState *env = opaque;
763 static const int ide_iobase[2] = { 0x1f0, 0x170 };
764 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
765 static const int ide_irq[2] = { 14, 15 };
767 #define NE2000_NB_MAX 6
769 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
770 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
772 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
773 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
775 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
776 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
779 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
782 int audio_enabled = 0;
784 for (c = soundhw; !audio_enabled && c->name; ++c) {
785 audio_enabled = c->enabled;
789 for (c = soundhw; c->name; ++c) {
792 c->init.init_isa(pic);
795 c->init.init_pci(pci_bus);
804 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
806 static int nb_ne2k = 0;
808 if (nb_ne2k == NE2000_NB_MAX)
810 isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
814 static int load_option_rom(const char *oprom, target_phys_addr_t start,
815 target_phys_addr_t end)
819 size = get_image_size(oprom);
820 if (size > 0 && start + size > end) {
821 fprintf(stderr, "Not enough space to load option rom '%s'\n",
825 size = load_image_targphys(oprom, start, end - start);
827 fprintf(stderr, "Could not load option rom '%s'\n", oprom);
830 /* Round up optiom rom size to the next 2k boundary */
831 size = (size + 2047) & ~2047;
832 option_rom_setup_reset(start, size);
836 /* PC hardware initialisation */
837 static void pc_init1(ram_addr_t ram_size,
838 const char *boot_device,
839 const char *kernel_filename, const char *kernel_cmdline,
840 const char *initrd_filename,
841 int pci_enabled, const char *cpu_model)
844 int ret, linux_boot, i;
845 ram_addr_t ram_addr, bios_offset, option_rom_offset;
846 ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
847 int bios_size, isa_bios_size, oprom_area_size;
849 int piix3_devfn = -1;
854 BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
855 BlockDriverState *fd[MAX_FD];
856 int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
858 if (ram_size >= 0xe0000000 ) {
859 above_4g_mem_size = ram_size - 0xe0000000;
860 below_4g_mem_size = 0xe0000000;
862 below_4g_mem_size = ram_size;
865 linux_boot = (kernel_filename != NULL);
868 if (cpu_model == NULL) {
870 cpu_model = "qemu64";
872 cpu_model = "qemu32";
876 for(i = 0; i < smp_cpus; i++) {
877 env = cpu_init(cpu_model);
879 fprintf(stderr, "Unable to find x86 CPU definition\n");
885 /* XXX: enable it in all cases */
886 env->cpuid_features |= CPUID_APIC;
888 qemu_register_reset(main_cpu_reset, env);
897 ram_addr = qemu_ram_alloc(0xa0000);
898 cpu_register_physical_memory(0, 0xa0000, ram_addr);
900 /* Allocate, even though we won't register, so we don't break the
901 * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
902 * and some bios areas, which will be registered later
904 ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
905 ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
906 cpu_register_physical_memory(0x100000,
907 below_4g_mem_size - 0x100000,
910 /* above 4giga memory allocation */
911 if (above_4g_mem_size > 0) {
912 ram_addr = qemu_ram_alloc(above_4g_mem_size);
913 cpu_register_physical_memory(0x100000000ULL,
920 if (bios_name == NULL)
921 bios_name = BIOS_FILENAME;
922 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
923 bios_size = get_image_size(buf);
924 if (bios_size <= 0 ||
925 (bios_size % 65536) != 0) {
928 bios_offset = qemu_ram_alloc(bios_size);
929 ret = load_image(buf, qemu_get_ram_ptr(bios_offset));
930 if (ret != bios_size) {
932 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
935 /* map the last 128KB of the BIOS in ISA space */
936 isa_bios_size = bios_size;
937 if (isa_bios_size > (128 * 1024))
938 isa_bios_size = 128 * 1024;
939 cpu_register_physical_memory(0x100000 - isa_bios_size,
941 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
945 option_rom_offset = qemu_ram_alloc(0x20000);
947 cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset);
951 if (cirrus_vga_enabled) {
952 snprintf(buf, sizeof(buf), "%s/%s", bios_dir,
953 VGABIOS_CIRRUS_FILENAME);
955 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
957 oprom_area_size = load_option_rom(buf, 0xc0000, 0xe0000);
959 /* Although video roms can grow larger than 0x8000, the area between
960 * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
961 * for any other kind of option rom inside this area */
962 if (oprom_area_size < 0x8000)
963 oprom_area_size = 0x8000;
966 load_linux(0xc0000 + oprom_area_size,
967 kernel_filename, initrd_filename, kernel_cmdline);
968 oprom_area_size += 2048;
971 for (i = 0; i < nb_option_roms; i++) {
972 oprom_area_size += load_option_rom(option_rom[i],
973 0xc0000 + oprom_area_size, 0xe0000);
976 /* map all the bios at the top of memory */
977 cpu_register_physical_memory((uint32_t)(-bios_size),
978 bios_size, bios_offset | IO_MEM_ROM);
982 cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
983 i8259 = i8259_init(cpu_irq[0]);
984 ferr_irq = i8259[13];
987 pci_bus = i440fx_init(&i440fx_state, i8259);
988 piix3_devfn = piix3_init(pci_bus, -1);
993 /* init basic PC hardware */
994 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
996 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
998 if (cirrus_vga_enabled) {
1000 pci_cirrus_vga_init(pci_bus);
1002 isa_cirrus_vga_init();
1004 } else if (vmsvga_enabled) {
1006 pci_vmsvga_init(pci_bus);
1008 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1009 } else if (std_vga_enabled) {
1011 pci_vga_init(pci_bus, 0, 0);
1017 rtc_state = rtc_init(0x70, i8259[8], 2000);
1019 qemu_register_boot_set(pc_boot_set, rtc_state);
1021 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1022 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1025 ioapic = ioapic_init();
1027 pit = pit_init(0x40, i8259[0]);
1033 pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
1036 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1037 if (serial_hds[i]) {
1038 serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
1043 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1044 if (parallel_hds[i]) {
1045 parallel_init(parallel_io[i], i8259[parallel_irq[i]],
1050 watchdog_pc_init(pci_bus);
1052 for(i = 0; i < nb_nics; i++) {
1053 NICInfo *nd = &nd_table[i];
1055 if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1056 pc_init_ne2k_isa(nd, i8259);
1058 pci_nic_init(pci_bus, nd, -1, "ne2k_pci");
1061 qemu_system_hot_add_init();
1063 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1064 fprintf(stderr, "qemu: too many IDE bus\n");
1068 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1069 index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1071 hd[i] = drives_table[index].bdrv;
1077 pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1079 for(i = 0; i < MAX_IDE_BUS; i++) {
1080 isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1081 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1085 i8042_init(i8259[1], i8259[12], 0x60);
1088 audio_init(pci_enabled ? pci_bus : NULL, i8259);
1091 for(i = 0; i < MAX_FD; i++) {
1092 index = drive_get_index(IF_FLOPPY, 0, i);
1094 fd[i] = drives_table[index].bdrv;
1098 floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1100 cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1102 if (pci_enabled && usb_enabled) {
1103 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1106 if (pci_enabled && acpi_enabled) {
1107 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1110 /* TODO: Populate SPD eeprom data. */
1111 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1112 for (i = 0; i < 8; i++) {
1113 smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1118 i440fx_init_memory_mappings(i440fx_state);
1125 max_bus = drive_get_max_bus(IF_SCSI);
1126 for (bus = 0; bus <= max_bus; bus++) {
1127 pci_create_simple(pci_bus, -1, "lsi53c895a");
1131 /* Add virtio block devices */
1136 while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1137 pci_create_simple(pci_bus, -1, "virtio-blk");
1142 /* Add virtio balloon device */
1144 pci_create_simple(pci_bus, -1, "virtio-balloon");
1147 /* Add virtio console devices */
1149 for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1151 virtio_console_init(pci_bus, virtcon_hds[i]);
1156 static void pc_init_pci(ram_addr_t ram_size,
1157 const char *boot_device,
1158 const char *kernel_filename,
1159 const char *kernel_cmdline,
1160 const char *initrd_filename,
1161 const char *cpu_model)
1163 pc_init1(ram_size, boot_device,
1164 kernel_filename, kernel_cmdline,
1165 initrd_filename, 1, cpu_model);
1168 static void pc_init_isa(ram_addr_t ram_size,
1169 const char *boot_device,
1170 const char *kernel_filename,
1171 const char *kernel_cmdline,
1172 const char *initrd_filename,
1173 const char *cpu_model)
1175 pc_init1(ram_size, boot_device,
1176 kernel_filename, kernel_cmdline,
1177 initrd_filename, 0, cpu_model);
1180 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1181 BIOS will read it and start S3 resume at POST Entry */
1182 void cmos_set_s3_resume(void)
1185 rtc_set_memory(rtc_state, 0xF, 0xFE);
1188 QEMUMachine pc_machine = {
1190 .desc = "Standard PC",
1191 .init = pc_init_pci,
1195 QEMUMachine isapc_machine = {
1197 .desc = "ISA-only PC",
1198 .init = pc_init_isa,