2 * Arm PrimeCell PL110 Color LCD Controller
4 * Copyright (c) 2005-2006 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licenced under the GNU LGPL
11 #include "primecell.h"
14 #define PL110_CR_EN 0x001
15 #define PL110_CR_BGR 0x100
16 #define PL110_CR_BEBO 0x200
17 #define PL110_CR_BEPO 0x400
18 #define PL110_CR_PWR 0x800
33 /* The Versatile/PB uses a slightly modified PL110 controller. */
43 enum pl110_bppmode bpp;
45 uint32_t pallette[256];
46 uint32_t raw_pallette[128];
50 static const unsigned char pl110_id[] =
51 { 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
53 /* The Arm documentation (DDI0224C) says the CLDC on the Versatile board
54 has a different ID. However Linux only looks for the normal ID. */
56 static const unsigned char pl110_versatile_id[] =
57 { 0x93, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
59 #define pl110_versatile_id pl110_id
62 static inline uint32_t rgb_to_pixel8(unsigned int r, unsigned int g, unsigned b)
64 return ((r >> 5) << 5) | ((g >> 5) << 2) | (b >> 6);
67 static inline uint32_t rgb_to_pixel15(unsigned int r, unsigned int g, unsigned b)
69 return ((r >> 3) << 10) | ((g >> 3) << 5) | (b >> 3);
72 static inline uint32_t rgb_to_pixel16(unsigned int r, unsigned int g, unsigned b)
74 return ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3);
77 static inline uint32_t rgb_to_pixel24(unsigned int r, unsigned int g, unsigned b)
79 return (r << 16) | (g << 8) | b;
82 static inline uint32_t rgb_to_pixel32(unsigned int r, unsigned int g, unsigned b)
84 return (r << 16) | (g << 8) | b;
87 typedef void (*drawfn)(uint32_t *, uint8_t *, const uint8_t *, int);
90 #include "pl110_template.h"
92 #include "pl110_template.h"
94 #include "pl110_template.h"
96 #include "pl110_template.h"
98 #include "pl110_template.h"
100 static int pl110_enabled(pl110_state *s)
102 return (s->cr & PL110_CR_EN) && (s->cr & PL110_CR_PWR);
105 static void pl110_update_display(void *opaque)
107 pl110_state *s = (pl110_state *)opaque;
118 int dirty, new_dirty;
122 if (!pl110_enabled(s))
125 switch (ds_get_bits_per_pixel(s->ds)) {
129 fntable = pl110_draw_fn_8;
133 fntable = pl110_draw_fn_15;
137 fntable = pl110_draw_fn_16;
141 fntable = pl110_draw_fn_24;
145 fntable = pl110_draw_fn_32;
149 fprintf(stderr, "pl110: Bad color depth\n");
152 if (s->cr & PL110_CR_BGR)
157 if (s->cr & PL110_CR_BEBO)
158 fn = fntable[s->bpp + 6 + bpp_offset];
159 else if (s->cr & PL110_CR_BEPO)
160 fn = fntable[s->bpp + 12 + bpp_offset];
162 fn = fntable[s->bpp + bpp_offset];
184 dest_width *= s->cols;
185 pallette = s->pallette;
187 /* HACK: Arm aliases physical memory at 0x80000000. */
188 if (base > 0x80000000)
190 src = phys_ram_base + base;
191 dest = ds_get_data(s->ds);
195 dirty = cpu_physical_memory_get_dirty(addr, VGA_DIRTY_FLAG);
197 for (i = 0; i < s->rows; i++) {
198 if ((addr & ~TARGET_PAGE_MASK) + src_width >= TARGET_PAGE_SIZE) {
201 for (tmp = 0; tmp < src_width; tmp += TARGET_PAGE_SIZE) {
202 new_dirty |= cpu_physical_memory_get_dirty(addr + tmp,
207 if (dirty || new_dirty || s->invalidate) {
208 fn(pallette, dest, src, s->cols);
222 cpu_physical_memory_reset_dirty(base + first * src_width,
223 base + (last + 1) * src_width,
225 dpy_update(s->ds, 0, first, s->cols, last - first + 1);
228 static void pl110_invalidate_display(void * opaque)
230 pl110_state *s = (pl110_state *)opaque;
234 static void pl110_update_pallette(pl110_state *s, int n)
238 unsigned int r, g, b;
240 raw = s->raw_pallette[n];
242 for (i = 0; i < 2; i++) {
243 r = (raw & 0x1f) << 3;
245 g = (raw & 0x1f) << 3;
247 b = (raw & 0x1f) << 3;
248 /* The I bit is ignored. */
250 switch (ds_get_bits_per_pixel(s->ds)) {
252 s->pallette[n] = rgb_to_pixel8(r, g, b);
255 s->pallette[n] = rgb_to_pixel15(r, g, b);
258 s->pallette[n] = rgb_to_pixel16(r, g, b);
262 s->pallette[n] = rgb_to_pixel32(r, g, b);
269 static void pl110_resize(pl110_state *s, int width, int height)
271 if (width != s->cols || height != s->rows) {
272 if (pl110_enabled(s)) {
273 qemu_console_resize(s->ds, width, height);
280 /* Update interrupts. */
281 static void pl110_update(pl110_state *s)
283 /* TODO: Implement interrupts. */
286 static uint32_t pl110_read(void *opaque, target_phys_addr_t offset)
288 pl110_state *s = (pl110_state *)opaque;
290 if (offset >= 0xfe0 && offset < 0x1000) {
292 return pl110_versatile_id[(offset - 0xfe0) >> 2];
294 return pl110_id[(offset - 0xfe0) >> 2];
296 if (offset >= 0x200 && offset < 0x400) {
297 return s->raw_pallette[(offset - 0x200) >> 2];
299 switch (offset >> 2) {
300 case 0: /* LCDTiming0 */
302 case 1: /* LCDTiming1 */
304 case 2: /* LCDTiming2 */
306 case 3: /* LCDTiming3 */
308 case 4: /* LCDUPBASE */
310 case 5: /* LCDLPBASE */
312 case 6: /* LCDIMSC */
316 case 7: /* LCDControl */
321 return s->int_status;
323 return s->int_status & s->int_mask;
324 case 11: /* LCDUPCURR */
325 /* TODO: Implement vertical refresh. */
327 case 12: /* LCDLPCURR */
330 cpu_abort (cpu_single_env, "pl110_read: Bad offset %x\n", (int)offset);
335 static void pl110_write(void *opaque, target_phys_addr_t offset,
338 pl110_state *s = (pl110_state *)opaque;
341 /* For simplicity invalidate the display whenever a control register
344 if (offset >= 0x200 && offset < 0x400) {
346 n = (offset - 0x200) >> 2;
347 s->raw_pallette[(offset - 0x200) >> 2] = val;
348 pl110_update_pallette(s, n);
351 switch (offset >> 2) {
352 case 0: /* LCDTiming0 */
354 n = ((val & 0xfc) + 4) * 4;
355 pl110_resize(s, n, s->rows);
357 case 1: /* LCDTiming1 */
359 n = (val & 0x3ff) + 1;
360 pl110_resize(s, s->cols, n);
362 case 2: /* LCDTiming2 */
365 case 3: /* LCDTiming3 */
368 case 4: /* LCDUPBASE */
371 case 5: /* LCDLPBASE */
374 case 6: /* LCDIMSC */
381 case 7: /* LCDControl */
386 s->bpp = (val >> 1) & 7;
387 if (pl110_enabled(s)) {
388 qemu_console_resize(s->ds, s->cols, s->rows);
391 case 10: /* LCDICR */
392 s->int_status &= ~val;
396 cpu_abort (cpu_single_env, "pl110_write: Bad offset %x\n", (int)offset);
400 static CPUReadMemoryFunc *pl110_readfn[] = {
406 static CPUWriteMemoryFunc *pl110_writefn[] = {
412 void *pl110_init(uint32_t base, qemu_irq irq, int versatile)
417 s = (pl110_state *)qemu_mallocz(sizeof(pl110_state));
418 iomemtype = cpu_register_io_memory(0, pl110_readfn,
420 cpu_register_physical_memory(base, 0x00001000, iomemtype);
421 s->versatile = versatile;
423 s->ds = graphic_console_init(pl110_update_display,
424 pl110_invalidate_display,
426 /* ??? Save/restore. */