2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
33 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
38 static CPUWriteMemoryFunc *unin_write[] = {
44 static CPUReadMemoryFunc *unin_read[] = {
50 /* PowerPC Mac99 hardware initialisation */
51 static void ppc_core99_init (int ram_size, int vga_ram_size,
52 const char *boot_device, DisplayState *ds,
53 const char **fd_filename, int snapshot,
54 const char *kernel_filename,
55 const char *kernel_cmdline,
56 const char *initrd_filename,
57 const char *cpu_model)
59 CPUState *env = NULL, *envs[MAX_CPUS];
61 qemu_irq *pic, **openpic_irqs;
64 unsigned long bios_offset, vga_bios_offset;
65 uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
73 int vga_bios_size, bios_size;
75 int pic_mem_index, dbdma_mem_index, cuda_mem_index;
77 int ppc_boot_device = boot_device[0];
79 linux_boot = (kernel_filename != NULL);
82 if (cpu_model == NULL)
83 cpu_model = "default";
84 for (i = 0; i < smp_cpus; i++) {
85 env = cpu_init(cpu_model);
87 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
90 /* Set time-base frequency to 100 Mhz */
91 cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
93 env->osi_call = vga_osi_call;
95 qemu_register_reset(&cpu_ppc_reset, env);
96 register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
99 if (env->nip < 0xFFF80000) {
100 /* Special test for PowerPC 601:
101 * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
102 * But the NVRAM is located at 0xFFF04000...
104 cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
108 cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
110 /* allocate and load BIOS */
111 bios_offset = ram_size + vga_ram_size;
112 if (bios_name == NULL)
113 bios_name = BIOS_FILENAME;
114 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
115 bios_size = load_image(buf, phys_ram_base + bios_offset);
116 if (bios_size < 0 || bios_size > BIOS_SIZE) {
117 cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
120 bios_size = (bios_size + 0xfff) & ~0xfff;
121 if (bios_size > 0x00080000) {
122 /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
123 cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
125 cpu_register_physical_memory((uint32_t)(-bios_size),
126 bios_size, bios_offset | IO_MEM_ROM);
128 /* allocate and load VGA BIOS */
129 vga_bios_offset = bios_offset + bios_size;
130 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
131 vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
132 if (vga_bios_size < 0) {
133 /* if no bios is present, we can still work */
134 fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
137 /* set a specific header (XXX: find real Apple format for NDRV
139 phys_ram_base[vga_bios_offset] = 'N';
140 phys_ram_base[vga_bios_offset + 1] = 'D';
141 phys_ram_base[vga_bios_offset + 2] = 'R';
142 phys_ram_base[vga_bios_offset + 3] = 'V';
143 cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
147 vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
150 kernel_base = KERNEL_LOAD_ADDR;
151 /* now we can load the kernel */
152 kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
153 if (kernel_size < 0) {
154 cpu_abort(env, "qemu: could not load kernel '%s'\n",
159 if (initrd_filename) {
160 initrd_base = INITRD_LOAD_ADDR;
161 initrd_size = load_image(initrd_filename,
162 phys_ram_base + initrd_base);
163 if (initrd_size < 0) {
164 cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
172 ppc_boot_device = 'm';
180 isa_mem_base = 0x80000000;
182 /* Register 8 MB of ISA IO space */
183 isa_mmio_init(0xf2000000, 0x00800000);
186 unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
187 cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
189 openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
191 qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
192 for (i = 0; i < smp_cpus; i++) {
193 /* Mac99 IRQ connection between OpenPIC outputs pins
194 * and PowerPC input pins
196 switch (PPC_INPUT(env)) {
197 case PPC_FLAGS_INPUT_6xx:
198 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
199 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
200 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
201 openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
202 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
203 openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
204 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
205 /* Not connected ? */
206 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
208 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
209 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
211 #if defined(TARGET_PPC64)
212 case PPC_FLAGS_INPUT_970:
213 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
214 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
215 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
216 openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
217 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
218 openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
219 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
220 /* Not connected ? */
221 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
223 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
224 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
226 #endif /* defined(TARGET_PPC64) */
228 cpu_abort(env, "Bus model not supported on mac99 machine\n");
232 pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
233 pci_bus = pci_pmac_init(pic);
234 /* init basic PC hardware */
235 pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
236 ram_size, vga_ram_size,
237 vga_bios_offset, vga_bios_size);
239 /* XXX: suppress that */
240 dummy_irq = i8259_init(NULL);
242 /* XXX: use Mac Serial port */
243 serial_init(0x3f8, dummy_irq[4], serial_hds[0]);
244 for(i = 0; i < nb_nics; i++) {
245 if (!nd_table[i].model)
246 nd_table[i].model = "ne2k_pci";
247 pci_nic_init(pci_bus, &nd_table[i], -1);
250 ide_mem_index[0] = pmac_ide_init(&bs_table[0], pic[0x13]);
251 ide_mem_index[1] = pmac_ide_init(&bs_table[2], pic[0x14]);
253 pci_cmd646_ide_init(pci_bus, &bs_table[0], 0);
255 /* cuda also initialize ADB */
256 cuda_init(&cuda_mem_index, pic[0x19]);
258 adb_kbd_init(&adb_bus);
259 adb_mouse_init(&adb_bus);
261 dbdma_init(&dbdma_mem_index);
263 macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
264 cuda_mem_index, NULL, 2, ide_mem_index);
267 usb_ohci_init_pci(pci_bus, 3, -1);
270 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
272 #if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
273 /* The NewWorld NVRAM is not located in the MacIO device */
274 nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
275 pmac_format_nvram_partition(nvr, 0x2000);
276 macio_nvram_map(nvr, 0xFFF04000);
278 nvram.read_fn = &macio_nvram_read;
279 nvram.write_fn = &macio_nvram_write;
281 m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
282 nvram.opaque = m48t59;
283 nvram.read_fn = &m48t59_read;
284 nvram.write_fn = &m48t59_write;
286 PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
287 ppc_boot_device, kernel_base, kernel_size,
289 initrd_base, initrd_size,
290 /* XXX: need an option to load a NVRAM image */
292 graphic_width, graphic_height, graphic_depth);
293 /* No PCI init: the BIOS will do it */
295 /* Special port to get debug messages from Open-Firmware */
296 register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
299 QEMUMachine core99_machine = {
301 "Mac99 based PowerMAC",