2 * PXA270-based Clamshell PDA platforms.
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
7 * This code is licensed under the GNU GPL v2.
17 #include "qemu-timer.h"
22 #include "audio/audio.h"
25 #define spitz_printf(format, ...) \
26 fprintf(stderr, "%s: " format, __FUNCTION__, ##__VA_ARGS__)
28 #if TARGET_PHYS_ADDR_BITS == 32
29 #define REG_FMT "0x%02x"
31 #define REG_FMT "0x%02lx"
35 #define FLASH_BASE 0x0c000000
36 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
37 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
38 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
39 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */
40 #define FLASH_ECCCLRR 0x10 /* Clear ECC */
41 #define FLASH_FLASHIO 0x14 /* Flash I/O */
42 #define FLASH_FLASHCTL 0x18 /* Flash Control */
44 #define FLASHCTL_CE0 (1 << 0)
45 #define FLASHCTL_CLE (1 << 1)
46 #define FLASHCTL_ALE (1 << 2)
47 #define FLASHCTL_WP (1 << 3)
48 #define FLASHCTL_CE1 (1 << 4)
49 #define FLASHCTL_RYBY (1 << 5)
50 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
53 target_phys_addr_t target_base;
54 struct nand_flash_s *nand;
56 struct ecc_state_s ecc;
59 static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
61 struct sl_nand_s *s = (struct sl_nand_s *) opaque;
63 addr -= s->target_base;
66 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
68 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
69 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
71 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
73 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
74 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
80 return s->ecc.count & 0xff;
83 nand_getpins(s->nand, &ryby);
85 return s->ctl | FLASHCTL_RYBY;
90 return ecc_digest(&s->ecc, nand_getio(s->nand));
93 spitz_printf("Bad register offset " REG_FMT "\n", addr);
98 static uint32_t sl_readl(void *opaque, target_phys_addr_t addr)
100 struct sl_nand_s *s = (struct sl_nand_s *) opaque;
101 addr -= s->target_base;
103 if (addr == FLASH_FLASHIO)
104 return ecc_digest(&s->ecc, nand_getio(s->nand)) |
105 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
107 return sl_readb(opaque, addr);
110 static void sl_writeb(void *opaque, target_phys_addr_t addr,
113 struct sl_nand_s *s = (struct sl_nand_s *) opaque;
114 addr -= s->target_base;
118 /* Value is ignored. */
123 s->ctl = value & 0xff & ~FLASHCTL_RYBY;
124 nand_setpins(s->nand,
125 s->ctl & FLASHCTL_CLE,
126 s->ctl & FLASHCTL_ALE,
127 s->ctl & FLASHCTL_NCE,
128 s->ctl & FLASHCTL_WP,
133 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
137 spitz_printf("Bad register offset " REG_FMT "\n", addr);
141 static void sl_save(QEMUFile *f, void *opaque)
143 struct sl_nand_s *s = (struct sl_nand_s *) opaque;
145 qemu_put_8s(f, &s->ctl);
149 static int sl_load(QEMUFile *f, void *opaque, int version_id)
151 struct sl_nand_s *s = (struct sl_nand_s *) opaque;
153 qemu_get_8s(f, &s->ctl);
164 static void sl_flash_register(struct pxa2xx_state_s *cpu, int size)
168 CPUReadMemoryFunc *sl_readfn[] = {
173 CPUWriteMemoryFunc *sl_writefn[] = {
179 s = (struct sl_nand_s *) qemu_mallocz(sizeof(struct sl_nand_s));
180 s->target_base = FLASH_BASE;
182 if (size == FLASH_128M)
183 s->nand = nand_init(NAND_MFR_SAMSUNG, 0x73);
184 else if (size == FLASH_1024M)
185 s->nand = nand_init(NAND_MFR_SAMSUNG, 0xf1);
187 iomemtype = cpu_register_io_memory(0, sl_readfn,
189 cpu_register_physical_memory(s->target_base, 0x40, iomemtype);
191 register_savevm("sl_flash", 0, 0, sl_save, sl_load, s);
196 #define SPITZ_KEY_STROBE_NUM 11
197 #define SPITZ_KEY_SENSE_NUM 7
199 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
200 12, 17, 91, 34, 36, 38, 39
203 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
204 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
207 /* Eighth additional row maps the special keys */
208 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
209 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
210 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
211 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
212 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
213 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
214 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
215 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
216 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
219 #define SPITZ_GPIO_AK_INT 13 /* Remote control */
220 #define SPITZ_GPIO_SYNC 16 /* Sync button */
221 #define SPITZ_GPIO_ON_KEY 95 /* Power button */
222 #define SPITZ_GPIO_SWA 97 /* Lid */
223 #define SPITZ_GPIO_SWB 96 /* Tablet mode */
225 /* The special buttons are mapped to unused keys */
226 static const int spitz_gpiomap[5] = {
227 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
228 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
230 static int spitz_gpio_invert[5] = { 0, 0, 0, 0, 0, };
232 struct spitz_keyboard_s {
233 qemu_irq sense[SPITZ_KEY_SENSE_NUM];
237 uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
238 uint16_t strobe_state;
239 uint16_t sense_state;
241 uint16_t pre_map[0x100];
245 int fifopos, fifolen;
249 static void spitz_keyboard_sense_update(struct spitz_keyboard_s *s)
252 uint16_t strobe, sense = 0;
253 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
254 strobe = s->keyrow[i] & s->strobe_state;
257 if (!(s->sense_state & (1 << i)))
258 qemu_irq_raise(s->sense[i]);
259 } else if (s->sense_state & (1 << i))
260 qemu_irq_lower(s->sense[i]);
263 s->sense_state = sense;
266 static void spitz_keyboard_strobe(void *opaque, int line, int level)
268 struct spitz_keyboard_s *s = (struct spitz_keyboard_s *) opaque;
271 s->strobe_state |= 1 << line;
273 s->strobe_state &= ~(1 << line);
274 spitz_keyboard_sense_update(s);
277 static void spitz_keyboard_keydown(struct spitz_keyboard_s *s, int keycode)
279 int spitz_keycode = s->keymap[keycode & 0x7f];
280 if (spitz_keycode == -1)
283 /* Handle the additional keys */
284 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
285 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80) ^
286 spitz_gpio_invert[spitz_keycode & 0xf]);
291 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
293 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
295 spitz_keyboard_sense_update(s);
298 #define SHIFT (1 << 7)
299 #define CTRL (1 << 8)
302 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
304 static void spitz_keyboard_handler(struct spitz_keyboard_s *s, int keycode)
309 case 0x2a: /* Left Shift */
315 case 0x36: /* Right Shift */
321 case 0x1d: /* Control */
335 code = s->pre_map[mapcode = ((s->modifiers & 3) ?
337 (keycode & ~SHIFT))];
339 if (code != mapcode) {
341 if ((code & SHIFT) && !(s->modifiers & 1))
342 QUEUE_KEY(0x2a | (keycode & 0x80));
343 if ((code & CTRL ) && !(s->modifiers & 4))
344 QUEUE_KEY(0x1d | (keycode & 0x80));
345 if ((code & FN ) && !(s->modifiers & 8))
346 QUEUE_KEY(0x38 | (keycode & 0x80));
347 if ((code & FN ) && (s->modifiers & 1))
348 QUEUE_KEY(0x2a | (~keycode & 0x80));
349 if ((code & FN ) && (s->modifiers & 2))
350 QUEUE_KEY(0x36 | (~keycode & 0x80));
352 if (keycode & 0x80) {
353 if ((s->imodifiers & 1 ) && !(s->modifiers & 1))
354 QUEUE_KEY(0x2a | 0x80);
355 if ((s->imodifiers & 4 ) && !(s->modifiers & 4))
356 QUEUE_KEY(0x1d | 0x80);
357 if ((s->imodifiers & 8 ) && !(s->modifiers & 8))
358 QUEUE_KEY(0x38 | 0x80);
359 if ((s->imodifiers & 0x10) && (s->modifiers & 1))
361 if ((s->imodifiers & 0x20) && (s->modifiers & 2))
365 if ((code & SHIFT) && !((s->modifiers | s->imodifiers) & 1)) {
369 if ((code & CTRL ) && !((s->modifiers | s->imodifiers) & 4)) {
373 if ((code & FN ) && !((s->modifiers | s->imodifiers) & 8)) {
377 if ((code & FN ) && (s->modifiers & 1) &&
378 !(s->imodifiers & 0x10)) {
379 QUEUE_KEY(0x2a | 0x80);
380 s->imodifiers |= 0x10;
382 if ((code & FN ) && (s->modifiers & 2) &&
383 !(s->imodifiers & 0x20)) {
384 QUEUE_KEY(0x36 | 0x80);
385 s->imodifiers |= 0x20;
391 QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
394 static void spitz_keyboard_tick(void *opaque)
396 struct spitz_keyboard_s *s = (struct spitz_keyboard_s *) opaque;
399 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
401 if (s->fifopos >= 16)
405 qemu_mod_timer(s->kbdtimer, qemu_get_clock(vm_clock) + ticks_per_sec / 32);
408 static void spitz_keyboard_pre_map(struct spitz_keyboard_s *s)
411 for (i = 0; i < 0x100; i ++)
413 s->pre_map[0x02 | SHIFT ] = 0x02 | SHIFT; /* exclam */
414 s->pre_map[0x28 | SHIFT ] = 0x03 | SHIFT; /* quotedbl */
415 s->pre_map[0x04 | SHIFT ] = 0x04 | SHIFT; /* numbersign */
416 s->pre_map[0x05 | SHIFT ] = 0x05 | SHIFT; /* dollar */
417 s->pre_map[0x06 | SHIFT ] = 0x06 | SHIFT; /* percent */
418 s->pre_map[0x08 | SHIFT ] = 0x07 | SHIFT; /* ampersand */
419 s->pre_map[0x28 ] = 0x08 | SHIFT; /* apostrophe */
420 s->pre_map[0x0a | SHIFT ] = 0x09 | SHIFT; /* parenleft */
421 s->pre_map[0x0b | SHIFT ] = 0x0a | SHIFT; /* parenright */
422 s->pre_map[0x29 | SHIFT ] = 0x0b | SHIFT; /* asciitilde */
423 s->pre_map[0x03 | SHIFT ] = 0x0c | SHIFT; /* at */
424 s->pre_map[0xd3 ] = 0x0e | FN; /* Delete */
425 s->pre_map[0x3a ] = 0x0f | FN; /* Caps_Lock */
426 s->pre_map[0x07 | SHIFT ] = 0x11 | FN; /* asciicircum */
427 s->pre_map[0x0d ] = 0x12 | FN; /* equal */
428 s->pre_map[0x0d | SHIFT ] = 0x13 | FN; /* plus */
429 s->pre_map[0x1a ] = 0x14 | FN; /* bracketleft */
430 s->pre_map[0x1b ] = 0x15 | FN; /* bracketright */
431 s->pre_map[0x1a | SHIFT ] = 0x16 | FN; /* braceleft */
432 s->pre_map[0x1b | SHIFT ] = 0x17 | FN; /* braceright */
433 s->pre_map[0x27 ] = 0x22 | FN; /* semicolon */
434 s->pre_map[0x27 | SHIFT ] = 0x23 | FN; /* colon */
435 s->pre_map[0x09 | SHIFT ] = 0x24 | FN; /* asterisk */
436 s->pre_map[0x2b ] = 0x25 | FN; /* backslash */
437 s->pre_map[0x2b | SHIFT ] = 0x26 | FN; /* bar */
438 s->pre_map[0x0c | SHIFT ] = 0x30 | FN; /* underscore */
439 s->pre_map[0x33 | SHIFT ] = 0x33 | FN; /* less */
440 s->pre_map[0x35 ] = 0x33 | SHIFT; /* slash */
441 s->pre_map[0x34 | SHIFT ] = 0x34 | FN; /* greater */
442 s->pre_map[0x35 | SHIFT ] = 0x34 | SHIFT; /* question */
443 s->pre_map[0x49 ] = 0x48 | FN; /* Page_Up */
444 s->pre_map[0x51 ] = 0x50 | FN; /* Page_Down */
450 s->kbdtimer = qemu_new_timer(vm_clock, spitz_keyboard_tick, s);
451 spitz_keyboard_tick(s);
458 static void spitz_keyboard_save(QEMUFile *f, void *opaque)
460 struct spitz_keyboard_s *s = (struct spitz_keyboard_s *) opaque;
463 qemu_put_be16s(f, &s->sense_state);
464 qemu_put_be16s(f, &s->strobe_state);
465 for (i = 0; i < 5; i ++)
466 qemu_put_byte(f, spitz_gpio_invert[i]);
469 static int spitz_keyboard_load(QEMUFile *f, void *opaque, int version_id)
471 struct spitz_keyboard_s *s = (struct spitz_keyboard_s *) opaque;
474 qemu_get_be16s(f, &s->sense_state);
475 qemu_get_be16s(f, &s->strobe_state);
476 for (i = 0; i < 5; i ++)
477 spitz_gpio_invert[i] = qemu_get_byte(f);
479 /* Release all pressed keys */
480 memset(s->keyrow, 0, sizeof(s->keyrow));
481 spitz_keyboard_sense_update(s);
490 static void spitz_keyboard_register(struct pxa2xx_state_s *cpu)
493 struct spitz_keyboard_s *s;
495 s = (struct spitz_keyboard_s *)
496 qemu_mallocz(sizeof(struct spitz_keyboard_s));
497 memset(s, 0, sizeof(struct spitz_keyboard_s));
499 for (i = 0; i < 0x80; i ++)
501 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
502 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
503 if (spitz_keymap[i][j] != -1)
504 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
506 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
507 s->sense[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpio_key_sense[i]];
509 for (i = 0; i < 5; i ++)
510 s->gpiomap[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpiomap[i]];
512 s->strobe = qemu_allocate_irqs(spitz_keyboard_strobe, s,
513 SPITZ_KEY_STROBE_NUM);
514 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
515 pxa2xx_gpio_out_set(cpu->gpio, spitz_gpio_key_strobe[i], s->strobe[i]);
517 spitz_keyboard_pre_map(s);
518 qemu_add_kbd_event_handler((QEMUPutKBDEvent *) spitz_keyboard_handler, s);
520 register_savevm("spitz_keyboard", 0, 0,
521 spitz_keyboard_save, spitz_keyboard_load, s);
524 /* LCD backlight controller */
526 #define LCDTG_RESCTL 0x00
527 #define LCDTG_PHACTRL 0x01
528 #define LCDTG_DUTYCTRL 0x02
529 #define LCDTG_POWERREG0 0x03
530 #define LCDTG_POWERREG1 0x04
531 #define LCDTG_GPOR3 0x05
532 #define LCDTG_PICTRL 0x06
533 #define LCDTG_POLCTRL 0x07
535 static int bl_intensity, bl_power;
537 static void spitz_bl_update(struct pxa2xx_state_s *s)
539 if (bl_power && bl_intensity)
540 spitz_printf("LCD Backlight now at %i/63\n", bl_intensity);
542 spitz_printf("LCD Backlight now off\n");
545 static inline void spitz_bl_bit5(void *opaque, int line, int level)
547 int prev = bl_intensity;
550 bl_intensity &= ~0x20;
552 bl_intensity |= 0x20;
554 if (bl_power && prev != bl_intensity)
555 spitz_bl_update((struct pxa2xx_state_s *) opaque);
558 static inline void spitz_bl_power(void *opaque, int line, int level)
561 spitz_bl_update((struct pxa2xx_state_s *) opaque);
564 static void spitz_lcdtg_dac_put(void *opaque, uint8_t cmd)
573 spitz_printf("LCD in QVGA mode\n");
575 spitz_printf("LCD in VGA mode\n");
579 bl_intensity &= ~0x1f;
580 bl_intensity |= value;
582 spitz_bl_update((struct pxa2xx_state_s *) opaque);
585 case LCDTG_POWERREG0:
586 /* Set common voltage to M62332FP */
593 #define CORGI_SSP_PORT 2
595 #define SPITZ_GPIO_LCDCON_CS 53
596 #define SPITZ_GPIO_ADS7846_CS 14
597 #define SPITZ_GPIO_MAX1111_CS 20
598 #define SPITZ_GPIO_TP_INT 11
600 static int lcd_en, ads_en, max_en;
601 static struct max111x_s *max1111;
602 static struct ads7846_state_s *ads7846;
604 /* "Demux" the signal based on current chipselect */
605 static uint32_t corgi_ssp_read(void *opaque)
610 return ads7846_read(ads7846);
612 return max111x_read(max1111);
616 static void corgi_ssp_write(void *opaque, uint32_t value)
619 spitz_lcdtg_dac_put(opaque, value);
621 ads7846_write(ads7846, value);
623 max111x_write(max1111, value);
626 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
641 #define MAX1111_BATT_VOLT 1
642 #define MAX1111_BATT_TEMP 2
643 #define MAX1111_ACIN_VOLT 3
645 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
646 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
647 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
649 static void spitz_adc_temp_on(void *opaque, int line, int level)
655 max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
657 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
660 static void spitz_ssp_save(QEMUFile *f, void *opaque)
662 qemu_put_be32(f, lcd_en);
663 qemu_put_be32(f, ads_en);
664 qemu_put_be32(f, max_en);
665 qemu_put_be32(f, bl_intensity);
666 qemu_put_be32(f, bl_power);
669 static int spitz_ssp_load(QEMUFile *f, void *opaque, int version_id)
671 lcd_en = qemu_get_be32(f);
672 ads_en = qemu_get_be32(f);
673 max_en = qemu_get_be32(f);
674 bl_intensity = qemu_get_be32(f);
675 bl_power = qemu_get_be32(f);
680 static void spitz_ssp_attach(struct pxa2xx_state_s *cpu)
682 qemu_irq *chipselects;
684 lcd_en = ads_en = max_en = 0;
686 ads7846 = ads7846_init(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_TP_INT]);
688 max1111 = max1111_init(0);
689 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
690 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
691 max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
693 pxa2xx_ssp_attach(cpu->ssp[CORGI_SSP_PORT - 1], corgi_ssp_read,
694 corgi_ssp_write, cpu);
696 chipselects = qemu_allocate_irqs(corgi_ssp_gpio_cs, cpu, 3);
697 pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_LCDCON_CS, chipselects[0]);
698 pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ADS7846_CS, chipselects[1]);
699 pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_MAX1111_CS, chipselects[2]);
704 register_savevm("spitz_ssp", 0, 0, spitz_ssp_save, spitz_ssp_load, cpu);
709 static void spitz_microdrive_attach(struct pxa2xx_state_s *cpu)
711 struct pcmcia_card_s *md;
713 BlockDriverState *bs;
715 index = drive_get_index(IF_IDE, 0, 0);
718 bs = drives_table[index].bdrv;
719 if (bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {
720 md = dscm1xxxx_init(bs);
721 pxa2xx_pcmcia_attach(cpu->pcmcia[1], md);
725 /* Wm8750 and Max7310 on I2C */
727 #define AKITA_MAX_ADDR 0x18
728 #define SPITZ_WM_ADDRL 0x1b
729 #define SPITZ_WM_ADDRH 0x1a
731 #define SPITZ_GPIO_WM 5
734 static void spitz_wm8750_addr(void *opaque, int line, int level)
736 i2c_slave *wm = (i2c_slave *) opaque;
738 i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
740 i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
744 static void spitz_i2c_setup(struct pxa2xx_state_s *cpu)
746 /* Attach the CPU on one end of our I2C bus. */
747 i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
756 /* Attach a WM8750 to the bus */
757 wm = wm8750_init(bus, audio);
759 spitz_wm8750_addr(wm, 0, 0);
760 pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_WM,
761 qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]);
762 /* .. and to the sound interface. */
763 cpu->i2s->opaque = wm;
764 cpu->i2s->codec_out = wm8750_dac_dat;
765 cpu->i2s->codec_in = wm8750_adc_dat;
766 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
770 static void spitz_akita_i2c_setup(struct pxa2xx_state_s *cpu)
772 /* Attach a Max7310 to Akita I2C bus. */
773 i2c_set_slave_address(max7310_init(pxa2xx_i2c_bus(cpu->i2c[0])),
777 /* Other peripherals */
779 static void spitz_out_switch(void *opaque, int line, int level)
783 spitz_printf("Charging %s.\n", level ? "off" : "on");
786 spitz_printf("Discharging %s.\n", level ? "on" : "off");
789 spitz_printf("Green LED %s.\n", level ? "on" : "off");
792 spitz_printf("Orange LED %s.\n", level ? "on" : "off");
795 spitz_bl_bit5(opaque, line, level);
798 spitz_bl_power(opaque, line, level);
801 spitz_adc_temp_on(opaque, line, level);
806 #define SPITZ_SCP_LED_GREEN 1
807 #define SPITZ_SCP_JK_B 2
808 #define SPITZ_SCP_CHRG_ON 3
809 #define SPITZ_SCP_MUTE_L 4
810 #define SPITZ_SCP_MUTE_R 5
811 #define SPITZ_SCP_CF_POWER 6
812 #define SPITZ_SCP_LED_ORANGE 7
813 #define SPITZ_SCP_JK_A 8
814 #define SPITZ_SCP_ADC_TEMP_ON 9
815 #define SPITZ_SCP2_IR_ON 1
816 #define SPITZ_SCP2_AKIN_PULLUP 2
817 #define SPITZ_SCP2_BACKLIGHT_CONT 7
818 #define SPITZ_SCP2_BACKLIGHT_ON 8
819 #define SPITZ_SCP2_MIC_BIAS 9
821 static void spitz_scoop_gpio_setup(struct pxa2xx_state_s *cpu,
822 struct scoop_info_s *scp0, struct scoop_info_s *scp1)
824 qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
826 scoop_gpio_out_set(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
827 scoop_gpio_out_set(scp0, SPITZ_SCP_JK_B, outsignals[1]);
828 scoop_gpio_out_set(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
829 scoop_gpio_out_set(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
832 scoop_gpio_out_set(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
833 scoop_gpio_out_set(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
836 scoop_gpio_out_set(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
839 #define SPITZ_GPIO_HSYNC 22
840 #define SPITZ_GPIO_SD_DETECT 9
841 #define SPITZ_GPIO_SD_WP 81
842 #define SPITZ_GPIO_ON_RESET 89
843 #define SPITZ_GPIO_BAT_COVER 90
844 #define SPITZ_GPIO_CF1_IRQ 105
845 #define SPITZ_GPIO_CF1_CD 94
846 #define SPITZ_GPIO_CF2_IRQ 106
847 #define SPITZ_GPIO_CF2_CD 93
849 static int spitz_hsync;
851 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
853 struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
854 qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_HSYNC], spitz_hsync);
858 static void spitz_gpio_setup(struct pxa2xx_state_s *cpu, int slots)
862 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
863 * read to satisfy broken guests that poll-wait for hsync.
864 * Simulating a real hsync event would be less practical and
865 * wouldn't guarantee that a guest ever exits the loop.
868 lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0];
869 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
870 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
873 pxa2xx_mmci_handlers(cpu->mmc,
874 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP],
875 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT]);
877 /* Battery lock always closed */
878 qemu_irq_raise(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_BAT_COVER]);
881 pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
883 /* PCMCIA signals: card's IRQ and Card-Detect */
885 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
886 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_IRQ],
887 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_CD]);
889 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
890 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_IRQ],
891 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_CD]);
893 /* Initialise the screen rotation related signals */
894 spitz_gpio_invert[3] = 0; /* Always open */
895 if (graphic_rotate) { /* Tablet mode */
896 spitz_gpio_invert[4] = 0;
897 } else { /* Portrait mode */
898 spitz_gpio_invert[4] = 1;
900 qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWA],
901 spitz_gpio_invert[3]);
902 qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWB],
903 spitz_gpio_invert[4]);
907 enum spitz_model_e { spitz, akita, borzoi, terrier };
909 #define SPITZ_RAM 0x04000000
910 #define SPITZ_ROM 0x00800000
912 static struct arm_boot_info spitz_binfo = {
913 .loader_start = PXA2XX_SDRAM_BASE,
914 .ram_size = 0x04000000,
917 static void spitz_common_init(ram_addr_t ram_size, int vga_ram_size,
918 DisplayState *ds, const char *kernel_filename,
919 const char *kernel_cmdline, const char *initrd_filename,
920 const char *cpu_model, enum spitz_model_e model, int arm_id)
922 struct pxa2xx_state_s *cpu;
923 struct scoop_info_s *scp0, *scp1 = NULL;
926 cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
928 /* Setup CPU & memory */
929 if (ram_size < SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE) {
930 fprintf(stderr, "This platform requires %i bytes of memory\n",
931 SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE);
934 cpu = pxa270_init(spitz_binfo.ram_size, ds, cpu_model);
936 sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
938 cpu_register_physical_memory(0, SPITZ_ROM,
939 qemu_ram_alloc(SPITZ_ROM) | IO_MEM_ROM);
941 /* Setup peripherals */
942 spitz_keyboard_register(cpu);
944 spitz_ssp_attach(cpu);
946 scp0 = scoop_init(cpu, 0, 0x10800000);
947 if (model != akita) {
948 scp1 = scoop_init(cpu, 1, 0x08800040);
951 spitz_scoop_gpio_setup(cpu, scp0, scp1);
953 spitz_gpio_setup(cpu, (model == akita) ? 1 : 2);
955 spitz_i2c_setup(cpu);
958 spitz_akita_i2c_setup(cpu);
960 if (model == terrier)
961 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
962 spitz_microdrive_attach(cpu);
963 else if (model != akita)
964 /* A 4.0 GB microdrive is permanently sitting in CF slot 1. */
965 spitz_microdrive_attach(cpu);
967 /* Setup initial (reset) machine state */
968 cpu->env->regs[15] = spitz_binfo.loader_start;
970 spitz_binfo.kernel_filename = kernel_filename;
971 spitz_binfo.kernel_cmdline = kernel_cmdline;
972 spitz_binfo.initrd_filename = initrd_filename;
973 spitz_binfo.board_id = arm_id;
974 arm_load_kernel(cpu->env, &spitz_binfo);
975 sl_bootparam_write(SL_PXA_PARAM_BASE - PXA2XX_SDRAM_BASE);
978 static void spitz_init(ram_addr_t ram_size, int vga_ram_size,
979 const char *boot_device, DisplayState *ds,
980 const char *kernel_filename, const char *kernel_cmdline,
981 const char *initrd_filename, const char *cpu_model)
983 spitz_common_init(ram_size, vga_ram_size, ds, kernel_filename,
984 kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
987 static void borzoi_init(ram_addr_t ram_size, int vga_ram_size,
988 const char *boot_device, DisplayState *ds,
989 const char *kernel_filename, const char *kernel_cmdline,
990 const char *initrd_filename, const char *cpu_model)
992 spitz_common_init(ram_size, vga_ram_size, ds, kernel_filename,
993 kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
996 static void akita_init(ram_addr_t ram_size, int vga_ram_size,
997 const char *boot_device, DisplayState *ds,
998 const char *kernel_filename, const char *kernel_cmdline,
999 const char *initrd_filename, const char *cpu_model)
1001 spitz_common_init(ram_size, vga_ram_size, ds, kernel_filename,
1002 kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
1005 static void terrier_init(ram_addr_t ram_size, int vga_ram_size,
1006 const char *boot_device, DisplayState *ds,
1007 const char *kernel_filename, const char *kernel_cmdline,
1008 const char *initrd_filename, const char *cpu_model)
1010 spitz_common_init(ram_size, vga_ram_size, ds, kernel_filename,
1011 kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
1014 QEMUMachine akitapda_machine = {
1016 "Akita PDA (PXA270)",
1018 SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED,
1021 QEMUMachine spitzpda_machine = {
1023 "Spitz PDA (PXA270)",
1025 SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED,
1028 QEMUMachine borzoipda_machine = {
1030 "Borzoi PDA (PXA270)",
1032 SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED,
1035 QEMUMachine terrierpda_machine = {
1037 "Terrier PDA (PXA270)",
1039 SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED,