2 * Luminary Micro Stellaris Ethernet Controller
4 * Copyright (c) 2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licenced under the GPL.
14 //#define DEBUG_STELLARIS_ENET 1
16 #ifdef DEBUG_STELLARIS_ENET
17 #define DPRINTF(fmt, args...) \
18 do { printf("stellaris_enet: " fmt , ##args); } while (0)
19 #define BADF(fmt, args...) \
20 do { fprintf(stderr, "stellaris_enet: error: " fmt , ##args); exit(1);} while (0)
22 #define DPRINTF(fmt, args...) do {} while(0)
23 #define BADF(fmt, args...) \
24 do { fprintf(stderr, "stellaris_enet: error: " fmt , ##args);} while (0)
27 #define SE_INT_RX 0x01
28 #define SE_INT_TXER 0x02
29 #define SE_INT_TXEMP 0x04
30 #define SE_INT_FOV 0x08
31 #define SE_INT_RXER 0x10
32 #define SE_INT_MD 0x20
33 #define SE_INT_PHY 0x40
35 #define SE_RCTL_RXEN 0x01
36 #define SE_RCTL_AMUL 0x02
37 #define SE_RCTL_PRMS 0x04
38 #define SE_RCTL_BADCRC 0x08
39 #define SE_RCTL_RSTFIFO 0x10
41 #define SE_TCTL_TXEN 0x01
42 #define SE_TCTL_PADEN 0x02
43 #define SE_TCTL_CRC 0x04
44 #define SE_TCTL_DUPLEX 0x08
59 uint8_t tx_fifo[2048];
60 /* Real hardware has a 2k fifo, which works out to be at most 31 packets.
61 We implement a full 31 packet fifo. */
73 } stellaris_enet_state;
75 static void stellaris_enet_update(stellaris_enet_state *s)
77 qemu_set_irq(s->irq, (s->ris & s->im) != 0);
80 /* TODO: Implement MAC address filtering. */
81 static void stellaris_enet_receive(void *opaque, const uint8_t *buf, int size)
83 stellaris_enet_state *s = (stellaris_enet_state *)opaque;
88 if ((s->rctl & SE_RCTL_RXEN) == 0)
91 DPRINTF("Packet dropped\n");
95 DPRINTF("Received packet len=%d\n", size);
96 n = s->next_packet + s->np;
101 s->rx[n].len = size + 6;
104 *(p++) = (size + 6) >> 8;
105 memcpy (p, buf, size);
107 crc = crc32(~0, buf, size);
112 /* Clear the remaining bytes in the last word. */
113 if ((size & 3) != 2) {
114 memset(p, 0, (6 - size) & 3);
118 stellaris_enet_update(s);
121 static int stellaris_enet_can_receive(void *opaque)
123 stellaris_enet_state *s = (stellaris_enet_state *)opaque;
125 if ((s->rctl & SE_RCTL_RXEN) == 0)
131 static uint32_t stellaris_enet_read(void *opaque, target_phys_addr_t offset)
133 stellaris_enet_state *s = (stellaris_enet_state *)opaque;
138 DPRINTF("IRQ status %02x\n", s->ris);
142 case 0x08: /* RCTL */
144 case 0x0c: /* TCTL */
146 case 0x10: /* DATA */
147 if (s->rx_fifo_len == 0) {
149 BADF("RX underflow\n");
152 s->rx_fifo_len = s->rx[s->next_packet].len;
153 s->rx_fifo = s->rx[s->next_packet].data;
154 DPRINTF("RX FIFO start packet len=%d\n", s->rx_fifo_len);
156 val = s->rx_fifo[0] | (s->rx_fifo[1] << 8) | (s->rx_fifo[2] << 16)
157 | (s->rx_fifo[3] << 24);
160 if (s->rx_fifo_len <= 0) {
163 if (s->next_packet >= 31)
166 DPRINTF("RX done np=%d\n", s->np);
170 return s->macaddr[0] | (s->macaddr[1] << 8)
171 | (s->macaddr[2] << 16) | (s->macaddr[3] << 24);
173 return s->macaddr[4] | (s->macaddr[5] << 8);
176 case 0x20: /* MCTL */
180 case 0x28: /* MADD */
182 case 0x2c: /* MTXD */
184 case 0x30: /* MRXD */
190 case 0x3c: /* Undocuented: Timestamp? */
193 cpu_abort (cpu_single_env, "stellaris_enet_read: Bad offset %x\n",
199 static void stellaris_enet_write(void *opaque, target_phys_addr_t offset,
202 stellaris_enet_state *s = (stellaris_enet_state *)opaque;
205 case 0x00: /* IACK */
207 DPRINTF("IRQ ack %02x/%02x\n", value, s->ris);
208 stellaris_enet_update(s);
209 /* Clearing TXER also resets the TX fifo. */
210 if (value & SE_INT_TXER)
211 s->tx_frame_len = -1;
214 DPRINTF("IRQ mask %02x/%02x\n", value, s->ris);
216 stellaris_enet_update(s);
218 case 0x08: /* RCTL */
220 if (value & SE_RCTL_RSTFIFO) {
223 stellaris_enet_update(s);
226 case 0x0c: /* TCTL */
229 case 0x10: /* DATA */
230 if (s->tx_frame_len == -1) {
231 s->tx_frame_len = value & 0xffff;
232 if (s->tx_frame_len > 2032) {
233 DPRINTF("TX frame too long (%d)\n", s->tx_frame_len);
235 s->ris |= SE_INT_TXER;
236 stellaris_enet_update(s);
238 DPRINTF("Start TX frame len=%d\n", s->tx_frame_len);
239 /* The value written does not include the ethernet header. */
240 s->tx_frame_len += 14;
241 if ((s->tctl & SE_TCTL_CRC) == 0)
242 s->tx_frame_len += 4;
244 s->tx_fifo[s->tx_fifo_len++] = value >> 16;
245 s->tx_fifo[s->tx_fifo_len++] = value >> 24;
248 s->tx_fifo[s->tx_fifo_len++] = value;
249 s->tx_fifo[s->tx_fifo_len++] = value >> 8;
250 s->tx_fifo[s->tx_fifo_len++] = value >> 16;
251 s->tx_fifo[s->tx_fifo_len++] = value >> 24;
252 if (s->tx_fifo_len >= s->tx_frame_len) {
253 /* We don't implement explicit CRC, so just chop it off. */
254 if ((s->tctl & SE_TCTL_CRC) == 0)
255 s->tx_frame_len -= 4;
256 if ((s->tctl & SE_TCTL_PADEN) && s->tx_frame_len < 60) {
257 memset(&s->tx_fifo[s->tx_frame_len], 0, 60 - s->tx_frame_len);
260 qemu_send_packet(s->vc, s->tx_fifo, s->tx_frame_len);
261 s->tx_frame_len = -1;
262 s->ris |= SE_INT_TXEMP;
263 stellaris_enet_update(s);
264 DPRINTF("Done TX\n");
269 s->macaddr[0] = value;
270 s->macaddr[1] = value >> 8;
271 s->macaddr[2] = value >> 16;
272 s->macaddr[3] = value >> 24;
275 s->macaddr[4] = value;
276 s->macaddr[5] = value >> 8;
281 case 0x20: /* MCTL */
287 case 0x28: /* MADD */
290 case 0x2c: /* MTXD */
291 s->mtxd = value & 0xff;
293 case 0x30: /* MRXD */
297 case 0x3c: /* Undocuented: Timestamp? */
301 cpu_abort (cpu_single_env, "stellaris_enet_write: Bad offset %x\n",
306 static CPUReadMemoryFunc *stellaris_enet_readfn[] = {
312 static CPUWriteMemoryFunc *stellaris_enet_writefn[] = {
313 stellaris_enet_write,
314 stellaris_enet_write,
317 static void stellaris_enet_reset(stellaris_enet_state *s)
320 s->rctl = SE_RCTL_BADCRC;
321 s->im = SE_INT_PHY | SE_INT_MD | SE_INT_RXER | SE_INT_FOV | SE_INT_TXEMP
322 | SE_INT_TXER | SE_INT_RX;
324 s->tx_frame_len = -1;
327 static void stellaris_enet_save(QEMUFile *f, void *opaque)
329 stellaris_enet_state *s = (stellaris_enet_state *)opaque;
332 qemu_put_be32(f, s->ris);
333 qemu_put_be32(f, s->im);
334 qemu_put_be32(f, s->rctl);
335 qemu_put_be32(f, s->tctl);
336 qemu_put_be32(f, s->thr);
337 qemu_put_be32(f, s->mctl);
338 qemu_put_be32(f, s->mdv);
339 qemu_put_be32(f, s->mtxd);
340 qemu_put_be32(f, s->mrxd);
341 qemu_put_be32(f, s->np);
342 qemu_put_be32(f, s->tx_frame_len);
343 qemu_put_be32(f, s->tx_fifo_len);
344 qemu_put_buffer(f, s->tx_fifo, sizeof(s->tx_fifo));
345 for (i = 0; i < 31; i++) {
346 qemu_put_be32(f, s->rx[i].len);
347 qemu_put_buffer(f, s->rx[i].data, sizeof(s->rx[i].data));
350 qemu_put_be32(f, s->next_packet);
351 qemu_put_be32(f, s->rx_fifo - s->rx[s->next_packet].data);
352 qemu_put_be32(f, s->rx_fifo_len);
355 static int stellaris_enet_load(QEMUFile *f, void *opaque, int version_id)
357 stellaris_enet_state *s = (stellaris_enet_state *)opaque;
363 s->ris = qemu_get_be32(f);
364 s->im = qemu_get_be32(f);
365 s->rctl = qemu_get_be32(f);
366 s->tctl = qemu_get_be32(f);
367 s->thr = qemu_get_be32(f);
368 s->mctl = qemu_get_be32(f);
369 s->mdv = qemu_get_be32(f);
370 s->mtxd = qemu_get_be32(f);
371 s->mrxd = qemu_get_be32(f);
372 s->np = qemu_get_be32(f);
373 s->tx_frame_len = qemu_get_be32(f);
374 s->tx_fifo_len = qemu_get_be32(f);
375 qemu_get_buffer(f, s->tx_fifo, sizeof(s->tx_fifo));
376 for (i = 0; i < 31; i++) {
377 s->rx[i].len = qemu_get_be32(f);
378 qemu_get_buffer(f, s->rx[i].data, sizeof(s->rx[i].data));
381 s->next_packet = qemu_get_be32(f);
382 s->rx_fifo = s->rx[s->next_packet].data + qemu_get_be32(f);
383 s->rx_fifo_len = qemu_get_be32(f);
388 static void stellaris_enet_cleanup(VLANClientState *vc)
390 stellaris_enet_state *s = vc->opaque;
392 unregister_savevm("stellaris_enet", s);
394 cpu_unregister_io_memory(s->mmio_index);
399 void stellaris_enet_init(NICInfo *nd, uint32_t base, qemu_irq irq)
401 stellaris_enet_state *s;
403 qemu_check_nic_model(nd, "stellaris");
405 s = (stellaris_enet_state *)qemu_mallocz(sizeof(stellaris_enet_state));
406 s->mmio_index = cpu_register_io_memory(0, stellaris_enet_readfn,
407 stellaris_enet_writefn, s);
408 cpu_register_physical_memory(base, 0x00001000, s->mmio_index);
410 memcpy(s->macaddr, nd->macaddr, 6);
413 s->vc = qemu_new_vlan_client(nd->vlan, nd->model, nd->name,
414 stellaris_enet_receive,
415 stellaris_enet_can_receive,
416 stellaris_enet_cleanup, s);
417 qemu_format_nic_info_str(s->vc, s->macaddr);
420 stellaris_enet_reset(s);
421 register_savevm("stellaris_enet", -1, 1,
422 stellaris_enet_save, stellaris_enet_load, s);