4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
30 #include "qemu-common.h"
31 #include "cache-utils.h"
38 #define DEBUG_LOGFILE "/tmp/qemu.log"
40 const char *exec_path;
42 #if defined(CONFIG_USE_GUEST_BASE)
43 unsigned long mmap_min_addr = 0;
44 unsigned long guest_base = 0;
47 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
48 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
50 #if defined(__i386__) && !defined(CONFIG_STATIC)
51 /* Force usage of an ELF interpreter even if it is an ELF shared
53 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
56 /* for recent libc, we add these dummy symbols which are not declared
57 when generating a linked object (bug in ld ?) */
58 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
59 asm(".globl __preinit_array_start\n"
60 ".globl __preinit_array_end\n"
61 ".globl __init_array_start\n"
62 ".globl __init_array_end\n"
63 ".globl __fini_array_start\n"
64 ".globl __fini_array_end\n"
65 ".section \".rodata\"\n"
66 "__preinit_array_start:\n"
67 "__preinit_array_end:\n"
68 "__init_array_start:\n"
70 "__fini_array_start:\n"
76 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
77 we allocate a bigger stack. Need a better solution, for example
78 by remapping the process stack directly at the right place */
79 unsigned long x86_stack_size = 512 * 1024;
81 void gemu_log(const char *fmt, ...)
86 vfprintf(stderr, fmt, ap);
90 void cpu_outb(CPUState *env, int addr, int val)
92 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
95 void cpu_outw(CPUState *env, int addr, int val)
97 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
100 void cpu_outl(CPUState *env, int addr, int val)
102 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
105 int cpu_inb(CPUState *env, int addr)
107 fprintf(stderr, "inb: port=0x%04x\n", addr);
111 int cpu_inw(CPUState *env, int addr)
113 fprintf(stderr, "inw: port=0x%04x\n", addr);
117 int cpu_inl(CPUState *env, int addr)
119 fprintf(stderr, "inl: port=0x%04x\n", addr);
123 #if defined(TARGET_I386)
124 int cpu_get_pic_interrupt(CPUState *env)
130 /* timers for rdtsc */
134 static uint64_t emu_time;
136 int64_t cpu_get_real_ticks(void)
143 #if defined(USE_NPTL)
144 /***********************************************************/
145 /* Helper routines for implementing atomic operations. */
147 /* To implement exclusive operations we force all cpus to syncronise.
148 We don't require a full sync, only that no cpus are executing guest code.
149 The alternative is to map target atomic ops onto host equivalents,
150 which requires quite a lot of per host/target work. */
151 static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
152 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
153 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
154 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
155 static int pending_cpus;
157 /* Make sure everything is in a consistent state for calling fork(). */
158 void fork_start(void)
161 pthread_mutex_lock(&tb_lock);
162 pthread_mutex_lock(&exclusive_lock);
165 void fork_end(int child)
168 /* Child processes created by fork() only have a single thread.
169 Discard information about the parent threads. */
170 first_cpu = thread_env;
171 thread_env->next_cpu = NULL;
173 pthread_mutex_init(&exclusive_lock, NULL);
174 pthread_mutex_init(&cpu_list_mutex, NULL);
175 pthread_cond_init(&exclusive_cond, NULL);
176 pthread_cond_init(&exclusive_resume, NULL);
177 pthread_mutex_init(&tb_lock, NULL);
178 gdbserver_fork(thread_env);
180 pthread_mutex_unlock(&exclusive_lock);
181 pthread_mutex_unlock(&tb_lock);
183 mmap_fork_end(child);
186 /* Wait for pending exclusive operations to complete. The exclusive lock
188 static inline void exclusive_idle(void)
190 while (pending_cpus) {
191 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
195 /* Start an exclusive operation.
196 Must only be called from outside cpu_arm_exec. */
197 static inline void start_exclusive(void)
200 pthread_mutex_lock(&exclusive_lock);
204 /* Make all other cpus stop executing. */
205 for (other = first_cpu; other; other = other->next_cpu) {
206 if (other->running) {
211 if (pending_cpus > 1) {
212 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
216 /* Finish an exclusive operation. */
217 static inline void end_exclusive(void)
220 pthread_cond_broadcast(&exclusive_resume);
221 pthread_mutex_unlock(&exclusive_lock);
224 /* Wait for exclusive ops to finish, and begin cpu execution. */
225 static inline void cpu_exec_start(CPUState *env)
227 pthread_mutex_lock(&exclusive_lock);
230 pthread_mutex_unlock(&exclusive_lock);
233 /* Mark cpu as not executing, and release pending exclusive ops. */
234 static inline void cpu_exec_end(CPUState *env)
236 pthread_mutex_lock(&exclusive_lock);
238 if (pending_cpus > 1) {
240 if (pending_cpus == 1) {
241 pthread_cond_signal(&exclusive_cond);
245 pthread_mutex_unlock(&exclusive_lock);
248 void cpu_list_lock(void)
250 pthread_mutex_lock(&cpu_list_mutex);
253 void cpu_list_unlock(void)
255 pthread_mutex_unlock(&cpu_list_mutex);
257 #else /* if !USE_NPTL */
258 /* These are no-ops because we are not threadsafe. */
259 static inline void cpu_exec_start(CPUState *env)
263 static inline void cpu_exec_end(CPUState *env)
267 static inline void start_exclusive(void)
271 static inline void end_exclusive(void)
275 void fork_start(void)
279 void fork_end(int child)
282 gdbserver_fork(thread_env);
286 void cpu_list_lock(void)
290 void cpu_list_unlock(void)
297 /***********************************************************/
298 /* CPUX86 core interface */
300 void cpu_smm_update(CPUState *env)
304 uint64_t cpu_get_tsc(CPUX86State *env)
306 return cpu_get_real_ticks();
309 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
314 e1 = (addr << 16) | (limit & 0xffff);
315 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
322 static uint64_t *idt_table;
324 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
325 uint64_t addr, unsigned int sel)
328 e1 = (addr & 0xffff) | (sel << 16);
329 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
333 p[2] = tswap32(addr >> 32);
336 /* only dpl matters as we do only user space emulation */
337 static void set_idt(int n, unsigned int dpl)
339 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
342 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
343 uint32_t addr, unsigned int sel)
346 e1 = (addr & 0xffff) | (sel << 16);
347 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
353 /* only dpl matters as we do only user space emulation */
354 static void set_idt(int n, unsigned int dpl)
356 set_gate(idt_table + n, 0, dpl, 0, 0);
360 void cpu_loop(CPUX86State *env)
364 target_siginfo_t info;
367 trapnr = cpu_x86_exec(env);
370 /* linux syscall from int $0x80 */
371 env->regs[R_EAX] = do_syscall(env,
382 /* linux syscall from syscall intruction */
383 env->regs[R_EAX] = do_syscall(env,
391 env->eip = env->exception_next_eip;
396 info.si_signo = SIGBUS;
398 info.si_code = TARGET_SI_KERNEL;
399 info._sifields._sigfault._addr = 0;
400 queue_signal(env, info.si_signo, &info);
403 /* XXX: potential problem if ABI32 */
404 #ifndef TARGET_X86_64
405 if (env->eflags & VM_MASK) {
406 handle_vm86_fault(env);
410 info.si_signo = SIGSEGV;
412 info.si_code = TARGET_SI_KERNEL;
413 info._sifields._sigfault._addr = 0;
414 queue_signal(env, info.si_signo, &info);
418 info.si_signo = SIGSEGV;
420 if (!(env->error_code & 1))
421 info.si_code = TARGET_SEGV_MAPERR;
423 info.si_code = TARGET_SEGV_ACCERR;
424 info._sifields._sigfault._addr = env->cr[2];
425 queue_signal(env, info.si_signo, &info);
428 #ifndef TARGET_X86_64
429 if (env->eflags & VM_MASK) {
430 handle_vm86_trap(env, trapnr);
434 /* division by zero */
435 info.si_signo = SIGFPE;
437 info.si_code = TARGET_FPE_INTDIV;
438 info._sifields._sigfault._addr = env->eip;
439 queue_signal(env, info.si_signo, &info);
444 #ifndef TARGET_X86_64
445 if (env->eflags & VM_MASK) {
446 handle_vm86_trap(env, trapnr);
450 info.si_signo = SIGTRAP;
452 if (trapnr == EXCP01_DB) {
453 info.si_code = TARGET_TRAP_BRKPT;
454 info._sifields._sigfault._addr = env->eip;
456 info.si_code = TARGET_SI_KERNEL;
457 info._sifields._sigfault._addr = 0;
459 queue_signal(env, info.si_signo, &info);
464 #ifndef TARGET_X86_64
465 if (env->eflags & VM_MASK) {
466 handle_vm86_trap(env, trapnr);
470 info.si_signo = SIGSEGV;
472 info.si_code = TARGET_SI_KERNEL;
473 info._sifields._sigfault._addr = 0;
474 queue_signal(env, info.si_signo, &info);
478 info.si_signo = SIGILL;
480 info.si_code = TARGET_ILL_ILLOPN;
481 info._sifields._sigfault._addr = env->eip;
482 queue_signal(env, info.si_signo, &info);
485 /* just indicate that signals should be handled asap */
491 sig = gdb_handlesig (env, TARGET_SIGTRAP);
496 info.si_code = TARGET_TRAP_BRKPT;
497 queue_signal(env, info.si_signo, &info);
502 pc = env->segs[R_CS].base + env->eip;
503 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
507 process_pending_signals(env);
514 static void arm_cache_flush(abi_ulong start, abi_ulong last)
516 abi_ulong addr, last1;
522 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
525 tb_invalidate_page_range(addr, last1 + 1);
532 /* Handle a jump to the kernel code page. */
534 do_kernel_trap(CPUARMState *env)
540 switch (env->regs[15]) {
541 case 0xffff0fa0: /* __kernel_memory_barrier */
542 /* ??? No-op. Will need to do better for SMP. */
544 case 0xffff0fc0: /* __kernel_cmpxchg */
545 /* XXX: This only works between threads, not between processes.
546 It's probably possible to implement this with native host
547 operations. However things like ldrex/strex are much harder so
548 there's not much point trying. */
550 cpsr = cpsr_read(env);
552 /* FIXME: This should SEGV if the access fails. */
553 if (get_user_u32(val, addr))
555 if (val == env->regs[0]) {
557 /* FIXME: Check for segfaults. */
558 put_user_u32(val, addr);
565 cpsr_write(env, cpsr, CPSR_C);
568 case 0xffff0fe0: /* __kernel_get_tls */
569 env->regs[0] = env->cp15.c13_tls2;
574 /* Jump back to the caller. */
575 addr = env->regs[14];
580 env->regs[15] = addr;
585 void cpu_loop(CPUARMState *env)
588 unsigned int n, insn;
589 target_siginfo_t info;
594 trapnr = cpu_arm_exec(env);
599 TaskState *ts = env->opaque;
603 /* we handle the FPU emulation here, as Linux */
604 /* we get the opcode */
605 /* FIXME - what to do if get_user() fails? */
606 get_user_u32(opcode, env->regs[15]);
608 rc = EmulateAll(opcode, &ts->fpa, env);
609 if (rc == 0) { /* illegal instruction */
610 info.si_signo = SIGILL;
612 info.si_code = TARGET_ILL_ILLOPN;
613 info._sifields._sigfault._addr = env->regs[15];
614 queue_signal(env, info.si_signo, &info);
615 } else if (rc < 0) { /* FP exception */
618 /* translate softfloat flags to FPSR flags */
619 if (-rc & float_flag_invalid)
621 if (-rc & float_flag_divbyzero)
623 if (-rc & float_flag_overflow)
625 if (-rc & float_flag_underflow)
627 if (-rc & float_flag_inexact)
630 FPSR fpsr = ts->fpa.fpsr;
631 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
633 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
634 info.si_signo = SIGFPE;
637 /* ordered by priority, least first */
638 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
639 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
640 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
641 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
642 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
644 info._sifields._sigfault._addr = env->regs[15];
645 queue_signal(env, info.si_signo, &info);
650 /* accumulate unenabled exceptions */
651 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
653 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
655 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
657 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
659 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
662 } else { /* everything OK */
673 if (trapnr == EXCP_BKPT) {
675 /* FIXME - what to do if get_user() fails? */
676 get_user_u16(insn, env->regs[15]);
680 /* FIXME - what to do if get_user() fails? */
681 get_user_u32(insn, env->regs[15]);
682 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
687 /* FIXME - what to do if get_user() fails? */
688 get_user_u16(insn, env->regs[15] - 2);
691 /* FIXME - what to do if get_user() fails? */
692 get_user_u32(insn, env->regs[15] - 4);
697 if (n == ARM_NR_cacheflush) {
698 arm_cache_flush(env->regs[0], env->regs[1]);
699 } else if (n == ARM_NR_semihosting
700 || n == ARM_NR_thumb_semihosting) {
701 env->regs[0] = do_arm_semihosting (env);
702 } else if (n == 0 || n >= ARM_SYSCALL_BASE
703 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
705 if (env->thumb || n == 0) {
708 n -= ARM_SYSCALL_BASE;
711 if ( n > ARM_NR_BASE) {
713 case ARM_NR_cacheflush:
714 arm_cache_flush(env->regs[0], env->regs[1]);
717 cpu_set_tls(env, env->regs[0]);
721 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
723 env->regs[0] = -TARGET_ENOSYS;
727 env->regs[0] = do_syscall(env,
742 /* just indicate that signals should be handled asap */
744 case EXCP_PREFETCH_ABORT:
745 addr = env->cp15.c6_insn;
747 case EXCP_DATA_ABORT:
748 addr = env->cp15.c6_data;
752 info.si_signo = SIGSEGV;
754 /* XXX: check env->error_code */
755 info.si_code = TARGET_SEGV_MAPERR;
756 info._sifields._sigfault._addr = addr;
757 queue_signal(env, info.si_signo, &info);
764 sig = gdb_handlesig (env, TARGET_SIGTRAP);
769 info.si_code = TARGET_TRAP_BRKPT;
770 queue_signal(env, info.si_signo, &info);
774 case EXCP_KERNEL_TRAP:
775 if (do_kernel_trap(env))
780 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
782 cpu_dump_state(env, stderr, fprintf, 0);
785 process_pending_signals(env);
792 #define SPARC64_STACK_BIAS 2047
796 /* WARNING: dealing with register windows _is_ complicated. More info
797 can be found at http://www.sics.se/~psm/sparcstack.html */
798 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
800 index = (index + cwp * 16) % (16 * env->nwindows);
801 /* wrap handling : if cwp is on the last window, then we use the
802 registers 'after' the end */
803 if (index < 8 && env->cwp == env->nwindows - 1)
804 index += 16 * env->nwindows;
808 /* save the register window 'cwp1' */
809 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
814 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
815 #ifdef TARGET_SPARC64
817 sp_ptr += SPARC64_STACK_BIAS;
819 #if defined(DEBUG_WIN)
820 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
823 for(i = 0; i < 16; i++) {
824 /* FIXME - what to do if put_user() fails? */
825 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
826 sp_ptr += sizeof(abi_ulong);
830 static void save_window(CPUSPARCState *env)
832 #ifndef TARGET_SPARC64
833 unsigned int new_wim;
834 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
835 ((1LL << env->nwindows) - 1);
836 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
839 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
845 static void restore_window(CPUSPARCState *env)
847 #ifndef TARGET_SPARC64
848 unsigned int new_wim;
850 unsigned int i, cwp1;
853 #ifndef TARGET_SPARC64
854 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
855 ((1LL << env->nwindows) - 1);
858 /* restore the invalid window */
859 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
860 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
861 #ifdef TARGET_SPARC64
863 sp_ptr += SPARC64_STACK_BIAS;
865 #if defined(DEBUG_WIN)
866 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
869 for(i = 0; i < 16; i++) {
870 /* FIXME - what to do if get_user() fails? */
871 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
872 sp_ptr += sizeof(abi_ulong);
874 #ifdef TARGET_SPARC64
876 if (env->cleanwin < env->nwindows - 1)
884 static void flush_windows(CPUSPARCState *env)
890 /* if restore would invoke restore_window(), then we can stop */
891 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
892 #ifndef TARGET_SPARC64
893 if (env->wim & (1 << cwp1))
896 if (env->canrestore == 0)
901 save_window_offset(env, cwp1);
904 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
905 #ifndef TARGET_SPARC64
906 /* set wim so that restore will reload the registers */
907 env->wim = 1 << cwp1;
909 #if defined(DEBUG_WIN)
910 printf("flush_windows: nb=%d\n", offset - 1);
914 void cpu_loop (CPUSPARCState *env)
917 target_siginfo_t info;
920 trapnr = cpu_sparc_exec (env);
923 #ifndef TARGET_SPARC64
930 ret = do_syscall (env, env->gregs[1],
931 env->regwptr[0], env->regwptr[1],
932 env->regwptr[2], env->regwptr[3],
933 env->regwptr[4], env->regwptr[5]);
934 if ((unsigned int)ret >= (unsigned int)(-515)) {
935 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
936 env->xcc |= PSR_CARRY;
938 env->psr |= PSR_CARRY;
942 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
943 env->xcc &= ~PSR_CARRY;
945 env->psr &= ~PSR_CARRY;
948 env->regwptr[0] = ret;
949 /* next instruction */
951 env->npc = env->npc + 4;
953 case 0x83: /* flush windows */
958 /* next instruction */
960 env->npc = env->npc + 4;
962 #ifndef TARGET_SPARC64
963 case TT_WIN_OVF: /* window overflow */
966 case TT_WIN_UNF: /* window underflow */
972 info.si_signo = SIGSEGV;
974 /* XXX: check env->error_code */
975 info.si_code = TARGET_SEGV_MAPERR;
976 info._sifields._sigfault._addr = env->mmuregs[4];
977 queue_signal(env, info.si_signo, &info);
981 case TT_SPILL: /* window overflow */
984 case TT_FILL: /* window underflow */
990 info.si_signo = SIGSEGV;
992 /* XXX: check env->error_code */
993 info.si_code = TARGET_SEGV_MAPERR;
994 if (trapnr == TT_DFAULT)
995 info._sifields._sigfault._addr = env->dmmuregs[4];
997 info._sifields._sigfault._addr = env->tsptr->tpc;
998 queue_signal(env, info.si_signo, &info);
1001 #ifndef TARGET_ABI32
1004 sparc64_get_context(env);
1008 sparc64_set_context(env);
1012 case EXCP_INTERRUPT:
1013 /* just indicate that signals should be handled asap */
1019 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1022 info.si_signo = sig;
1024 info.si_code = TARGET_TRAP_BRKPT;
1025 queue_signal(env, info.si_signo, &info);
1030 printf ("Unhandled trap: 0x%x\n", trapnr);
1031 cpu_dump_state(env, stderr, fprintf, 0);
1034 process_pending_signals (env);
1041 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1047 uint32_t cpu_ppc_load_tbl (CPUState *env)
1049 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1052 uint32_t cpu_ppc_load_tbu (CPUState *env)
1054 return cpu_ppc_get_tb(env) >> 32;
1057 uint32_t cpu_ppc_load_atbl (CPUState *env)
1059 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1062 uint32_t cpu_ppc_load_atbu (CPUState *env)
1064 return cpu_ppc_get_tb(env) >> 32;
1067 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1068 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1070 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1072 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1075 /* XXX: to be fixed */
1076 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1081 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1086 #define EXCP_DUMP(env, fmt, args...) \
1088 fprintf(stderr, fmt , ##args); \
1089 cpu_dump_state(env, stderr, fprintf, 0); \
1090 qemu_log(fmt, ##args); \
1091 log_cpu_state(env, 0); \
1094 void cpu_loop(CPUPPCState *env)
1096 target_siginfo_t info;
1101 trapnr = cpu_ppc_exec(env);
1103 case POWERPC_EXCP_NONE:
1106 case POWERPC_EXCP_CRITICAL: /* Critical input */
1107 cpu_abort(env, "Critical interrupt while in user mode. "
1110 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1111 cpu_abort(env, "Machine check exception while in user mode. "
1114 case POWERPC_EXCP_DSI: /* Data storage exception */
1115 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1117 /* XXX: check this. Seems bugged */
1118 switch (env->error_code & 0xFF000000) {
1120 info.si_signo = TARGET_SIGSEGV;
1122 info.si_code = TARGET_SEGV_MAPERR;
1125 info.si_signo = TARGET_SIGILL;
1127 info.si_code = TARGET_ILL_ILLADR;
1130 info.si_signo = TARGET_SIGSEGV;
1132 info.si_code = TARGET_SEGV_ACCERR;
1135 /* Let's send a regular segfault... */
1136 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1138 info.si_signo = TARGET_SIGSEGV;
1140 info.si_code = TARGET_SEGV_MAPERR;
1143 info._sifields._sigfault._addr = env->nip;
1144 queue_signal(env, info.si_signo, &info);
1146 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1147 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
1148 env->spr[SPR_SRR0]);
1149 /* XXX: check this */
1150 switch (env->error_code & 0xFF000000) {
1152 info.si_signo = TARGET_SIGSEGV;
1154 info.si_code = TARGET_SEGV_MAPERR;
1158 info.si_signo = TARGET_SIGSEGV;
1160 info.si_code = TARGET_SEGV_ACCERR;
1163 /* Let's send a regular segfault... */
1164 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1166 info.si_signo = TARGET_SIGSEGV;
1168 info.si_code = TARGET_SEGV_MAPERR;
1171 info._sifields._sigfault._addr = env->nip - 4;
1172 queue_signal(env, info.si_signo, &info);
1174 case POWERPC_EXCP_EXTERNAL: /* External input */
1175 cpu_abort(env, "External interrupt while in user mode. "
1178 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1179 EXCP_DUMP(env, "Unaligned memory access\n");
1180 /* XXX: check this */
1181 info.si_signo = TARGET_SIGBUS;
1183 info.si_code = TARGET_BUS_ADRALN;
1184 info._sifields._sigfault._addr = env->nip - 4;
1185 queue_signal(env, info.si_signo, &info);
1187 case POWERPC_EXCP_PROGRAM: /* Program exception */
1188 /* XXX: check this */
1189 switch (env->error_code & ~0xF) {
1190 case POWERPC_EXCP_FP:
1191 EXCP_DUMP(env, "Floating point program exception\n");
1192 info.si_signo = TARGET_SIGFPE;
1194 switch (env->error_code & 0xF) {
1195 case POWERPC_EXCP_FP_OX:
1196 info.si_code = TARGET_FPE_FLTOVF;
1198 case POWERPC_EXCP_FP_UX:
1199 info.si_code = TARGET_FPE_FLTUND;
1201 case POWERPC_EXCP_FP_ZX:
1202 case POWERPC_EXCP_FP_VXZDZ:
1203 info.si_code = TARGET_FPE_FLTDIV;
1205 case POWERPC_EXCP_FP_XX:
1206 info.si_code = TARGET_FPE_FLTRES;
1208 case POWERPC_EXCP_FP_VXSOFT:
1209 info.si_code = TARGET_FPE_FLTINV;
1211 case POWERPC_EXCP_FP_VXSNAN:
1212 case POWERPC_EXCP_FP_VXISI:
1213 case POWERPC_EXCP_FP_VXIDI:
1214 case POWERPC_EXCP_FP_VXIMZ:
1215 case POWERPC_EXCP_FP_VXVC:
1216 case POWERPC_EXCP_FP_VXSQRT:
1217 case POWERPC_EXCP_FP_VXCVI:
1218 info.si_code = TARGET_FPE_FLTSUB;
1221 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1226 case POWERPC_EXCP_INVAL:
1227 EXCP_DUMP(env, "Invalid instruction\n");
1228 info.si_signo = TARGET_SIGILL;
1230 switch (env->error_code & 0xF) {
1231 case POWERPC_EXCP_INVAL_INVAL:
1232 info.si_code = TARGET_ILL_ILLOPC;
1234 case POWERPC_EXCP_INVAL_LSWX:
1235 info.si_code = TARGET_ILL_ILLOPN;
1237 case POWERPC_EXCP_INVAL_SPR:
1238 info.si_code = TARGET_ILL_PRVREG;
1240 case POWERPC_EXCP_INVAL_FP:
1241 info.si_code = TARGET_ILL_COPROC;
1244 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1245 env->error_code & 0xF);
1246 info.si_code = TARGET_ILL_ILLADR;
1250 case POWERPC_EXCP_PRIV:
1251 EXCP_DUMP(env, "Privilege violation\n");
1252 info.si_signo = TARGET_SIGILL;
1254 switch (env->error_code & 0xF) {
1255 case POWERPC_EXCP_PRIV_OPC:
1256 info.si_code = TARGET_ILL_PRVOPC;
1258 case POWERPC_EXCP_PRIV_REG:
1259 info.si_code = TARGET_ILL_PRVREG;
1262 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1263 env->error_code & 0xF);
1264 info.si_code = TARGET_ILL_PRVOPC;
1268 case POWERPC_EXCP_TRAP:
1269 cpu_abort(env, "Tried to call a TRAP\n");
1272 /* Should not happen ! */
1273 cpu_abort(env, "Unknown program exception (%02x)\n",
1277 info._sifields._sigfault._addr = env->nip - 4;
1278 queue_signal(env, info.si_signo, &info);
1280 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1281 EXCP_DUMP(env, "No floating point allowed\n");
1282 info.si_signo = TARGET_SIGILL;
1284 info.si_code = TARGET_ILL_COPROC;
1285 info._sifields._sigfault._addr = env->nip - 4;
1286 queue_signal(env, info.si_signo, &info);
1288 case POWERPC_EXCP_SYSCALL: /* System call exception */
1289 cpu_abort(env, "Syscall exception while in user mode. "
1292 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1293 EXCP_DUMP(env, "No APU instruction allowed\n");
1294 info.si_signo = TARGET_SIGILL;
1296 info.si_code = TARGET_ILL_COPROC;
1297 info._sifields._sigfault._addr = env->nip - 4;
1298 queue_signal(env, info.si_signo, &info);
1300 case POWERPC_EXCP_DECR: /* Decrementer exception */
1301 cpu_abort(env, "Decrementer interrupt while in user mode. "
1304 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1305 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1308 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1309 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1312 case POWERPC_EXCP_DTLB: /* Data TLB error */
1313 cpu_abort(env, "Data TLB exception while in user mode. "
1316 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1317 cpu_abort(env, "Instruction TLB exception while in user mode. "
1320 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1321 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1322 info.si_signo = TARGET_SIGILL;
1324 info.si_code = TARGET_ILL_COPROC;
1325 info._sifields._sigfault._addr = env->nip - 4;
1326 queue_signal(env, info.si_signo, &info);
1328 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1329 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1331 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1332 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1334 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1335 cpu_abort(env, "Performance monitor exception not handled\n");
1337 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1338 cpu_abort(env, "Doorbell interrupt while in user mode. "
1341 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1342 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1345 case POWERPC_EXCP_RESET: /* System reset exception */
1346 cpu_abort(env, "Reset interrupt while in user mode. "
1349 case POWERPC_EXCP_DSEG: /* Data segment exception */
1350 cpu_abort(env, "Data segment exception while in user mode. "
1353 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1354 cpu_abort(env, "Instruction segment exception "
1355 "while in user mode. Aborting\n");
1357 /* PowerPC 64 with hypervisor mode support */
1358 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1359 cpu_abort(env, "Hypervisor decrementer interrupt "
1360 "while in user mode. Aborting\n");
1362 case POWERPC_EXCP_TRACE: /* Trace exception */
1364 * we use this exception to emulate step-by-step execution mode.
1367 /* PowerPC 64 with hypervisor mode support */
1368 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1369 cpu_abort(env, "Hypervisor data storage exception "
1370 "while in user mode. Aborting\n");
1372 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1373 cpu_abort(env, "Hypervisor instruction storage exception "
1374 "while in user mode. Aborting\n");
1376 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1377 cpu_abort(env, "Hypervisor data segment exception "
1378 "while in user mode. Aborting\n");
1380 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1381 cpu_abort(env, "Hypervisor instruction segment exception "
1382 "while in user mode. Aborting\n");
1384 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1385 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1386 info.si_signo = TARGET_SIGILL;
1388 info.si_code = TARGET_ILL_COPROC;
1389 info._sifields._sigfault._addr = env->nip - 4;
1390 queue_signal(env, info.si_signo, &info);
1392 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1393 cpu_abort(env, "Programable interval timer interrupt "
1394 "while in user mode. Aborting\n");
1396 case POWERPC_EXCP_IO: /* IO error exception */
1397 cpu_abort(env, "IO error exception while in user mode. "
1400 case POWERPC_EXCP_RUNM: /* Run mode exception */
1401 cpu_abort(env, "Run mode exception while in user mode. "
1404 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1405 cpu_abort(env, "Emulation trap exception not handled\n");
1407 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1408 cpu_abort(env, "Instruction fetch TLB exception "
1409 "while in user-mode. Aborting");
1411 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1412 cpu_abort(env, "Data load TLB exception while in user-mode. "
1415 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1416 cpu_abort(env, "Data store TLB exception while in user-mode. "
1419 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1420 cpu_abort(env, "Floating-point assist exception not handled\n");
1422 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1423 cpu_abort(env, "Instruction address breakpoint exception "
1426 case POWERPC_EXCP_SMI: /* System management interrupt */
1427 cpu_abort(env, "System management interrupt while in user mode. "
1430 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1431 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1434 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1435 cpu_abort(env, "Performance monitor exception not handled\n");
1437 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1438 cpu_abort(env, "Vector assist exception not handled\n");
1440 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1441 cpu_abort(env, "Soft patch exception not handled\n");
1443 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1444 cpu_abort(env, "Maintenance exception while in user mode. "
1447 case POWERPC_EXCP_STOP: /* stop translation */
1448 /* We did invalidate the instruction cache. Go on */
1450 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1451 /* We just stopped because of a branch. Go on */
1453 case POWERPC_EXCP_SYSCALL_USER:
1454 /* system call in user-mode emulation */
1456 * PPC ABI uses overflow flag in cr0 to signal an error
1460 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1461 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1463 env->crf[0] &= ~0x1;
1464 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1465 env->gpr[5], env->gpr[6], env->gpr[7],
1467 if (ret > (uint32_t)(-515)) {
1473 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1480 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1482 info.si_signo = sig;
1484 info.si_code = TARGET_TRAP_BRKPT;
1485 queue_signal(env, info.si_signo, &info);
1489 case EXCP_INTERRUPT:
1490 /* just indicate that signals should be handled asap */
1493 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1496 process_pending_signals(env);
1503 #define MIPS_SYS(name, args) args,
1505 static const uint8_t mips_syscall_args[] = {
1506 MIPS_SYS(sys_syscall , 0) /* 4000 */
1507 MIPS_SYS(sys_exit , 1)
1508 MIPS_SYS(sys_fork , 0)
1509 MIPS_SYS(sys_read , 3)
1510 MIPS_SYS(sys_write , 3)
1511 MIPS_SYS(sys_open , 3) /* 4005 */
1512 MIPS_SYS(sys_close , 1)
1513 MIPS_SYS(sys_waitpid , 3)
1514 MIPS_SYS(sys_creat , 2)
1515 MIPS_SYS(sys_link , 2)
1516 MIPS_SYS(sys_unlink , 1) /* 4010 */
1517 MIPS_SYS(sys_execve , 0)
1518 MIPS_SYS(sys_chdir , 1)
1519 MIPS_SYS(sys_time , 1)
1520 MIPS_SYS(sys_mknod , 3)
1521 MIPS_SYS(sys_chmod , 2) /* 4015 */
1522 MIPS_SYS(sys_lchown , 3)
1523 MIPS_SYS(sys_ni_syscall , 0)
1524 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1525 MIPS_SYS(sys_lseek , 3)
1526 MIPS_SYS(sys_getpid , 0) /* 4020 */
1527 MIPS_SYS(sys_mount , 5)
1528 MIPS_SYS(sys_oldumount , 1)
1529 MIPS_SYS(sys_setuid , 1)
1530 MIPS_SYS(sys_getuid , 0)
1531 MIPS_SYS(sys_stime , 1) /* 4025 */
1532 MIPS_SYS(sys_ptrace , 4)
1533 MIPS_SYS(sys_alarm , 1)
1534 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1535 MIPS_SYS(sys_pause , 0)
1536 MIPS_SYS(sys_utime , 2) /* 4030 */
1537 MIPS_SYS(sys_ni_syscall , 0)
1538 MIPS_SYS(sys_ni_syscall , 0)
1539 MIPS_SYS(sys_access , 2)
1540 MIPS_SYS(sys_nice , 1)
1541 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1542 MIPS_SYS(sys_sync , 0)
1543 MIPS_SYS(sys_kill , 2)
1544 MIPS_SYS(sys_rename , 2)
1545 MIPS_SYS(sys_mkdir , 2)
1546 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1547 MIPS_SYS(sys_dup , 1)
1548 MIPS_SYS(sys_pipe , 0)
1549 MIPS_SYS(sys_times , 1)
1550 MIPS_SYS(sys_ni_syscall , 0)
1551 MIPS_SYS(sys_brk , 1) /* 4045 */
1552 MIPS_SYS(sys_setgid , 1)
1553 MIPS_SYS(sys_getgid , 0)
1554 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1555 MIPS_SYS(sys_geteuid , 0)
1556 MIPS_SYS(sys_getegid , 0) /* 4050 */
1557 MIPS_SYS(sys_acct , 0)
1558 MIPS_SYS(sys_umount , 2)
1559 MIPS_SYS(sys_ni_syscall , 0)
1560 MIPS_SYS(sys_ioctl , 3)
1561 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1562 MIPS_SYS(sys_ni_syscall , 2)
1563 MIPS_SYS(sys_setpgid , 2)
1564 MIPS_SYS(sys_ni_syscall , 0)
1565 MIPS_SYS(sys_olduname , 1)
1566 MIPS_SYS(sys_umask , 1) /* 4060 */
1567 MIPS_SYS(sys_chroot , 1)
1568 MIPS_SYS(sys_ustat , 2)
1569 MIPS_SYS(sys_dup2 , 2)
1570 MIPS_SYS(sys_getppid , 0)
1571 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1572 MIPS_SYS(sys_setsid , 0)
1573 MIPS_SYS(sys_sigaction , 3)
1574 MIPS_SYS(sys_sgetmask , 0)
1575 MIPS_SYS(sys_ssetmask , 1)
1576 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1577 MIPS_SYS(sys_setregid , 2)
1578 MIPS_SYS(sys_sigsuspend , 0)
1579 MIPS_SYS(sys_sigpending , 1)
1580 MIPS_SYS(sys_sethostname , 2)
1581 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1582 MIPS_SYS(sys_getrlimit , 2)
1583 MIPS_SYS(sys_getrusage , 2)
1584 MIPS_SYS(sys_gettimeofday, 2)
1585 MIPS_SYS(sys_settimeofday, 2)
1586 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1587 MIPS_SYS(sys_setgroups , 2)
1588 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1589 MIPS_SYS(sys_symlink , 2)
1590 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1591 MIPS_SYS(sys_readlink , 3) /* 4085 */
1592 MIPS_SYS(sys_uselib , 1)
1593 MIPS_SYS(sys_swapon , 2)
1594 MIPS_SYS(sys_reboot , 3)
1595 MIPS_SYS(old_readdir , 3)
1596 MIPS_SYS(old_mmap , 6) /* 4090 */
1597 MIPS_SYS(sys_munmap , 2)
1598 MIPS_SYS(sys_truncate , 2)
1599 MIPS_SYS(sys_ftruncate , 2)
1600 MIPS_SYS(sys_fchmod , 2)
1601 MIPS_SYS(sys_fchown , 3) /* 4095 */
1602 MIPS_SYS(sys_getpriority , 2)
1603 MIPS_SYS(sys_setpriority , 3)
1604 MIPS_SYS(sys_ni_syscall , 0)
1605 MIPS_SYS(sys_statfs , 2)
1606 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1607 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1608 MIPS_SYS(sys_socketcall , 2)
1609 MIPS_SYS(sys_syslog , 3)
1610 MIPS_SYS(sys_setitimer , 3)
1611 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1612 MIPS_SYS(sys_newstat , 2)
1613 MIPS_SYS(sys_newlstat , 2)
1614 MIPS_SYS(sys_newfstat , 2)
1615 MIPS_SYS(sys_uname , 1)
1616 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1617 MIPS_SYS(sys_vhangup , 0)
1618 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1619 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1620 MIPS_SYS(sys_wait4 , 4)
1621 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1622 MIPS_SYS(sys_sysinfo , 1)
1623 MIPS_SYS(sys_ipc , 6)
1624 MIPS_SYS(sys_fsync , 1)
1625 MIPS_SYS(sys_sigreturn , 0)
1626 MIPS_SYS(sys_clone , 0) /* 4120 */
1627 MIPS_SYS(sys_setdomainname, 2)
1628 MIPS_SYS(sys_newuname , 1)
1629 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1630 MIPS_SYS(sys_adjtimex , 1)
1631 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1632 MIPS_SYS(sys_sigprocmask , 3)
1633 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1634 MIPS_SYS(sys_init_module , 5)
1635 MIPS_SYS(sys_delete_module, 1)
1636 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1637 MIPS_SYS(sys_quotactl , 0)
1638 MIPS_SYS(sys_getpgid , 1)
1639 MIPS_SYS(sys_fchdir , 1)
1640 MIPS_SYS(sys_bdflush , 2)
1641 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1642 MIPS_SYS(sys_personality , 1)
1643 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1644 MIPS_SYS(sys_setfsuid , 1)
1645 MIPS_SYS(sys_setfsgid , 1)
1646 MIPS_SYS(sys_llseek , 5) /* 4140 */
1647 MIPS_SYS(sys_getdents , 3)
1648 MIPS_SYS(sys_select , 5)
1649 MIPS_SYS(sys_flock , 2)
1650 MIPS_SYS(sys_msync , 3)
1651 MIPS_SYS(sys_readv , 3) /* 4145 */
1652 MIPS_SYS(sys_writev , 3)
1653 MIPS_SYS(sys_cacheflush , 3)
1654 MIPS_SYS(sys_cachectl , 3)
1655 MIPS_SYS(sys_sysmips , 4)
1656 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1657 MIPS_SYS(sys_getsid , 1)
1658 MIPS_SYS(sys_fdatasync , 0)
1659 MIPS_SYS(sys_sysctl , 1)
1660 MIPS_SYS(sys_mlock , 2)
1661 MIPS_SYS(sys_munlock , 2) /* 4155 */
1662 MIPS_SYS(sys_mlockall , 1)
1663 MIPS_SYS(sys_munlockall , 0)
1664 MIPS_SYS(sys_sched_setparam, 2)
1665 MIPS_SYS(sys_sched_getparam, 2)
1666 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1667 MIPS_SYS(sys_sched_getscheduler, 1)
1668 MIPS_SYS(sys_sched_yield , 0)
1669 MIPS_SYS(sys_sched_get_priority_max, 1)
1670 MIPS_SYS(sys_sched_get_priority_min, 1)
1671 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1672 MIPS_SYS(sys_nanosleep, 2)
1673 MIPS_SYS(sys_mremap , 4)
1674 MIPS_SYS(sys_accept , 3)
1675 MIPS_SYS(sys_bind , 3)
1676 MIPS_SYS(sys_connect , 3) /* 4170 */
1677 MIPS_SYS(sys_getpeername , 3)
1678 MIPS_SYS(sys_getsockname , 3)
1679 MIPS_SYS(sys_getsockopt , 5)
1680 MIPS_SYS(sys_listen , 2)
1681 MIPS_SYS(sys_recv , 4) /* 4175 */
1682 MIPS_SYS(sys_recvfrom , 6)
1683 MIPS_SYS(sys_recvmsg , 3)
1684 MIPS_SYS(sys_send , 4)
1685 MIPS_SYS(sys_sendmsg , 3)
1686 MIPS_SYS(sys_sendto , 6) /* 4180 */
1687 MIPS_SYS(sys_setsockopt , 5)
1688 MIPS_SYS(sys_shutdown , 2)
1689 MIPS_SYS(sys_socket , 3)
1690 MIPS_SYS(sys_socketpair , 4)
1691 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1692 MIPS_SYS(sys_getresuid , 3)
1693 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1694 MIPS_SYS(sys_poll , 3)
1695 MIPS_SYS(sys_nfsservctl , 3)
1696 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1697 MIPS_SYS(sys_getresgid , 3)
1698 MIPS_SYS(sys_prctl , 5)
1699 MIPS_SYS(sys_rt_sigreturn, 0)
1700 MIPS_SYS(sys_rt_sigaction, 4)
1701 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1702 MIPS_SYS(sys_rt_sigpending, 2)
1703 MIPS_SYS(sys_rt_sigtimedwait, 4)
1704 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1705 MIPS_SYS(sys_rt_sigsuspend, 0)
1706 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1707 MIPS_SYS(sys_pwrite64 , 6)
1708 MIPS_SYS(sys_chown , 3)
1709 MIPS_SYS(sys_getcwd , 2)
1710 MIPS_SYS(sys_capget , 2)
1711 MIPS_SYS(sys_capset , 2) /* 4205 */
1712 MIPS_SYS(sys_sigaltstack , 0)
1713 MIPS_SYS(sys_sendfile , 4)
1714 MIPS_SYS(sys_ni_syscall , 0)
1715 MIPS_SYS(sys_ni_syscall , 0)
1716 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1717 MIPS_SYS(sys_truncate64 , 4)
1718 MIPS_SYS(sys_ftruncate64 , 4)
1719 MIPS_SYS(sys_stat64 , 2)
1720 MIPS_SYS(sys_lstat64 , 2)
1721 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1722 MIPS_SYS(sys_pivot_root , 2)
1723 MIPS_SYS(sys_mincore , 3)
1724 MIPS_SYS(sys_madvise , 3)
1725 MIPS_SYS(sys_getdents64 , 3)
1726 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1727 MIPS_SYS(sys_ni_syscall , 0)
1728 MIPS_SYS(sys_gettid , 0)
1729 MIPS_SYS(sys_readahead , 5)
1730 MIPS_SYS(sys_setxattr , 5)
1731 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1732 MIPS_SYS(sys_fsetxattr , 5)
1733 MIPS_SYS(sys_getxattr , 4)
1734 MIPS_SYS(sys_lgetxattr , 4)
1735 MIPS_SYS(sys_fgetxattr , 4)
1736 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1737 MIPS_SYS(sys_llistxattr , 3)
1738 MIPS_SYS(sys_flistxattr , 3)
1739 MIPS_SYS(sys_removexattr , 2)
1740 MIPS_SYS(sys_lremovexattr, 2)
1741 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1742 MIPS_SYS(sys_tkill , 2)
1743 MIPS_SYS(sys_sendfile64 , 5)
1744 MIPS_SYS(sys_futex , 2)
1745 MIPS_SYS(sys_sched_setaffinity, 3)
1746 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1747 MIPS_SYS(sys_io_setup , 2)
1748 MIPS_SYS(sys_io_destroy , 1)
1749 MIPS_SYS(sys_io_getevents, 5)
1750 MIPS_SYS(sys_io_submit , 3)
1751 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1752 MIPS_SYS(sys_exit_group , 1)
1753 MIPS_SYS(sys_lookup_dcookie, 3)
1754 MIPS_SYS(sys_epoll_create, 1)
1755 MIPS_SYS(sys_epoll_ctl , 4)
1756 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1757 MIPS_SYS(sys_remap_file_pages, 5)
1758 MIPS_SYS(sys_set_tid_address, 1)
1759 MIPS_SYS(sys_restart_syscall, 0)
1760 MIPS_SYS(sys_fadvise64_64, 7)
1761 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1762 MIPS_SYS(sys_fstatfs64 , 2)
1763 MIPS_SYS(sys_timer_create, 3)
1764 MIPS_SYS(sys_timer_settime, 4)
1765 MIPS_SYS(sys_timer_gettime, 2)
1766 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1767 MIPS_SYS(sys_timer_delete, 1)
1768 MIPS_SYS(sys_clock_settime, 2)
1769 MIPS_SYS(sys_clock_gettime, 2)
1770 MIPS_SYS(sys_clock_getres, 2)
1771 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1772 MIPS_SYS(sys_tgkill , 3)
1773 MIPS_SYS(sys_utimes , 2)
1774 MIPS_SYS(sys_mbind , 4)
1775 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1776 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1777 MIPS_SYS(sys_mq_open , 4)
1778 MIPS_SYS(sys_mq_unlink , 1)
1779 MIPS_SYS(sys_mq_timedsend, 5)
1780 MIPS_SYS(sys_mq_timedreceive, 5)
1781 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1782 MIPS_SYS(sys_mq_getsetattr, 3)
1783 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1784 MIPS_SYS(sys_waitid , 4)
1785 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1786 MIPS_SYS(sys_add_key , 5)
1787 MIPS_SYS(sys_request_key, 4)
1788 MIPS_SYS(sys_keyctl , 5)
1789 MIPS_SYS(sys_set_thread_area, 1)
1790 MIPS_SYS(sys_inotify_init, 0)
1791 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1792 MIPS_SYS(sys_inotify_rm_watch, 2)
1793 MIPS_SYS(sys_migrate_pages, 4)
1794 MIPS_SYS(sys_openat, 4)
1795 MIPS_SYS(sys_mkdirat, 3)
1796 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1797 MIPS_SYS(sys_fchownat, 5)
1798 MIPS_SYS(sys_futimesat, 3)
1799 MIPS_SYS(sys_fstatat64, 4)
1800 MIPS_SYS(sys_unlinkat, 3)
1801 MIPS_SYS(sys_renameat, 4) /* 4295 */
1802 MIPS_SYS(sys_linkat, 5)
1803 MIPS_SYS(sys_symlinkat, 3)
1804 MIPS_SYS(sys_readlinkat, 4)
1805 MIPS_SYS(sys_fchmodat, 3)
1806 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1807 MIPS_SYS(sys_pselect6, 6)
1808 MIPS_SYS(sys_ppoll, 5)
1809 MIPS_SYS(sys_unshare, 1)
1810 MIPS_SYS(sys_splice, 4)
1811 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1812 MIPS_SYS(sys_tee, 4)
1813 MIPS_SYS(sys_vmsplice, 4)
1814 MIPS_SYS(sys_move_pages, 6)
1815 MIPS_SYS(sys_set_robust_list, 2)
1816 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1817 MIPS_SYS(sys_kexec_load, 4)
1818 MIPS_SYS(sys_getcpu, 3)
1819 MIPS_SYS(sys_epoll_pwait, 6)
1820 MIPS_SYS(sys_ioprio_set, 3)
1821 MIPS_SYS(sys_ioprio_get, 2)
1826 void cpu_loop(CPUMIPSState *env)
1828 target_siginfo_t info;
1830 unsigned int syscall_num;
1833 trapnr = cpu_mips_exec(env);
1836 syscall_num = env->active_tc.gpr[2] - 4000;
1837 env->active_tc.PC += 4;
1838 if (syscall_num >= sizeof(mips_syscall_args)) {
1843 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1845 nb_args = mips_syscall_args[syscall_num];
1846 sp_reg = env->active_tc.gpr[29];
1848 /* these arguments are taken from the stack */
1849 /* FIXME - what to do if get_user() fails? */
1850 case 8: get_user_ual(arg8, sp_reg + 28);
1851 case 7: get_user_ual(arg7, sp_reg + 24);
1852 case 6: get_user_ual(arg6, sp_reg + 20);
1853 case 5: get_user_ual(arg5, sp_reg + 16);
1857 ret = do_syscall(env, env->active_tc.gpr[2],
1858 env->active_tc.gpr[4],
1859 env->active_tc.gpr[5],
1860 env->active_tc.gpr[6],
1861 env->active_tc.gpr[7],
1862 arg5, arg6/*, arg7, arg8*/);
1864 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1865 env->active_tc.gpr[7] = 1; /* error flag */
1868 env->active_tc.gpr[7] = 0; /* error flag */
1870 env->active_tc.gpr[2] = ret;
1876 info.si_signo = TARGET_SIGILL;
1879 queue_signal(env, info.si_signo, &info);
1881 case EXCP_INTERRUPT:
1882 /* just indicate that signals should be handled asap */
1888 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1891 info.si_signo = sig;
1893 info.si_code = TARGET_TRAP_BRKPT;
1894 queue_signal(env, info.si_signo, &info);
1900 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1902 cpu_dump_state(env, stderr, fprintf, 0);
1905 process_pending_signals(env);
1911 void cpu_loop (CPUState *env)
1914 target_siginfo_t info;
1917 trapnr = cpu_sh4_exec (env);
1922 ret = do_syscall(env,
1930 env->gregs[0] = ret;
1932 case EXCP_INTERRUPT:
1933 /* just indicate that signals should be handled asap */
1939 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1942 info.si_signo = sig;
1944 info.si_code = TARGET_TRAP_BRKPT;
1945 queue_signal(env, info.si_signo, &info);
1951 info.si_signo = SIGSEGV;
1953 info.si_code = TARGET_SEGV_MAPERR;
1954 info._sifields._sigfault._addr = env->tea;
1955 queue_signal(env, info.si_signo, &info);
1959 printf ("Unhandled trap: 0x%x\n", trapnr);
1960 cpu_dump_state(env, stderr, fprintf, 0);
1963 process_pending_signals (env);
1969 void cpu_loop (CPUState *env)
1972 target_siginfo_t info;
1975 trapnr = cpu_cris_exec (env);
1979 info.si_signo = SIGSEGV;
1981 /* XXX: check env->error_code */
1982 info.si_code = TARGET_SEGV_MAPERR;
1983 info._sifields._sigfault._addr = env->pregs[PR_EDA];
1984 queue_signal(env, info.si_signo, &info);
1987 case EXCP_INTERRUPT:
1988 /* just indicate that signals should be handled asap */
1991 ret = do_syscall(env,
1999 env->regs[10] = ret;
2005 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2008 info.si_signo = sig;
2010 info.si_code = TARGET_TRAP_BRKPT;
2011 queue_signal(env, info.si_signo, &info);
2016 printf ("Unhandled trap: 0x%x\n", trapnr);
2017 cpu_dump_state(env, stderr, fprintf, 0);
2020 process_pending_signals (env);
2027 void cpu_loop(CPUM68KState *env)
2031 target_siginfo_t info;
2032 TaskState *ts = env->opaque;
2035 trapnr = cpu_m68k_exec(env);
2039 if (ts->sim_syscalls) {
2041 nr = lduw(env->pc + 2);
2043 do_m68k_simcall(env, nr);
2049 case EXCP_HALT_INSN:
2050 /* Semihosing syscall. */
2052 do_m68k_semihosting(env, env->dregs[0]);
2056 case EXCP_UNSUPPORTED:
2058 info.si_signo = SIGILL;
2060 info.si_code = TARGET_ILL_ILLOPN;
2061 info._sifields._sigfault._addr = env->pc;
2062 queue_signal(env, info.si_signo, &info);
2066 ts->sim_syscalls = 0;
2069 env->dregs[0] = do_syscall(env,
2079 case EXCP_INTERRUPT:
2080 /* just indicate that signals should be handled asap */
2084 info.si_signo = SIGSEGV;
2086 /* XXX: check env->error_code */
2087 info.si_code = TARGET_SEGV_MAPERR;
2088 info._sifields._sigfault._addr = env->mmu.ar;
2089 queue_signal(env, info.si_signo, &info);
2096 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2099 info.si_signo = sig;
2101 info.si_code = TARGET_TRAP_BRKPT;
2102 queue_signal(env, info.si_signo, &info);
2107 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2109 cpu_dump_state(env, stderr, fprintf, 0);
2112 process_pending_signals(env);
2115 #endif /* TARGET_M68K */
2118 void cpu_loop (CPUState *env)
2121 target_siginfo_t info;
2124 trapnr = cpu_alpha_exec (env);
2128 fprintf(stderr, "Reset requested. Exit\n");
2132 fprintf(stderr, "Machine check exception. Exit\n");
2136 fprintf(stderr, "Arithmetic trap.\n");
2139 case EXCP_HW_INTERRUPT:
2140 fprintf(stderr, "External interrupt. Exit\n");
2144 fprintf(stderr, "MMU data fault\n");
2147 case EXCP_DTB_MISS_PAL:
2148 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2152 fprintf(stderr, "MMU instruction TLB miss\n");
2156 fprintf(stderr, "MMU instruction access violation\n");
2159 case EXCP_DTB_MISS_NATIVE:
2160 fprintf(stderr, "MMU data TLB miss\n");
2164 fprintf(stderr, "Unaligned access\n");
2168 fprintf(stderr, "Invalid instruction\n");
2172 fprintf(stderr, "Floating-point not allowed\n");
2175 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2176 call_pal(env, (trapnr >> 6) | 0x80);
2178 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2179 fprintf(stderr, "Privileged call to PALcode\n");
2186 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2189 info.si_signo = sig;
2191 info.si_code = TARGET_TRAP_BRKPT;
2192 queue_signal(env, info.si_signo, &info);
2197 printf ("Unhandled trap: 0x%x\n", trapnr);
2198 cpu_dump_state(env, stderr, fprintf, 0);
2201 process_pending_signals (env);
2204 #endif /* TARGET_ALPHA */
2206 static void usage(void)
2208 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2209 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2210 "Linux CPU emulator (compiled for %s emulation)\n"
2212 "Standard options:\n"
2213 "-h print this help\n"
2214 "-g port wait gdb connection to port\n"
2215 "-L path set the elf interpreter prefix (default=%s)\n"
2216 "-s size set the stack size in bytes (default=%ld)\n"
2217 "-cpu model select CPU (-cpu ? for list)\n"
2218 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2219 "-E var=value sets/modifies targets environment variable(s)\n"
2220 "-U var unsets targets environment variable(s)\n"
2221 "-0 argv0 forces target process argv[0] to be argv0\n"
2222 #if defined(CONFIG_USE_GUEST_BASE)
2223 "-B address set guest_base address to address\n"
2227 "-d options activate log (logfile=%s)\n"
2228 "-p pagesize set the host page size to 'pagesize'\n"
2229 "-strace log system calls\n"
2231 "Environment variables:\n"
2232 "QEMU_STRACE Print system calls and arguments similar to the\n"
2233 " 'strace' program. Enable by setting to any value.\n"
2235 "You can use -E and -U options to set/unset environment variables\n"
2236 "for target process. It is possible to provide several variables\n"
2237 "by repeating the option. For example:\n"
2238 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2239 "Note that if you provide several changes to single variable\n"
2240 "last change will stay in effect.\n"
2241 #if defined(CONFIG_USE_GUEST_BASE)
2243 "You can use -B option to load target binary into different\n"
2244 "address that is specified in elf headers. This can be useful\n"
2245 "when target binary would be loaded to low addresses and\n"
2246 "/proc/sys/vm/mmap_min_addr is set to higher. For example\n"
2247 " qemu-" TARGET_ARCH " -B 0x100000 ...\n"
2248 "loads target binary starting from the first meg.\n"
2258 THREAD CPUState *thread_env;
2260 /* Assumes contents are already zeroed. */
2261 void init_task_state(TaskState *ts)
2266 ts->first_free = ts->sigqueue_table;
2267 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2268 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2270 ts->sigqueue_table[i].next = NULL;
2273 int main(int argc, char **argv, char **envp)
2275 const char *filename = NULL;
2276 const char *cpu_model;
2277 struct target_pt_regs regs1, *regs = ®s1;
2278 struct image_info info1, *info = &info1;
2279 TaskState ts1, *ts = &ts1;
2283 int gdbstub_port = 0;
2284 char **target_environ, **wrk;
2287 int drop_ld_preload = 0;
2288 envlist_t *envlist = NULL;
2289 const char *argv0 = NULL;
2295 qemu_cache_utils_init(envp);
2298 cpu_set_log_filename(DEBUG_LOGFILE);
2300 if ((envlist = envlist_create()) == NULL) {
2301 (void) fprintf(stderr, "Unable to allocate envlist\n");
2305 /* add current environment into the list */
2306 for (wrk = environ; *wrk != NULL; wrk++) {
2307 (void) envlist_setenv(envlist, *wrk);
2320 if (!strcmp(r, "-")) {
2322 } else if (!strcmp(r, "d")) {
2324 const CPULogItem *item;
2330 mask = cpu_str_to_log_mask(r);
2332 printf("Log items (comma separated):\n");
2333 for(item = cpu_log_items; item->mask != 0; item++) {
2334 printf("%-10s %s\n", item->name, item->help);
2339 } else if (!strcmp(r, "E")) {
2341 if (envlist_setenv(envlist, r) != 0)
2343 } else if (!strcmp(r, "U")) {
2345 if (envlist_unsetenv(envlist, r) != 0)
2347 } else if (!strcmp(r, "0")) {
2350 } else if (!strcmp(r,"-sbox-call")) {
2354 } else if (!strcmp(r, "s")) {
2358 x86_stack_size = strtol(r, (char **)&r, 0);
2359 if (x86_stack_size <= 0)
2362 x86_stack_size *= 1024 * 1024;
2363 else if (*r == 'k' || *r == 'K')
2364 x86_stack_size *= 1024;
2365 } else if (!strcmp(r, "L")) {
2366 interp_prefix = argv[optind++];
2367 } else if (!strcmp(r, "p")) {
2370 qemu_host_page_size = atoi(argv[optind++]);
2371 if (qemu_host_page_size == 0 ||
2372 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2373 fprintf(stderr, "page size must be a power of two\n");
2376 } else if (!strcmp(r, "g")) {
2379 gdbstub_port = atoi(argv[optind++]);
2380 } else if (!strcmp(r, "r")) {
2381 qemu_uname_release = argv[optind++];
2382 } else if (!strcmp(r, "cpu")) {
2383 cpu_model = argv[optind++];
2384 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
2385 /* XXX: implement xxx_cpu_list for targets that still miss it */
2386 #if defined(cpu_list)
2387 cpu_list(stdout, &fprintf);
2391 #if defined(CONFIG_USE_GUEST_BASE)
2392 } else if (!strcmp(r, "B")) {
2393 guest_base = strtol(argv[optind++], NULL, 0);
2395 } else if (!strcmp(r, "drop-ld-preload")) {
2396 drop_ld_preload = 1;
2397 } else if (!strcmp(r, "keep-ld-preload")) {
2398 drop_ld_preload = 0;
2399 } else if (!strcmp(r, "strace")) {
2408 if (filename == NULL) {
2409 filename = argv[optind];
2410 exec_path = argv[optind];
2412 argv0 = argv[optind];
2414 if (drop_ld_preload) {
2415 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
2419 memset(regs, 0, sizeof(struct target_pt_regs));
2421 /* Zero out image_info */
2422 memset(info, 0, sizeof(struct image_info));
2424 /* Scan interp_prefix dir for replacement files. */
2425 init_paths(interp_prefix);
2427 if (cpu_model == NULL) {
2428 #if defined(TARGET_I386)
2429 #ifdef TARGET_X86_64
2430 cpu_model = "qemu64";
2432 cpu_model = "qemu32";
2434 #elif defined(TARGET_ARM)
2436 #elif defined(TARGET_M68K)
2438 #elif defined(TARGET_SPARC)
2439 #ifdef TARGET_SPARC64
2440 cpu_model = "TI UltraSparc II";
2442 cpu_model = "Fujitsu MB86904";
2444 #elif defined(TARGET_MIPS)
2445 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2450 #elif defined(TARGET_PPC)
2460 cpu_exec_init_all(0);
2461 /* NOTE: we need to init the CPU at this stage to get
2462 qemu_host_page_size */
2463 env = cpu_init(cpu_model);
2465 fprintf(stderr, "Unable to find CPU definition\n");
2470 if (getenv("QEMU_STRACE")) {
2474 target_environ = envlist_to_environ(envlist, NULL);
2475 envlist_free(envlist);
2477 #if defined(CONFIG_USE_GUEST_BASE)
2479 * Now that page sizes are configured in cpu_init() we can do
2480 * proper page alignment for guest_base.
2482 guest_base = HOST_PAGE_ALIGN(guest_base);
2485 * Read in mmap_min_addr kernel parameter and check
2486 * whether it is set to some value > 0. This value is used
2487 * later on when doing mmap(2)s to calculate where guest_base
2488 * is to set, if needed.
2490 * When user has explicitly set the quest base, we skip this
2493 if (guest_base == 0) {
2496 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
2498 if (fscanf(fp, "%lu", &tmp) == 1) {
2499 mmap_min_addr = tmp;
2500 qemu_log("kernel mmap_min_addr=%lu\n", mmap_min_addr);
2505 #endif /* CONFIG_USE_GUEST_BASE */
2508 * Prepare copy of argv vector for target.
2510 target_argc = argc - optind;
2511 target_argv = calloc(target_argc + 1, sizeof (char *));
2512 if (target_argv == NULL) {
2513 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
2518 * If argv0 is specified (using '-0' switch) we replace
2519 * argv[0] pointer with the given one.
2522 if (argv0 != NULL) {
2523 target_argv[i++] = strdup(argv0);
2525 for (; i < target_argc; i++) {
2526 target_argv[i] = strdup(argv[optind + i]);
2528 target_argv[target_argc] = NULL;
2530 if (loader_exec(filename, target_argv, target_environ, regs, info) != 0) {
2531 printf("Error loading %s\n", filename);
2535 for (i = 0; i < target_argc; i++) {
2536 free(target_argv[i]);
2540 for (wrk = target_environ; *wrk; wrk++) {
2544 free(target_environ);
2546 if (qemu_log_enabled()) {
2547 #if defined(CONFIG_USE_GUEST_BASE)
2548 if (guest_base > 0) {
2549 qemu_log("guest_base is set to 0x%lx\n", guest_base);
2551 "==========================================================\n"
2552 "Note that all target addresses below are given in target\n"
2553 "address space which is different from host by guest_base.\n"
2554 "For example: target address 0x%x becomes 0x%x and so on.\n"
2555 "==========================================================\n",
2556 (uintptr_t)0x8000, (uintptr_t)g2h(0x8000));
2561 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2562 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2563 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
2565 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
2567 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2568 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
2570 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2571 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2574 target_set_brk(info->brk);
2578 /* build Task State */
2579 memset(ts, 0, sizeof(TaskState));
2580 init_task_state(ts);
2584 #if defined(TARGET_I386)
2585 cpu_x86_set_cpl(env, 3);
2587 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2588 env->hflags |= HF_PE_MASK;
2589 if (env->cpuid_features & CPUID_SSE) {
2590 env->cr[4] |= CR4_OSFXSR_MASK;
2591 env->hflags |= HF_OSFXSR_MASK;
2593 #ifndef TARGET_ABI32
2594 /* enable 64 bit mode if possible */
2595 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2596 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2599 env->cr[4] |= CR4_PAE_MASK;
2600 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2601 env->hflags |= HF_LMA_MASK;
2604 /* flags setup : we activate the IRQs by default as in user mode */
2605 env->eflags |= IF_MASK;
2607 /* linux register setup */
2608 #ifndef TARGET_ABI32
2609 env->regs[R_EAX] = regs->rax;
2610 env->regs[R_EBX] = regs->rbx;
2611 env->regs[R_ECX] = regs->rcx;
2612 env->regs[R_EDX] = regs->rdx;
2613 env->regs[R_ESI] = regs->rsi;
2614 env->regs[R_EDI] = regs->rdi;
2615 env->regs[R_EBP] = regs->rbp;
2616 env->regs[R_ESP] = regs->rsp;
2617 env->eip = regs->rip;
2619 env->regs[R_EAX] = regs->eax;
2620 env->regs[R_EBX] = regs->ebx;
2621 env->regs[R_ECX] = regs->ecx;
2622 env->regs[R_EDX] = regs->edx;
2623 env->regs[R_ESI] = regs->esi;
2624 env->regs[R_EDI] = regs->edi;
2625 env->regs[R_EBP] = regs->ebp;
2626 env->regs[R_ESP] = regs->esp;
2627 env->eip = regs->eip;
2630 /* linux interrupt setup */
2631 #ifndef TARGET_ABI32
2632 env->idt.limit = 511;
2634 env->idt.limit = 255;
2636 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
2637 PROT_READ|PROT_WRITE,
2638 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2639 idt_table = g2h(env->idt.base);
2662 /* linux segment setup */
2664 uint64_t *gdt_table;
2665 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
2666 PROT_READ|PROT_WRITE,
2667 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2668 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2669 gdt_table = g2h(env->gdt.base);
2671 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2672 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2673 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2675 /* 64 bit code segment */
2676 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2677 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2679 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2681 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2682 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2683 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2685 cpu_x86_load_seg(env, R_CS, __USER_CS);
2686 cpu_x86_load_seg(env, R_SS, __USER_DS);
2688 cpu_x86_load_seg(env, R_DS, __USER_DS);
2689 cpu_x86_load_seg(env, R_ES, __USER_DS);
2690 cpu_x86_load_seg(env, R_FS, __USER_DS);
2691 cpu_x86_load_seg(env, R_GS, __USER_DS);
2692 /* This hack makes Wine work... */
2693 env->segs[R_FS].selector = 0;
2695 cpu_x86_load_seg(env, R_DS, 0);
2696 cpu_x86_load_seg(env, R_ES, 0);
2697 cpu_x86_load_seg(env, R_FS, 0);
2698 cpu_x86_load_seg(env, R_GS, 0);
2700 #elif defined(TARGET_ARM)
2703 cpsr_write(env, regs->uregs[16], 0xffffffff);
2704 for(i = 0; i < 16; i++) {
2705 env->regs[i] = regs->uregs[i];
2708 #elif defined(TARGET_SPARC)
2712 env->npc = regs->npc;
2714 for(i = 0; i < 8; i++)
2715 env->gregs[i] = regs->u_regs[i];
2716 for(i = 0; i < 8; i++)
2717 env->regwptr[i] = regs->u_regs[i + 8];
2719 #elif defined(TARGET_PPC)
2723 #if defined(TARGET_PPC64)
2724 #if defined(TARGET_ABI32)
2725 env->msr &= ~((target_ulong)1 << MSR_SF);
2727 env->msr |= (target_ulong)1 << MSR_SF;
2730 env->nip = regs->nip;
2731 for(i = 0; i < 32; i++) {
2732 env->gpr[i] = regs->gpr[i];
2735 #elif defined(TARGET_M68K)
2738 env->dregs[0] = regs->d0;
2739 env->dregs[1] = regs->d1;
2740 env->dregs[2] = regs->d2;
2741 env->dregs[3] = regs->d3;
2742 env->dregs[4] = regs->d4;
2743 env->dregs[5] = regs->d5;
2744 env->dregs[6] = regs->d6;
2745 env->dregs[7] = regs->d7;
2746 env->aregs[0] = regs->a0;
2747 env->aregs[1] = regs->a1;
2748 env->aregs[2] = regs->a2;
2749 env->aregs[3] = regs->a3;
2750 env->aregs[4] = regs->a4;
2751 env->aregs[5] = regs->a5;
2752 env->aregs[6] = regs->a6;
2753 env->aregs[7] = regs->usp;
2755 ts->sim_syscalls = 1;
2757 #elif defined(TARGET_MIPS)
2761 for(i = 0; i < 32; i++) {
2762 env->active_tc.gpr[i] = regs->regs[i];
2764 env->active_tc.PC = regs->cp0_epc;
2766 #elif defined(TARGET_SH4)
2770 for(i = 0; i < 16; i++) {
2771 env->gregs[i] = regs->regs[i];
2775 #elif defined(TARGET_ALPHA)
2779 for(i = 0; i < 28; i++) {
2780 env->ir[i] = ((abi_ulong *)regs)[i];
2782 env->ipr[IPR_USP] = regs->usp;
2783 env->ir[30] = regs->usp;
2785 env->unique = regs->unique;
2787 #elif defined(TARGET_CRIS)
2789 env->regs[0] = regs->r0;
2790 env->regs[1] = regs->r1;
2791 env->regs[2] = regs->r2;
2792 env->regs[3] = regs->r3;
2793 env->regs[4] = regs->r4;
2794 env->regs[5] = regs->r5;
2795 env->regs[6] = regs->r6;
2796 env->regs[7] = regs->r7;
2797 env->regs[8] = regs->r8;
2798 env->regs[9] = regs->r9;
2799 env->regs[10] = regs->r10;
2800 env->regs[11] = regs->r11;
2801 env->regs[12] = regs->r12;
2802 env->regs[13] = regs->r13;
2803 env->regs[14] = info->start_stack;
2804 env->regs[15] = regs->acr;
2805 env->pc = regs->erp;
2808 #error unsupported target CPU
2811 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2812 ts->stack_base = info->start_stack;
2813 ts->heap_base = info->brk;
2814 /* This will be filled in on the first SYS_HEAPINFO call. */
2819 gdbserver_start (gdbstub_port);
2820 gdb_handlesig(env, 0);