4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 #include "qemu-common.h"
32 #define DEBUG_LOGFILE "/tmp/qemu.log"
34 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
35 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
37 #if defined(__i386__) && !defined(CONFIG_STATIC)
38 /* Force usage of an ELF interpreter even if it is an ELF shared
40 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
43 /* for recent libc, we add these dummy symbols which are not declared
44 when generating a linked object (bug in ld ?) */
45 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
46 asm(".globl __preinit_array_start\n"
47 ".globl __preinit_array_end\n"
48 ".globl __init_array_start\n"
49 ".globl __init_array_end\n"
50 ".globl __fini_array_start\n"
51 ".globl __fini_array_end\n"
52 ".section \".rodata\"\n"
53 "__preinit_array_start:\n"
54 "__preinit_array_end:\n"
55 "__init_array_start:\n"
57 "__fini_array_start:\n"
63 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
64 we allocate a bigger stack. Need a better solution, for example
65 by remapping the process stack directly at the right place */
66 unsigned long x86_stack_size = 512 * 1024;
68 void gemu_log(const char *fmt, ...)
73 vfprintf(stderr, fmt, ap);
77 void cpu_outb(CPUState *env, int addr, int val)
79 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
82 void cpu_outw(CPUState *env, int addr, int val)
84 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
87 void cpu_outl(CPUState *env, int addr, int val)
89 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
92 int cpu_inb(CPUState *env, int addr)
94 fprintf(stderr, "inb: port=0x%04x\n", addr);
98 int cpu_inw(CPUState *env, int addr)
100 fprintf(stderr, "inw: port=0x%04x\n", addr);
104 int cpu_inl(CPUState *env, int addr)
106 fprintf(stderr, "inl: port=0x%04x\n", addr);
110 #if defined(TARGET_I386)
111 int cpu_get_pic_interrupt(CPUState *env)
117 /* timers for rdtsc */
121 static uint64_t emu_time;
123 int64_t cpu_get_real_ticks(void)
130 #if defined(USE_NPTL)
131 /***********************************************************/
132 /* Helper routines for implementing atomic operations. */
134 /* To implement exclusive operations we force all cpus to syncronise.
135 We don't require a full sync, only that no cpus are executing guest code.
136 The alternative is to map target atomic ops onto host equivalents,
137 which requires quite a lot of per host/target work. */
138 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
139 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
140 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
141 static int pending_cpus;
143 /* Make sure everything is in a consistent state for calling fork(). */
144 void fork_start(void)
147 pthread_mutex_lock(&tb_lock);
148 pthread_mutex_lock(&exclusive_lock);
151 void fork_end(int child)
154 /* Child processes created by fork() only have a single thread.
155 Discard information about the parent threads. */
156 first_cpu = thread_env;
157 thread_env->next_cpu = NULL;
159 pthread_mutex_init(&exclusive_lock, NULL);
160 pthread_cond_init(&exclusive_cond, NULL);
161 pthread_cond_init(&exclusive_resume, NULL);
162 pthread_mutex_init(&tb_lock, NULL);
164 pthread_mutex_unlock(&exclusive_lock);
165 pthread_mutex_unlock(&tb_lock);
167 mmap_fork_end(child);
170 /* Wait for pending exclusive operations to complete. The exclusive lock
172 static inline void exclusive_idle(void)
174 while (pending_cpus) {
175 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
179 /* Start an exclusive operation.
180 Must only be called from outside cpu_arm_exec. */
181 static inline void start_exclusive(void)
184 pthread_mutex_lock(&exclusive_lock);
188 /* Make all other cpus stop executing. */
189 for (other = first_cpu; other; other = other->next_cpu) {
190 if (other->running) {
192 cpu_interrupt(other, CPU_INTERRUPT_EXIT);
195 if (pending_cpus > 1) {
196 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
200 /* Finish an exclusive operation. */
201 static inline void end_exclusive(void)
204 pthread_cond_broadcast(&exclusive_resume);
205 pthread_mutex_unlock(&exclusive_lock);
208 /* Wait for exclusive ops to finish, and begin cpu execution. */
209 static inline void cpu_exec_start(CPUState *env)
211 pthread_mutex_lock(&exclusive_lock);
214 pthread_mutex_unlock(&exclusive_lock);
217 /* Mark cpu as not executing, and release pending exclusive ops. */
218 static inline void cpu_exec_end(CPUState *env)
220 pthread_mutex_lock(&exclusive_lock);
222 if (pending_cpus > 1) {
224 if (pending_cpus == 1) {
225 pthread_cond_signal(&exclusive_cond);
229 pthread_mutex_unlock(&exclusive_lock);
231 #else /* if !USE_NPTL */
232 /* These are no-ops because we are not threadsafe. */
233 static inline void cpu_exec_start(CPUState *env)
237 static inline void cpu_exec_end(CPUState *env)
241 static inline void start_exclusive(void)
245 static inline void end_exclusive(void)
249 void fork_start(void)
253 void fork_end(int child)
260 /***********************************************************/
261 /* CPUX86 core interface */
263 void cpu_smm_update(CPUState *env)
267 uint64_t cpu_get_tsc(CPUX86State *env)
269 return cpu_get_real_ticks();
272 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
277 e1 = (addr << 16) | (limit & 0xffff);
278 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
286 uint64_t idt_table[512];
288 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
289 uint64_t addr, unsigned int sel)
292 e1 = (addr & 0xffff) | (sel << 16);
293 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
297 p[2] = tswap32(addr >> 32);
300 /* only dpl matters as we do only user space emulation */
301 static void set_idt(int n, unsigned int dpl)
303 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
306 uint64_t idt_table[256];
308 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
309 uint32_t addr, unsigned int sel)
312 e1 = (addr & 0xffff) | (sel << 16);
313 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
319 /* only dpl matters as we do only user space emulation */
320 static void set_idt(int n, unsigned int dpl)
322 set_gate(idt_table + n, 0, dpl, 0, 0);
326 void cpu_loop(CPUX86State *env)
330 target_siginfo_t info;
333 trapnr = cpu_x86_exec(env);
336 /* linux syscall from int $0x80 */
337 env->regs[R_EAX] = do_syscall(env,
348 /* linux syscall from syscall intruction */
349 env->regs[R_EAX] = do_syscall(env,
357 env->eip = env->exception_next_eip;
362 info.si_signo = SIGBUS;
364 info.si_code = TARGET_SI_KERNEL;
365 info._sifields._sigfault._addr = 0;
366 queue_signal(env, info.si_signo, &info);
369 /* XXX: potential problem if ABI32 */
370 #ifndef TARGET_X86_64
371 if (env->eflags & VM_MASK) {
372 handle_vm86_fault(env);
376 info.si_signo = SIGSEGV;
378 info.si_code = TARGET_SI_KERNEL;
379 info._sifields._sigfault._addr = 0;
380 queue_signal(env, info.si_signo, &info);
384 info.si_signo = SIGSEGV;
386 if (!(env->error_code & 1))
387 info.si_code = TARGET_SEGV_MAPERR;
389 info.si_code = TARGET_SEGV_ACCERR;
390 info._sifields._sigfault._addr = env->cr[2];
391 queue_signal(env, info.si_signo, &info);
394 #ifndef TARGET_X86_64
395 if (env->eflags & VM_MASK) {
396 handle_vm86_trap(env, trapnr);
400 /* division by zero */
401 info.si_signo = SIGFPE;
403 info.si_code = TARGET_FPE_INTDIV;
404 info._sifields._sigfault._addr = env->eip;
405 queue_signal(env, info.si_signo, &info);
410 #ifndef TARGET_X86_64
411 if (env->eflags & VM_MASK) {
412 handle_vm86_trap(env, trapnr);
416 info.si_signo = SIGTRAP;
418 if (trapnr == EXCP01_SSTP) {
419 info.si_code = TARGET_TRAP_BRKPT;
420 info._sifields._sigfault._addr = env->eip;
422 info.si_code = TARGET_SI_KERNEL;
423 info._sifields._sigfault._addr = 0;
425 queue_signal(env, info.si_signo, &info);
430 #ifndef TARGET_X86_64
431 if (env->eflags & VM_MASK) {
432 handle_vm86_trap(env, trapnr);
436 info.si_signo = SIGSEGV;
438 info.si_code = TARGET_SI_KERNEL;
439 info._sifields._sigfault._addr = 0;
440 queue_signal(env, info.si_signo, &info);
444 info.si_signo = SIGILL;
446 info.si_code = TARGET_ILL_ILLOPN;
447 info._sifields._sigfault._addr = env->eip;
448 queue_signal(env, info.si_signo, &info);
451 /* just indicate that signals should be handled asap */
457 sig = gdb_handlesig (env, TARGET_SIGTRAP);
462 info.si_code = TARGET_TRAP_BRKPT;
463 queue_signal(env, info.si_signo, &info);
468 pc = env->segs[R_CS].base + env->eip;
469 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
473 process_pending_signals(env);
480 static void arm_cache_flush(abi_ulong start, abi_ulong last)
482 abi_ulong addr, last1;
488 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
491 tb_invalidate_page_range(addr, last1 + 1);
498 /* Handle a jump to the kernel code page. */
500 do_kernel_trap(CPUARMState *env)
506 switch (env->regs[15]) {
507 case 0xffff0fa0: /* __kernel_memory_barrier */
508 /* ??? No-op. Will need to do better for SMP. */
510 case 0xffff0fc0: /* __kernel_cmpxchg */
511 /* XXX: This only works between threads, not between processes.
512 It's probably possible to implement this with native host
513 operations. However things like ldrex/strex are much harder so
514 there's not much point trying. */
516 cpsr = cpsr_read(env);
518 /* FIXME: This should SEGV if the access fails. */
519 if (get_user_u32(val, addr))
521 if (val == env->regs[0]) {
523 /* FIXME: Check for segfaults. */
524 put_user_u32(val, addr);
531 cpsr_write(env, cpsr, CPSR_C);
534 case 0xffff0fe0: /* __kernel_get_tls */
535 env->regs[0] = env->cp15.c13_tls2;
540 /* Jump back to the caller. */
541 addr = env->regs[14];
546 env->regs[15] = addr;
551 void cpu_loop(CPUARMState *env)
554 unsigned int n, insn;
555 target_siginfo_t info;
560 trapnr = cpu_arm_exec(env);
565 TaskState *ts = env->opaque;
569 /* we handle the FPU emulation here, as Linux */
570 /* we get the opcode */
571 /* FIXME - what to do if get_user() fails? */
572 get_user_u32(opcode, env->regs[15]);
574 rc = EmulateAll(opcode, &ts->fpa, env);
575 if (rc == 0) { /* illegal instruction */
576 info.si_signo = SIGILL;
578 info.si_code = TARGET_ILL_ILLOPN;
579 info._sifields._sigfault._addr = env->regs[15];
580 queue_signal(env, info.si_signo, &info);
581 } else if (rc < 0) { /* FP exception */
584 /* translate softfloat flags to FPSR flags */
585 if (-rc & float_flag_invalid)
587 if (-rc & float_flag_divbyzero)
589 if (-rc & float_flag_overflow)
591 if (-rc & float_flag_underflow)
593 if (-rc & float_flag_inexact)
596 FPSR fpsr = ts->fpa.fpsr;
597 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
599 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
600 info.si_signo = SIGFPE;
603 /* ordered by priority, least first */
604 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
605 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
606 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
607 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
608 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
610 info._sifields._sigfault._addr = env->regs[15];
611 queue_signal(env, info.si_signo, &info);
616 /* accumulate unenabled exceptions */
617 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
619 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
621 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
623 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
625 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
628 } else { /* everything OK */
639 if (trapnr == EXCP_BKPT) {
641 /* FIXME - what to do if get_user() fails? */
642 get_user_u16(insn, env->regs[15]);
646 /* FIXME - what to do if get_user() fails? */
647 get_user_u32(insn, env->regs[15]);
648 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
653 /* FIXME - what to do if get_user() fails? */
654 get_user_u16(insn, env->regs[15] - 2);
657 /* FIXME - what to do if get_user() fails? */
658 get_user_u32(insn, env->regs[15] - 4);
663 if (n == ARM_NR_cacheflush) {
664 arm_cache_flush(env->regs[0], env->regs[1]);
665 } else if (n == ARM_NR_semihosting
666 || n == ARM_NR_thumb_semihosting) {
667 env->regs[0] = do_arm_semihosting (env);
668 } else if (n == 0 || n >= ARM_SYSCALL_BASE
669 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
671 if (env->thumb || n == 0) {
674 n -= ARM_SYSCALL_BASE;
677 if ( n > ARM_NR_BASE) {
679 case ARM_NR_cacheflush:
680 arm_cache_flush(env->regs[0], env->regs[1]);
683 cpu_set_tls(env, env->regs[0]);
687 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
689 env->regs[0] = -TARGET_ENOSYS;
693 env->regs[0] = do_syscall(env,
708 /* just indicate that signals should be handled asap */
710 case EXCP_PREFETCH_ABORT:
711 addr = env->cp15.c6_insn;
713 case EXCP_DATA_ABORT:
714 addr = env->cp15.c6_data;
718 info.si_signo = SIGSEGV;
720 /* XXX: check env->error_code */
721 info.si_code = TARGET_SEGV_MAPERR;
722 info._sifields._sigfault._addr = addr;
723 queue_signal(env, info.si_signo, &info);
730 sig = gdb_handlesig (env, TARGET_SIGTRAP);
735 info.si_code = TARGET_TRAP_BRKPT;
736 queue_signal(env, info.si_signo, &info);
740 case EXCP_KERNEL_TRAP:
741 if (do_kernel_trap(env))
746 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
748 cpu_dump_state(env, stderr, fprintf, 0);
751 process_pending_signals(env);
758 #define SPARC64_STACK_BIAS 2047
762 /* WARNING: dealing with register windows _is_ complicated. More info
763 can be found at http://www.sics.se/~psm/sparcstack.html */
764 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
766 index = (index + cwp * 16) % (16 * env->nwindows);
767 /* wrap handling : if cwp is on the last window, then we use the
768 registers 'after' the end */
769 if (index < 8 && env->cwp == env->nwindows - 1)
770 index += 16 * env->nwindows;
774 /* save the register window 'cwp1' */
775 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
780 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
781 #ifdef TARGET_SPARC64
783 sp_ptr += SPARC64_STACK_BIAS;
785 #if defined(DEBUG_WIN)
786 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
789 for(i = 0; i < 16; i++) {
790 /* FIXME - what to do if put_user() fails? */
791 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
792 sp_ptr += sizeof(abi_ulong);
796 static void save_window(CPUSPARCState *env)
798 #ifndef TARGET_SPARC64
799 unsigned int new_wim;
800 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
801 ((1LL << env->nwindows) - 1);
802 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
805 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
811 static void restore_window(CPUSPARCState *env)
813 #ifndef TARGET_SPARC64
814 unsigned int new_wim;
816 unsigned int i, cwp1;
819 #ifndef TARGET_SPARC64
820 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
821 ((1LL << env->nwindows) - 1);
824 /* restore the invalid window */
825 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
826 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
827 #ifdef TARGET_SPARC64
829 sp_ptr += SPARC64_STACK_BIAS;
831 #if defined(DEBUG_WIN)
832 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
835 for(i = 0; i < 16; i++) {
836 /* FIXME - what to do if get_user() fails? */
837 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
838 sp_ptr += sizeof(abi_ulong);
840 #ifdef TARGET_SPARC64
842 if (env->cleanwin < env->nwindows - 1)
850 static void flush_windows(CPUSPARCState *env)
856 /* if restore would invoke restore_window(), then we can stop */
857 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
858 #ifndef TARGET_SPARC64
859 if (env->wim & (1 << cwp1))
862 if (env->canrestore == 0)
867 save_window_offset(env, cwp1);
870 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
871 #ifndef TARGET_SPARC64
872 /* set wim so that restore will reload the registers */
873 env->wim = 1 << cwp1;
875 #if defined(DEBUG_WIN)
876 printf("flush_windows: nb=%d\n", offset - 1);
880 void cpu_loop (CPUSPARCState *env)
883 target_siginfo_t info;
886 trapnr = cpu_sparc_exec (env);
889 #ifndef TARGET_SPARC64
896 ret = do_syscall (env, env->gregs[1],
897 env->regwptr[0], env->regwptr[1],
898 env->regwptr[2], env->regwptr[3],
899 env->regwptr[4], env->regwptr[5]);
900 if ((unsigned int)ret >= (unsigned int)(-515)) {
901 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
902 env->xcc |= PSR_CARRY;
904 env->psr |= PSR_CARRY;
908 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
909 env->xcc &= ~PSR_CARRY;
911 env->psr &= ~PSR_CARRY;
914 env->regwptr[0] = ret;
915 /* next instruction */
917 env->npc = env->npc + 4;
919 case 0x83: /* flush windows */
924 /* next instruction */
926 env->npc = env->npc + 4;
928 #ifndef TARGET_SPARC64
929 case TT_WIN_OVF: /* window overflow */
932 case TT_WIN_UNF: /* window underflow */
938 info.si_signo = SIGSEGV;
940 /* XXX: check env->error_code */
941 info.si_code = TARGET_SEGV_MAPERR;
942 info._sifields._sigfault._addr = env->mmuregs[4];
943 queue_signal(env, info.si_signo, &info);
947 case TT_SPILL: /* window overflow */
950 case TT_FILL: /* window underflow */
956 info.si_signo = SIGSEGV;
958 /* XXX: check env->error_code */
959 info.si_code = TARGET_SEGV_MAPERR;
960 if (trapnr == TT_DFAULT)
961 info._sifields._sigfault._addr = env->dmmuregs[4];
963 info._sifields._sigfault._addr = env->tsptr->tpc;
964 queue_signal(env, info.si_signo, &info);
970 sparc64_get_context(env);
974 sparc64_set_context(env);
979 /* just indicate that signals should be handled asap */
985 sig = gdb_handlesig (env, TARGET_SIGTRAP);
990 info.si_code = TARGET_TRAP_BRKPT;
991 queue_signal(env, info.si_signo, &info);
996 printf ("Unhandled trap: 0x%x\n", trapnr);
997 cpu_dump_state(env, stderr, fprintf, 0);
1000 process_pending_signals (env);
1007 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1013 uint32_t cpu_ppc_load_tbl (CPUState *env)
1015 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1018 uint32_t cpu_ppc_load_tbu (CPUState *env)
1020 return cpu_ppc_get_tb(env) >> 32;
1023 uint32_t cpu_ppc_load_atbl (CPUState *env)
1025 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1028 uint32_t cpu_ppc_load_atbu (CPUState *env)
1030 return cpu_ppc_get_tb(env) >> 32;
1033 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1034 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1036 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1038 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1041 /* XXX: to be fixed */
1042 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1047 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1052 #define EXCP_DUMP(env, fmt, args...) \
1054 fprintf(stderr, fmt , ##args); \
1055 cpu_dump_state(env, stderr, fprintf, 0); \
1056 if (loglevel != 0) { \
1057 fprintf(logfile, fmt , ##args); \
1058 cpu_dump_state(env, logfile, fprintf, 0); \
1062 void cpu_loop(CPUPPCState *env)
1064 target_siginfo_t info;
1069 trapnr = cpu_ppc_exec(env);
1071 case POWERPC_EXCP_NONE:
1074 case POWERPC_EXCP_CRITICAL: /* Critical input */
1075 cpu_abort(env, "Critical interrupt while in user mode. "
1078 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1079 cpu_abort(env, "Machine check exception while in user mode. "
1082 case POWERPC_EXCP_DSI: /* Data storage exception */
1083 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1085 /* XXX: check this. Seems bugged */
1086 switch (env->error_code & 0xFF000000) {
1088 info.si_signo = TARGET_SIGSEGV;
1090 info.si_code = TARGET_SEGV_MAPERR;
1093 info.si_signo = TARGET_SIGILL;
1095 info.si_code = TARGET_ILL_ILLADR;
1098 info.si_signo = TARGET_SIGSEGV;
1100 info.si_code = TARGET_SEGV_ACCERR;
1103 /* Let's send a regular segfault... */
1104 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1106 info.si_signo = TARGET_SIGSEGV;
1108 info.si_code = TARGET_SEGV_MAPERR;
1111 info._sifields._sigfault._addr = env->nip;
1112 queue_signal(env, info.si_signo, &info);
1114 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1115 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
1116 env->spr[SPR_SRR0]);
1117 /* XXX: check this */
1118 switch (env->error_code & 0xFF000000) {
1120 info.si_signo = TARGET_SIGSEGV;
1122 info.si_code = TARGET_SEGV_MAPERR;
1126 info.si_signo = TARGET_SIGSEGV;
1128 info.si_code = TARGET_SEGV_ACCERR;
1131 /* Let's send a regular segfault... */
1132 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1134 info.si_signo = TARGET_SIGSEGV;
1136 info.si_code = TARGET_SEGV_MAPERR;
1139 info._sifields._sigfault._addr = env->nip - 4;
1140 queue_signal(env, info.si_signo, &info);
1142 case POWERPC_EXCP_EXTERNAL: /* External input */
1143 cpu_abort(env, "External interrupt while in user mode. "
1146 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1147 EXCP_DUMP(env, "Unaligned memory access\n");
1148 /* XXX: check this */
1149 info.si_signo = TARGET_SIGBUS;
1151 info.si_code = TARGET_BUS_ADRALN;
1152 info._sifields._sigfault._addr = env->nip - 4;
1153 queue_signal(env, info.si_signo, &info);
1155 case POWERPC_EXCP_PROGRAM: /* Program exception */
1156 /* XXX: check this */
1157 switch (env->error_code & ~0xF) {
1158 case POWERPC_EXCP_FP:
1159 EXCP_DUMP(env, "Floating point program exception\n");
1160 info.si_signo = TARGET_SIGFPE;
1162 switch (env->error_code & 0xF) {
1163 case POWERPC_EXCP_FP_OX:
1164 info.si_code = TARGET_FPE_FLTOVF;
1166 case POWERPC_EXCP_FP_UX:
1167 info.si_code = TARGET_FPE_FLTUND;
1169 case POWERPC_EXCP_FP_ZX:
1170 case POWERPC_EXCP_FP_VXZDZ:
1171 info.si_code = TARGET_FPE_FLTDIV;
1173 case POWERPC_EXCP_FP_XX:
1174 info.si_code = TARGET_FPE_FLTRES;
1176 case POWERPC_EXCP_FP_VXSOFT:
1177 info.si_code = TARGET_FPE_FLTINV;
1179 case POWERPC_EXCP_FP_VXSNAN:
1180 case POWERPC_EXCP_FP_VXISI:
1181 case POWERPC_EXCP_FP_VXIDI:
1182 case POWERPC_EXCP_FP_VXIMZ:
1183 case POWERPC_EXCP_FP_VXVC:
1184 case POWERPC_EXCP_FP_VXSQRT:
1185 case POWERPC_EXCP_FP_VXCVI:
1186 info.si_code = TARGET_FPE_FLTSUB;
1189 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1194 case POWERPC_EXCP_INVAL:
1195 EXCP_DUMP(env, "Invalid instruction\n");
1196 info.si_signo = TARGET_SIGILL;
1198 switch (env->error_code & 0xF) {
1199 case POWERPC_EXCP_INVAL_INVAL:
1200 info.si_code = TARGET_ILL_ILLOPC;
1202 case POWERPC_EXCP_INVAL_LSWX:
1203 info.si_code = TARGET_ILL_ILLOPN;
1205 case POWERPC_EXCP_INVAL_SPR:
1206 info.si_code = TARGET_ILL_PRVREG;
1208 case POWERPC_EXCP_INVAL_FP:
1209 info.si_code = TARGET_ILL_COPROC;
1212 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1213 env->error_code & 0xF);
1214 info.si_code = TARGET_ILL_ILLADR;
1218 case POWERPC_EXCP_PRIV:
1219 EXCP_DUMP(env, "Privilege violation\n");
1220 info.si_signo = TARGET_SIGILL;
1222 switch (env->error_code & 0xF) {
1223 case POWERPC_EXCP_PRIV_OPC:
1224 info.si_code = TARGET_ILL_PRVOPC;
1226 case POWERPC_EXCP_PRIV_REG:
1227 info.si_code = TARGET_ILL_PRVREG;
1230 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1231 env->error_code & 0xF);
1232 info.si_code = TARGET_ILL_PRVOPC;
1236 case POWERPC_EXCP_TRAP:
1237 cpu_abort(env, "Tried to call a TRAP\n");
1240 /* Should not happen ! */
1241 cpu_abort(env, "Unknown program exception (%02x)\n",
1245 info._sifields._sigfault._addr = env->nip - 4;
1246 queue_signal(env, info.si_signo, &info);
1248 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1249 EXCP_DUMP(env, "No floating point allowed\n");
1250 info.si_signo = TARGET_SIGILL;
1252 info.si_code = TARGET_ILL_COPROC;
1253 info._sifields._sigfault._addr = env->nip - 4;
1254 queue_signal(env, info.si_signo, &info);
1256 case POWERPC_EXCP_SYSCALL: /* System call exception */
1257 cpu_abort(env, "Syscall exception while in user mode. "
1260 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1261 EXCP_DUMP(env, "No APU instruction allowed\n");
1262 info.si_signo = TARGET_SIGILL;
1264 info.si_code = TARGET_ILL_COPROC;
1265 info._sifields._sigfault._addr = env->nip - 4;
1266 queue_signal(env, info.si_signo, &info);
1268 case POWERPC_EXCP_DECR: /* Decrementer exception */
1269 cpu_abort(env, "Decrementer interrupt while in user mode. "
1272 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1273 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1276 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1277 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1280 case POWERPC_EXCP_DTLB: /* Data TLB error */
1281 cpu_abort(env, "Data TLB exception while in user mode. "
1284 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1285 cpu_abort(env, "Instruction TLB exception while in user mode. "
1288 case POWERPC_EXCP_DEBUG: /* Debug interrupt */
1289 /* XXX: check this */
1293 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1295 info.si_signo = sig;
1297 info.si_code = TARGET_TRAP_BRKPT;
1298 queue_signal(env, info.si_signo, &info);
1302 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1303 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1304 info.si_signo = TARGET_SIGILL;
1306 info.si_code = TARGET_ILL_COPROC;
1307 info._sifields._sigfault._addr = env->nip - 4;
1308 queue_signal(env, info.si_signo, &info);
1310 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1311 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1313 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1314 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1316 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1317 cpu_abort(env, "Performance monitor exception not handled\n");
1319 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1320 cpu_abort(env, "Doorbell interrupt while in user mode. "
1323 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1324 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1327 case POWERPC_EXCP_RESET: /* System reset exception */
1328 cpu_abort(env, "Reset interrupt while in user mode. "
1331 case POWERPC_EXCP_DSEG: /* Data segment exception */
1332 cpu_abort(env, "Data segment exception while in user mode. "
1335 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1336 cpu_abort(env, "Instruction segment exception "
1337 "while in user mode. Aborting\n");
1339 /* PowerPC 64 with hypervisor mode support */
1340 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1341 cpu_abort(env, "Hypervisor decrementer interrupt "
1342 "while in user mode. Aborting\n");
1344 case POWERPC_EXCP_TRACE: /* Trace exception */
1346 * we use this exception to emulate step-by-step execution mode.
1349 /* PowerPC 64 with hypervisor mode support */
1350 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1351 cpu_abort(env, "Hypervisor data storage exception "
1352 "while in user mode. Aborting\n");
1354 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1355 cpu_abort(env, "Hypervisor instruction storage exception "
1356 "while in user mode. Aborting\n");
1358 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1359 cpu_abort(env, "Hypervisor data segment exception "
1360 "while in user mode. Aborting\n");
1362 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1363 cpu_abort(env, "Hypervisor instruction segment exception "
1364 "while in user mode. Aborting\n");
1366 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1367 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1368 info.si_signo = TARGET_SIGILL;
1370 info.si_code = TARGET_ILL_COPROC;
1371 info._sifields._sigfault._addr = env->nip - 4;
1372 queue_signal(env, info.si_signo, &info);
1374 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1375 cpu_abort(env, "Programable interval timer interrupt "
1376 "while in user mode. Aborting\n");
1378 case POWERPC_EXCP_IO: /* IO error exception */
1379 cpu_abort(env, "IO error exception while in user mode. "
1382 case POWERPC_EXCP_RUNM: /* Run mode exception */
1383 cpu_abort(env, "Run mode exception while in user mode. "
1386 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1387 cpu_abort(env, "Emulation trap exception not handled\n");
1389 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1390 cpu_abort(env, "Instruction fetch TLB exception "
1391 "while in user-mode. Aborting");
1393 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1394 cpu_abort(env, "Data load TLB exception while in user-mode. "
1397 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1398 cpu_abort(env, "Data store TLB exception while in user-mode. "
1401 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1402 cpu_abort(env, "Floating-point assist exception not handled\n");
1404 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1405 cpu_abort(env, "Instruction address breakpoint exception "
1408 case POWERPC_EXCP_SMI: /* System management interrupt */
1409 cpu_abort(env, "System management interrupt while in user mode. "
1412 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1413 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1416 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1417 cpu_abort(env, "Performance monitor exception not handled\n");
1419 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1420 cpu_abort(env, "Vector assist exception not handled\n");
1422 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1423 cpu_abort(env, "Soft patch exception not handled\n");
1425 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1426 cpu_abort(env, "Maintenance exception while in user mode. "
1429 case POWERPC_EXCP_STOP: /* stop translation */
1430 /* We did invalidate the instruction cache. Go on */
1432 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1433 /* We just stopped because of a branch. Go on */
1435 case POWERPC_EXCP_SYSCALL_USER:
1436 /* system call in user-mode emulation */
1438 * PPC ABI uses overflow flag in cr0 to signal an error
1442 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1443 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1445 env->crf[0] &= ~0x1;
1446 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1447 env->gpr[5], env->gpr[6], env->gpr[7],
1449 if (ret > (uint32_t)(-515)) {
1455 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1458 case EXCP_INTERRUPT:
1459 /* just indicate that signals should be handled asap */
1462 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1465 process_pending_signals(env);
1472 #define MIPS_SYS(name, args) args,
1474 static const uint8_t mips_syscall_args[] = {
1475 MIPS_SYS(sys_syscall , 0) /* 4000 */
1476 MIPS_SYS(sys_exit , 1)
1477 MIPS_SYS(sys_fork , 0)
1478 MIPS_SYS(sys_read , 3)
1479 MIPS_SYS(sys_write , 3)
1480 MIPS_SYS(sys_open , 3) /* 4005 */
1481 MIPS_SYS(sys_close , 1)
1482 MIPS_SYS(sys_waitpid , 3)
1483 MIPS_SYS(sys_creat , 2)
1484 MIPS_SYS(sys_link , 2)
1485 MIPS_SYS(sys_unlink , 1) /* 4010 */
1486 MIPS_SYS(sys_execve , 0)
1487 MIPS_SYS(sys_chdir , 1)
1488 MIPS_SYS(sys_time , 1)
1489 MIPS_SYS(sys_mknod , 3)
1490 MIPS_SYS(sys_chmod , 2) /* 4015 */
1491 MIPS_SYS(sys_lchown , 3)
1492 MIPS_SYS(sys_ni_syscall , 0)
1493 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1494 MIPS_SYS(sys_lseek , 3)
1495 MIPS_SYS(sys_getpid , 0) /* 4020 */
1496 MIPS_SYS(sys_mount , 5)
1497 MIPS_SYS(sys_oldumount , 1)
1498 MIPS_SYS(sys_setuid , 1)
1499 MIPS_SYS(sys_getuid , 0)
1500 MIPS_SYS(sys_stime , 1) /* 4025 */
1501 MIPS_SYS(sys_ptrace , 4)
1502 MIPS_SYS(sys_alarm , 1)
1503 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1504 MIPS_SYS(sys_pause , 0)
1505 MIPS_SYS(sys_utime , 2) /* 4030 */
1506 MIPS_SYS(sys_ni_syscall , 0)
1507 MIPS_SYS(sys_ni_syscall , 0)
1508 MIPS_SYS(sys_access , 2)
1509 MIPS_SYS(sys_nice , 1)
1510 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1511 MIPS_SYS(sys_sync , 0)
1512 MIPS_SYS(sys_kill , 2)
1513 MIPS_SYS(sys_rename , 2)
1514 MIPS_SYS(sys_mkdir , 2)
1515 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1516 MIPS_SYS(sys_dup , 1)
1517 MIPS_SYS(sys_pipe , 0)
1518 MIPS_SYS(sys_times , 1)
1519 MIPS_SYS(sys_ni_syscall , 0)
1520 MIPS_SYS(sys_brk , 1) /* 4045 */
1521 MIPS_SYS(sys_setgid , 1)
1522 MIPS_SYS(sys_getgid , 0)
1523 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1524 MIPS_SYS(sys_geteuid , 0)
1525 MIPS_SYS(sys_getegid , 0) /* 4050 */
1526 MIPS_SYS(sys_acct , 0)
1527 MIPS_SYS(sys_umount , 2)
1528 MIPS_SYS(sys_ni_syscall , 0)
1529 MIPS_SYS(sys_ioctl , 3)
1530 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1531 MIPS_SYS(sys_ni_syscall , 2)
1532 MIPS_SYS(sys_setpgid , 2)
1533 MIPS_SYS(sys_ni_syscall , 0)
1534 MIPS_SYS(sys_olduname , 1)
1535 MIPS_SYS(sys_umask , 1) /* 4060 */
1536 MIPS_SYS(sys_chroot , 1)
1537 MIPS_SYS(sys_ustat , 2)
1538 MIPS_SYS(sys_dup2 , 2)
1539 MIPS_SYS(sys_getppid , 0)
1540 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1541 MIPS_SYS(sys_setsid , 0)
1542 MIPS_SYS(sys_sigaction , 3)
1543 MIPS_SYS(sys_sgetmask , 0)
1544 MIPS_SYS(sys_ssetmask , 1)
1545 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1546 MIPS_SYS(sys_setregid , 2)
1547 MIPS_SYS(sys_sigsuspend , 0)
1548 MIPS_SYS(sys_sigpending , 1)
1549 MIPS_SYS(sys_sethostname , 2)
1550 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1551 MIPS_SYS(sys_getrlimit , 2)
1552 MIPS_SYS(sys_getrusage , 2)
1553 MIPS_SYS(sys_gettimeofday, 2)
1554 MIPS_SYS(sys_settimeofday, 2)
1555 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1556 MIPS_SYS(sys_setgroups , 2)
1557 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1558 MIPS_SYS(sys_symlink , 2)
1559 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1560 MIPS_SYS(sys_readlink , 3) /* 4085 */
1561 MIPS_SYS(sys_uselib , 1)
1562 MIPS_SYS(sys_swapon , 2)
1563 MIPS_SYS(sys_reboot , 3)
1564 MIPS_SYS(old_readdir , 3)
1565 MIPS_SYS(old_mmap , 6) /* 4090 */
1566 MIPS_SYS(sys_munmap , 2)
1567 MIPS_SYS(sys_truncate , 2)
1568 MIPS_SYS(sys_ftruncate , 2)
1569 MIPS_SYS(sys_fchmod , 2)
1570 MIPS_SYS(sys_fchown , 3) /* 4095 */
1571 MIPS_SYS(sys_getpriority , 2)
1572 MIPS_SYS(sys_setpriority , 3)
1573 MIPS_SYS(sys_ni_syscall , 0)
1574 MIPS_SYS(sys_statfs , 2)
1575 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1576 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1577 MIPS_SYS(sys_socketcall , 2)
1578 MIPS_SYS(sys_syslog , 3)
1579 MIPS_SYS(sys_setitimer , 3)
1580 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1581 MIPS_SYS(sys_newstat , 2)
1582 MIPS_SYS(sys_newlstat , 2)
1583 MIPS_SYS(sys_newfstat , 2)
1584 MIPS_SYS(sys_uname , 1)
1585 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1586 MIPS_SYS(sys_vhangup , 0)
1587 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1588 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1589 MIPS_SYS(sys_wait4 , 4)
1590 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1591 MIPS_SYS(sys_sysinfo , 1)
1592 MIPS_SYS(sys_ipc , 6)
1593 MIPS_SYS(sys_fsync , 1)
1594 MIPS_SYS(sys_sigreturn , 0)
1595 MIPS_SYS(sys_clone , 0) /* 4120 */
1596 MIPS_SYS(sys_setdomainname, 2)
1597 MIPS_SYS(sys_newuname , 1)
1598 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1599 MIPS_SYS(sys_adjtimex , 1)
1600 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1601 MIPS_SYS(sys_sigprocmask , 3)
1602 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1603 MIPS_SYS(sys_init_module , 5)
1604 MIPS_SYS(sys_delete_module, 1)
1605 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1606 MIPS_SYS(sys_quotactl , 0)
1607 MIPS_SYS(sys_getpgid , 1)
1608 MIPS_SYS(sys_fchdir , 1)
1609 MIPS_SYS(sys_bdflush , 2)
1610 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1611 MIPS_SYS(sys_personality , 1)
1612 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1613 MIPS_SYS(sys_setfsuid , 1)
1614 MIPS_SYS(sys_setfsgid , 1)
1615 MIPS_SYS(sys_llseek , 5) /* 4140 */
1616 MIPS_SYS(sys_getdents , 3)
1617 MIPS_SYS(sys_select , 5)
1618 MIPS_SYS(sys_flock , 2)
1619 MIPS_SYS(sys_msync , 3)
1620 MIPS_SYS(sys_readv , 3) /* 4145 */
1621 MIPS_SYS(sys_writev , 3)
1622 MIPS_SYS(sys_cacheflush , 3)
1623 MIPS_SYS(sys_cachectl , 3)
1624 MIPS_SYS(sys_sysmips , 4)
1625 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1626 MIPS_SYS(sys_getsid , 1)
1627 MIPS_SYS(sys_fdatasync , 0)
1628 MIPS_SYS(sys_sysctl , 1)
1629 MIPS_SYS(sys_mlock , 2)
1630 MIPS_SYS(sys_munlock , 2) /* 4155 */
1631 MIPS_SYS(sys_mlockall , 1)
1632 MIPS_SYS(sys_munlockall , 0)
1633 MIPS_SYS(sys_sched_setparam, 2)
1634 MIPS_SYS(sys_sched_getparam, 2)
1635 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1636 MIPS_SYS(sys_sched_getscheduler, 1)
1637 MIPS_SYS(sys_sched_yield , 0)
1638 MIPS_SYS(sys_sched_get_priority_max, 1)
1639 MIPS_SYS(sys_sched_get_priority_min, 1)
1640 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1641 MIPS_SYS(sys_nanosleep, 2)
1642 MIPS_SYS(sys_mremap , 4)
1643 MIPS_SYS(sys_accept , 3)
1644 MIPS_SYS(sys_bind , 3)
1645 MIPS_SYS(sys_connect , 3) /* 4170 */
1646 MIPS_SYS(sys_getpeername , 3)
1647 MIPS_SYS(sys_getsockname , 3)
1648 MIPS_SYS(sys_getsockopt , 5)
1649 MIPS_SYS(sys_listen , 2)
1650 MIPS_SYS(sys_recv , 4) /* 4175 */
1651 MIPS_SYS(sys_recvfrom , 6)
1652 MIPS_SYS(sys_recvmsg , 3)
1653 MIPS_SYS(sys_send , 4)
1654 MIPS_SYS(sys_sendmsg , 3)
1655 MIPS_SYS(sys_sendto , 6) /* 4180 */
1656 MIPS_SYS(sys_setsockopt , 5)
1657 MIPS_SYS(sys_shutdown , 2)
1658 MIPS_SYS(sys_socket , 3)
1659 MIPS_SYS(sys_socketpair , 4)
1660 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1661 MIPS_SYS(sys_getresuid , 3)
1662 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1663 MIPS_SYS(sys_poll , 3)
1664 MIPS_SYS(sys_nfsservctl , 3)
1665 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1666 MIPS_SYS(sys_getresgid , 3)
1667 MIPS_SYS(sys_prctl , 5)
1668 MIPS_SYS(sys_rt_sigreturn, 0)
1669 MIPS_SYS(sys_rt_sigaction, 4)
1670 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1671 MIPS_SYS(sys_rt_sigpending, 2)
1672 MIPS_SYS(sys_rt_sigtimedwait, 4)
1673 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1674 MIPS_SYS(sys_rt_sigsuspend, 0)
1675 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1676 MIPS_SYS(sys_pwrite64 , 6)
1677 MIPS_SYS(sys_chown , 3)
1678 MIPS_SYS(sys_getcwd , 2)
1679 MIPS_SYS(sys_capget , 2)
1680 MIPS_SYS(sys_capset , 2) /* 4205 */
1681 MIPS_SYS(sys_sigaltstack , 0)
1682 MIPS_SYS(sys_sendfile , 4)
1683 MIPS_SYS(sys_ni_syscall , 0)
1684 MIPS_SYS(sys_ni_syscall , 0)
1685 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1686 MIPS_SYS(sys_truncate64 , 4)
1687 MIPS_SYS(sys_ftruncate64 , 4)
1688 MIPS_SYS(sys_stat64 , 2)
1689 MIPS_SYS(sys_lstat64 , 2)
1690 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1691 MIPS_SYS(sys_pivot_root , 2)
1692 MIPS_SYS(sys_mincore , 3)
1693 MIPS_SYS(sys_madvise , 3)
1694 MIPS_SYS(sys_getdents64 , 3)
1695 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1696 MIPS_SYS(sys_ni_syscall , 0)
1697 MIPS_SYS(sys_gettid , 0)
1698 MIPS_SYS(sys_readahead , 5)
1699 MIPS_SYS(sys_setxattr , 5)
1700 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1701 MIPS_SYS(sys_fsetxattr , 5)
1702 MIPS_SYS(sys_getxattr , 4)
1703 MIPS_SYS(sys_lgetxattr , 4)
1704 MIPS_SYS(sys_fgetxattr , 4)
1705 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1706 MIPS_SYS(sys_llistxattr , 3)
1707 MIPS_SYS(sys_flistxattr , 3)
1708 MIPS_SYS(sys_removexattr , 2)
1709 MIPS_SYS(sys_lremovexattr, 2)
1710 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1711 MIPS_SYS(sys_tkill , 2)
1712 MIPS_SYS(sys_sendfile64 , 5)
1713 MIPS_SYS(sys_futex , 2)
1714 MIPS_SYS(sys_sched_setaffinity, 3)
1715 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1716 MIPS_SYS(sys_io_setup , 2)
1717 MIPS_SYS(sys_io_destroy , 1)
1718 MIPS_SYS(sys_io_getevents, 5)
1719 MIPS_SYS(sys_io_submit , 3)
1720 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1721 MIPS_SYS(sys_exit_group , 1)
1722 MIPS_SYS(sys_lookup_dcookie, 3)
1723 MIPS_SYS(sys_epoll_create, 1)
1724 MIPS_SYS(sys_epoll_ctl , 4)
1725 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1726 MIPS_SYS(sys_remap_file_pages, 5)
1727 MIPS_SYS(sys_set_tid_address, 1)
1728 MIPS_SYS(sys_restart_syscall, 0)
1729 MIPS_SYS(sys_fadvise64_64, 7)
1730 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1731 MIPS_SYS(sys_fstatfs64 , 2)
1732 MIPS_SYS(sys_timer_create, 3)
1733 MIPS_SYS(sys_timer_settime, 4)
1734 MIPS_SYS(sys_timer_gettime, 2)
1735 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1736 MIPS_SYS(sys_timer_delete, 1)
1737 MIPS_SYS(sys_clock_settime, 2)
1738 MIPS_SYS(sys_clock_gettime, 2)
1739 MIPS_SYS(sys_clock_getres, 2)
1740 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1741 MIPS_SYS(sys_tgkill , 3)
1742 MIPS_SYS(sys_utimes , 2)
1743 MIPS_SYS(sys_mbind , 4)
1744 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1745 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1746 MIPS_SYS(sys_mq_open , 4)
1747 MIPS_SYS(sys_mq_unlink , 1)
1748 MIPS_SYS(sys_mq_timedsend, 5)
1749 MIPS_SYS(sys_mq_timedreceive, 5)
1750 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1751 MIPS_SYS(sys_mq_getsetattr, 3)
1752 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1753 MIPS_SYS(sys_waitid , 4)
1754 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1755 MIPS_SYS(sys_add_key , 5)
1756 MIPS_SYS(sys_request_key, 4)
1757 MIPS_SYS(sys_keyctl , 5)
1758 MIPS_SYS(sys_set_thread_area, 1)
1759 MIPS_SYS(sys_inotify_init, 0)
1760 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1761 MIPS_SYS(sys_inotify_rm_watch, 2)
1762 MIPS_SYS(sys_migrate_pages, 4)
1763 MIPS_SYS(sys_openat, 4)
1764 MIPS_SYS(sys_mkdirat, 3)
1765 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1766 MIPS_SYS(sys_fchownat, 5)
1767 MIPS_SYS(sys_futimesat, 3)
1768 MIPS_SYS(sys_fstatat64, 4)
1769 MIPS_SYS(sys_unlinkat, 3)
1770 MIPS_SYS(sys_renameat, 4) /* 4295 */
1771 MIPS_SYS(sys_linkat, 5)
1772 MIPS_SYS(sys_symlinkat, 3)
1773 MIPS_SYS(sys_readlinkat, 4)
1774 MIPS_SYS(sys_fchmodat, 3)
1775 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1776 MIPS_SYS(sys_pselect6, 6)
1777 MIPS_SYS(sys_ppoll, 5)
1778 MIPS_SYS(sys_unshare, 1)
1779 MIPS_SYS(sys_splice, 4)
1780 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1781 MIPS_SYS(sys_tee, 4)
1782 MIPS_SYS(sys_vmsplice, 4)
1783 MIPS_SYS(sys_move_pages, 6)
1784 MIPS_SYS(sys_set_robust_list, 2)
1785 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1786 MIPS_SYS(sys_kexec_load, 4)
1787 MIPS_SYS(sys_getcpu, 3)
1788 MIPS_SYS(sys_epoll_pwait, 6)
1789 MIPS_SYS(sys_ioprio_set, 3)
1790 MIPS_SYS(sys_ioprio_get, 2)
1795 void cpu_loop(CPUMIPSState *env)
1797 target_siginfo_t info;
1799 unsigned int syscall_num;
1802 trapnr = cpu_mips_exec(env);
1805 syscall_num = env->active_tc.gpr[2] - 4000;
1806 env->active_tc.PC += 4;
1807 if (syscall_num >= sizeof(mips_syscall_args)) {
1812 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1814 nb_args = mips_syscall_args[syscall_num];
1815 sp_reg = env->active_tc.gpr[29];
1817 /* these arguments are taken from the stack */
1818 /* FIXME - what to do if get_user() fails? */
1819 case 8: get_user_ual(arg8, sp_reg + 28);
1820 case 7: get_user_ual(arg7, sp_reg + 24);
1821 case 6: get_user_ual(arg6, sp_reg + 20);
1822 case 5: get_user_ual(arg5, sp_reg + 16);
1826 ret = do_syscall(env, env->active_tc.gpr[2],
1827 env->active_tc.gpr[4],
1828 env->active_tc.gpr[5],
1829 env->active_tc.gpr[6],
1830 env->active_tc.gpr[7],
1831 arg5, arg6/*, arg7, arg8*/);
1833 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1834 env->active_tc.gpr[7] = 1; /* error flag */
1837 env->active_tc.gpr[7] = 0; /* error flag */
1839 env->active_tc.gpr[2] = ret;
1845 info.si_signo = TARGET_SIGILL;
1848 queue_signal(env, info.si_signo, &info);
1850 case EXCP_INTERRUPT:
1851 /* just indicate that signals should be handled asap */
1857 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1860 info.si_signo = sig;
1862 info.si_code = TARGET_TRAP_BRKPT;
1863 queue_signal(env, info.si_signo, &info);
1869 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1871 cpu_dump_state(env, stderr, fprintf, 0);
1874 process_pending_signals(env);
1880 void cpu_loop (CPUState *env)
1883 target_siginfo_t info;
1886 trapnr = cpu_sh4_exec (env);
1891 ret = do_syscall(env,
1899 env->gregs[0] = ret;
1901 case EXCP_INTERRUPT:
1902 /* just indicate that signals should be handled asap */
1908 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1911 info.si_signo = sig;
1913 info.si_code = TARGET_TRAP_BRKPT;
1914 queue_signal(env, info.si_signo, &info);
1920 info.si_signo = SIGSEGV;
1922 info.si_code = TARGET_SEGV_MAPERR;
1923 info._sifields._sigfault._addr = env->tea;
1924 queue_signal(env, info.si_signo, &info);
1928 printf ("Unhandled trap: 0x%x\n", trapnr);
1929 cpu_dump_state(env, stderr, fprintf, 0);
1932 process_pending_signals (env);
1938 void cpu_loop (CPUState *env)
1941 target_siginfo_t info;
1944 trapnr = cpu_cris_exec (env);
1948 info.si_signo = SIGSEGV;
1950 /* XXX: check env->error_code */
1951 info.si_code = TARGET_SEGV_MAPERR;
1952 info._sifields._sigfault._addr = env->pregs[PR_EDA];
1953 queue_signal(env, info.si_signo, &info);
1956 case EXCP_INTERRUPT:
1957 /* just indicate that signals should be handled asap */
1960 ret = do_syscall(env,
1968 env->regs[10] = ret;
1975 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1978 info.si_signo = sig;
1980 info.si_code = TARGET_TRAP_BRKPT;
1981 queue_signal(env, info.si_signo, &info);
1986 printf ("Unhandled trap: 0x%x\n", trapnr);
1987 cpu_dump_state(env, stderr, fprintf, 0);
1990 process_pending_signals (env);
1997 void cpu_loop(CPUM68KState *env)
2001 target_siginfo_t info;
2002 TaskState *ts = env->opaque;
2005 trapnr = cpu_m68k_exec(env);
2009 if (ts->sim_syscalls) {
2011 nr = lduw(env->pc + 2);
2013 do_m68k_simcall(env, nr);
2019 case EXCP_HALT_INSN:
2020 /* Semihosing syscall. */
2022 do_m68k_semihosting(env, env->dregs[0]);
2026 case EXCP_UNSUPPORTED:
2028 info.si_signo = SIGILL;
2030 info.si_code = TARGET_ILL_ILLOPN;
2031 info._sifields._sigfault._addr = env->pc;
2032 queue_signal(env, info.si_signo, &info);
2036 ts->sim_syscalls = 0;
2039 env->dregs[0] = do_syscall(env,
2049 case EXCP_INTERRUPT:
2050 /* just indicate that signals should be handled asap */
2054 info.si_signo = SIGSEGV;
2056 /* XXX: check env->error_code */
2057 info.si_code = TARGET_SEGV_MAPERR;
2058 info._sifields._sigfault._addr = env->mmu.ar;
2059 queue_signal(env, info.si_signo, &info);
2066 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2069 info.si_signo = sig;
2071 info.si_code = TARGET_TRAP_BRKPT;
2072 queue_signal(env, info.si_signo, &info);
2077 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2079 cpu_dump_state(env, stderr, fprintf, 0);
2082 process_pending_signals(env);
2085 #endif /* TARGET_M68K */
2088 void cpu_loop (CPUState *env)
2091 target_siginfo_t info;
2094 trapnr = cpu_alpha_exec (env);
2098 fprintf(stderr, "Reset requested. Exit\n");
2102 fprintf(stderr, "Machine check exception. Exit\n");
2106 fprintf(stderr, "Arithmetic trap.\n");
2109 case EXCP_HW_INTERRUPT:
2110 fprintf(stderr, "External interrupt. Exit\n");
2114 fprintf(stderr, "MMU data fault\n");
2117 case EXCP_DTB_MISS_PAL:
2118 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2122 fprintf(stderr, "MMU instruction TLB miss\n");
2126 fprintf(stderr, "MMU instruction access violation\n");
2129 case EXCP_DTB_MISS_NATIVE:
2130 fprintf(stderr, "MMU data TLB miss\n");
2134 fprintf(stderr, "Unaligned access\n");
2138 fprintf(stderr, "Invalid instruction\n");
2142 fprintf(stderr, "Floating-point not allowed\n");
2145 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2146 call_pal(env, (trapnr >> 6) | 0x80);
2148 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2149 fprintf(stderr, "Privileged call to PALcode\n");
2156 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2159 info.si_signo = sig;
2161 info.si_code = TARGET_TRAP_BRKPT;
2162 queue_signal(env, info.si_signo, &info);
2167 printf ("Unhandled trap: 0x%x\n", trapnr);
2168 cpu_dump_state(env, stderr, fprintf, 0);
2171 process_pending_signals (env);
2174 #endif /* TARGET_ALPHA */
2176 static void usage(void)
2178 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2179 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2180 "Linux CPU emulator (compiled for %s emulation)\n"
2182 "Standard options:\n"
2183 "-h print this help\n"
2184 "-g port wait gdb connection to port\n"
2185 "-L path set the elf interpreter prefix (default=%s)\n"
2186 "-s size set the stack size in bytes (default=%ld)\n"
2187 "-cpu model select CPU (-cpu ? for list)\n"
2188 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2191 "-d options activate log (logfile=%s)\n"
2192 "-p pagesize set the host page size to 'pagesize'\n"
2193 "-strace log system calls\n"
2195 "Environment variables:\n"
2196 "QEMU_STRACE Print system calls and arguments similar to the\n"
2197 " 'strace' program. Enable by setting to any value.\n"
2206 THREAD CPUState *thread_env;
2208 /* Assumes contents are already zeroed. */
2209 void init_task_state(TaskState *ts)
2214 ts->first_free = ts->sigqueue_table;
2215 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2216 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2218 ts->sigqueue_table[i].next = NULL;
2221 int main(int argc, char **argv)
2223 const char *filename;
2224 const char *cpu_model;
2225 struct target_pt_regs regs1, *regs = ®s1;
2226 struct image_info info1, *info = &info1;
2227 TaskState ts1, *ts = &ts1;
2231 int gdbstub_port = 0;
2232 int drop_ld_preload = 0, environ_count = 0;
2233 char **target_environ, **wrk, **dst;
2239 cpu_set_log_filename(DEBUG_LOGFILE);
2251 if (!strcmp(r, "-")) {
2253 } else if (!strcmp(r, "d")) {
2255 const CPULogItem *item;
2261 mask = cpu_str_to_log_mask(r);
2263 printf("Log items (comma separated):\n");
2264 for(item = cpu_log_items; item->mask != 0; item++) {
2265 printf("%-10s %s\n", item->name, item->help);
2270 } else if (!strcmp(r, "s")) {
2272 x86_stack_size = strtol(r, (char **)&r, 0);
2273 if (x86_stack_size <= 0)
2276 x86_stack_size *= 1024 * 1024;
2277 else if (*r == 'k' || *r == 'K')
2278 x86_stack_size *= 1024;
2279 } else if (!strcmp(r, "L")) {
2280 interp_prefix = argv[optind++];
2281 } else if (!strcmp(r, "p")) {
2282 qemu_host_page_size = atoi(argv[optind++]);
2283 if (qemu_host_page_size == 0 ||
2284 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2285 fprintf(stderr, "page size must be a power of two\n");
2288 } else if (!strcmp(r, "g")) {
2289 gdbstub_port = atoi(argv[optind++]);
2290 } else if (!strcmp(r, "r")) {
2291 qemu_uname_release = argv[optind++];
2292 } else if (!strcmp(r, "cpu")) {
2293 cpu_model = argv[optind++];
2294 if (strcmp(cpu_model, "?") == 0) {
2295 /* XXX: implement xxx_cpu_list for targets that still miss it */
2296 #if defined(cpu_list)
2297 cpu_list(stdout, &fprintf);
2301 } else if (!strcmp(r, "drop-ld-preload")) {
2302 drop_ld_preload = 1;
2303 } else if (!strcmp(r, "strace")) {
2312 filename = argv[optind];
2315 memset(regs, 0, sizeof(struct target_pt_regs));
2317 /* Zero out image_info */
2318 memset(info, 0, sizeof(struct image_info));
2320 /* Scan interp_prefix dir for replacement files. */
2321 init_paths(interp_prefix);
2323 if (cpu_model == NULL) {
2324 #if defined(TARGET_I386)
2325 #ifdef TARGET_X86_64
2326 cpu_model = "qemu64";
2328 cpu_model = "qemu32";
2330 #elif defined(TARGET_ARM)
2331 cpu_model = "arm926";
2332 #elif defined(TARGET_M68K)
2334 #elif defined(TARGET_SPARC)
2335 #ifdef TARGET_SPARC64
2336 cpu_model = "TI UltraSparc II";
2338 cpu_model = "Fujitsu MB86904";
2340 #elif defined(TARGET_MIPS)
2341 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2346 #elif defined(TARGET_PPC)
2356 cpu_exec_init_all(0);
2357 /* NOTE: we need to init the CPU at this stage to get
2358 qemu_host_page_size */
2359 env = cpu_init(cpu_model);
2361 fprintf(stderr, "Unable to find CPU definition\n");
2366 if (getenv("QEMU_STRACE")) {
2374 target_environ = malloc((environ_count + 1) * sizeof(char *));
2375 if (!target_environ)
2377 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
2378 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
2380 *(dst++) = strdup(*wrk);
2382 *dst = NULL; /* NULL terminate target_environ */
2384 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2385 printf("Error loading %s\n", filename);
2389 for (wrk = target_environ; *wrk; wrk++) {
2393 free(target_environ);
2398 fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2399 fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2400 fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n",
2402 fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n",
2404 fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2405 fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n",
2407 fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2408 fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2411 target_set_brk(info->brk);
2415 /* build Task State */
2416 memset(ts, 0, sizeof(TaskState));
2417 init_task_state(ts);
2420 env->user_mode_only = 1;
2422 #if defined(TARGET_I386)
2423 cpu_x86_set_cpl(env, 3);
2425 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2426 env->hflags |= HF_PE_MASK;
2427 if (env->cpuid_features & CPUID_SSE) {
2428 env->cr[4] |= CR4_OSFXSR_MASK;
2429 env->hflags |= HF_OSFXSR_MASK;
2431 #ifndef TARGET_ABI32
2432 /* enable 64 bit mode if possible */
2433 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2434 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2437 env->cr[4] |= CR4_PAE_MASK;
2438 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2439 env->hflags |= HF_LMA_MASK;
2442 /* flags setup : we activate the IRQs by default as in user mode */
2443 env->eflags |= IF_MASK;
2445 /* linux register setup */
2446 #ifndef TARGET_ABI32
2447 env->regs[R_EAX] = regs->rax;
2448 env->regs[R_EBX] = regs->rbx;
2449 env->regs[R_ECX] = regs->rcx;
2450 env->regs[R_EDX] = regs->rdx;
2451 env->regs[R_ESI] = regs->rsi;
2452 env->regs[R_EDI] = regs->rdi;
2453 env->regs[R_EBP] = regs->rbp;
2454 env->regs[R_ESP] = regs->rsp;
2455 env->eip = regs->rip;
2457 env->regs[R_EAX] = regs->eax;
2458 env->regs[R_EBX] = regs->ebx;
2459 env->regs[R_ECX] = regs->ecx;
2460 env->regs[R_EDX] = regs->edx;
2461 env->regs[R_ESI] = regs->esi;
2462 env->regs[R_EDI] = regs->edi;
2463 env->regs[R_EBP] = regs->ebp;
2464 env->regs[R_ESP] = regs->esp;
2465 env->eip = regs->eip;
2468 /* linux interrupt setup */
2469 env->idt.base = h2g(idt_table);
2470 env->idt.limit = sizeof(idt_table) - 1;
2493 /* linux segment setup */
2495 uint64_t *gdt_table;
2496 gdt_table = qemu_mallocz(sizeof(uint64_t) * TARGET_GDT_ENTRIES);
2497 env->gdt.base = h2g((unsigned long)gdt_table);
2498 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2500 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2501 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2502 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2504 /* 64 bit code segment */
2505 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2506 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2508 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2510 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2511 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2512 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2514 cpu_x86_load_seg(env, R_CS, __USER_CS);
2515 cpu_x86_load_seg(env, R_SS, __USER_DS);
2517 cpu_x86_load_seg(env, R_DS, __USER_DS);
2518 cpu_x86_load_seg(env, R_ES, __USER_DS);
2519 cpu_x86_load_seg(env, R_FS, __USER_DS);
2520 cpu_x86_load_seg(env, R_GS, __USER_DS);
2521 /* This hack makes Wine work... */
2522 env->segs[R_FS].selector = 0;
2524 cpu_x86_load_seg(env, R_DS, 0);
2525 cpu_x86_load_seg(env, R_ES, 0);
2526 cpu_x86_load_seg(env, R_FS, 0);
2527 cpu_x86_load_seg(env, R_GS, 0);
2529 #elif defined(TARGET_ARM)
2532 cpsr_write(env, regs->uregs[16], 0xffffffff);
2533 for(i = 0; i < 16; i++) {
2534 env->regs[i] = regs->uregs[i];
2537 #elif defined(TARGET_SPARC)
2541 env->npc = regs->npc;
2543 for(i = 0; i < 8; i++)
2544 env->gregs[i] = regs->u_regs[i];
2545 for(i = 0; i < 8; i++)
2546 env->regwptr[i] = regs->u_regs[i + 8];
2548 #elif defined(TARGET_PPC)
2552 #if defined(TARGET_PPC64)
2553 #if defined(TARGET_ABI32)
2554 env->msr &= ~((target_ulong)1 << MSR_SF);
2556 env->msr |= (target_ulong)1 << MSR_SF;
2559 env->nip = regs->nip;
2560 for(i = 0; i < 32; i++) {
2561 env->gpr[i] = regs->gpr[i];
2564 #elif defined(TARGET_M68K)
2567 env->dregs[0] = regs->d0;
2568 env->dregs[1] = regs->d1;
2569 env->dregs[2] = regs->d2;
2570 env->dregs[3] = regs->d3;
2571 env->dregs[4] = regs->d4;
2572 env->dregs[5] = regs->d5;
2573 env->dregs[6] = regs->d6;
2574 env->dregs[7] = regs->d7;
2575 env->aregs[0] = regs->a0;
2576 env->aregs[1] = regs->a1;
2577 env->aregs[2] = regs->a2;
2578 env->aregs[3] = regs->a3;
2579 env->aregs[4] = regs->a4;
2580 env->aregs[5] = regs->a5;
2581 env->aregs[6] = regs->a6;
2582 env->aregs[7] = regs->usp;
2584 ts->sim_syscalls = 1;
2586 #elif defined(TARGET_MIPS)
2590 for(i = 0; i < 32; i++) {
2591 env->active_tc.gpr[i] = regs->regs[i];
2593 env->active_tc.PC = regs->cp0_epc;
2595 #elif defined(TARGET_SH4)
2599 for(i = 0; i < 16; i++) {
2600 env->gregs[i] = regs->regs[i];
2604 #elif defined(TARGET_ALPHA)
2608 for(i = 0; i < 28; i++) {
2609 env->ir[i] = ((abi_ulong *)regs)[i];
2611 env->ipr[IPR_USP] = regs->usp;
2612 env->ir[30] = regs->usp;
2614 env->unique = regs->unique;
2616 #elif defined(TARGET_CRIS)
2618 env->regs[0] = regs->r0;
2619 env->regs[1] = regs->r1;
2620 env->regs[2] = regs->r2;
2621 env->regs[3] = regs->r3;
2622 env->regs[4] = regs->r4;
2623 env->regs[5] = regs->r5;
2624 env->regs[6] = regs->r6;
2625 env->regs[7] = regs->r7;
2626 env->regs[8] = regs->r8;
2627 env->regs[9] = regs->r9;
2628 env->regs[10] = regs->r10;
2629 env->regs[11] = regs->r11;
2630 env->regs[12] = regs->r12;
2631 env->regs[13] = regs->r13;
2632 env->regs[14] = info->start_stack;
2633 env->regs[15] = regs->acr;
2634 env->pc = regs->erp;
2637 #error unsupported target CPU
2640 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2641 ts->stack_base = info->start_stack;
2642 ts->heap_base = info->brk;
2643 /* This will be filled in on the first SYS_HEAPINFO call. */
2648 gdbserver_start (gdbstub_port);
2649 gdb_handlesig(env, 0);