4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
28 #include <sys/syscall.h>
31 #include "qemu-common.h"
32 #include "cache-utils.h"
39 #define DEBUG_LOGFILE "/tmp/qemu.log"
41 const char *exec_path;
43 #if defined(CONFIG_USE_GUEST_BASE)
44 unsigned long mmap_min_addr = 0;
45 unsigned long guest_base = 0;
50 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
51 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
53 #if defined(__i386__) && !defined(CONFIG_STATIC)
54 /* Force usage of an ELF interpreter even if it is an ELF shared
56 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
59 /* for recent libc, we add these dummy symbols which are not declared
60 when generating a linked object (bug in ld ?) */
61 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
62 asm(".globl __preinit_array_start\n"
63 ".globl __preinit_array_end\n"
64 ".globl __init_array_start\n"
65 ".globl __init_array_end\n"
66 ".globl __fini_array_start\n"
67 ".globl __fini_array_end\n"
68 ".section \".rodata\"\n"
69 "__preinit_array_start:\n"
70 "__preinit_array_end:\n"
71 "__init_array_start:\n"
73 "__fini_array_start:\n"
79 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
80 we allocate a bigger stack. Need a better solution, for example
81 by remapping the process stack directly at the right place */
82 unsigned long x86_stack_size = 512 * 1024;
84 void gemu_log(const char *fmt, ...)
89 vfprintf(stderr, fmt, ap);
93 void cpu_outb(CPUState *env, int addr, int val)
95 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
98 void cpu_outw(CPUState *env, int addr, int val)
100 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
103 void cpu_outl(CPUState *env, int addr, int val)
105 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
108 int cpu_inb(CPUState *env, int addr)
110 fprintf(stderr, "inb: port=0x%04x\n", addr);
114 int cpu_inw(CPUState *env, int addr)
116 fprintf(stderr, "inw: port=0x%04x\n", addr);
120 int cpu_inl(CPUState *env, int addr)
122 fprintf(stderr, "inl: port=0x%04x\n", addr);
126 #if defined(TARGET_I386)
127 int cpu_get_pic_interrupt(CPUState *env)
133 /* timers for rdtsc */
137 static uint64_t emu_time;
139 int64_t cpu_get_real_ticks(void)
146 #if defined(USE_NPTL)
147 /***********************************************************/
148 /* Helper routines for implementing atomic operations. */
150 /* To implement exclusive operations we force all cpus to syncronise.
151 We don't require a full sync, only that no cpus are executing guest code.
152 The alternative is to map target atomic ops onto host equivalents,
153 which requires quite a lot of per host/target work. */
154 static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
155 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
156 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
157 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
158 static int pending_cpus;
160 /* Make sure everything is in a consistent state for calling fork(). */
161 void fork_start(void)
164 pthread_mutex_lock(&tb_lock);
165 pthread_mutex_lock(&exclusive_lock);
168 void fork_end(int child)
171 /* Child processes created by fork() only have a single thread.
172 Discard information about the parent threads. */
173 first_cpu = thread_env;
174 thread_env->next_cpu = NULL;
176 pthread_mutex_init(&exclusive_lock, NULL);
177 pthread_mutex_init(&cpu_list_mutex, NULL);
178 pthread_cond_init(&exclusive_cond, NULL);
179 pthread_cond_init(&exclusive_resume, NULL);
180 pthread_mutex_init(&tb_lock, NULL);
181 gdbserver_fork(thread_env);
183 pthread_mutex_unlock(&exclusive_lock);
184 pthread_mutex_unlock(&tb_lock);
186 mmap_fork_end(child);
189 /* Wait for pending exclusive operations to complete. The exclusive lock
191 static inline void exclusive_idle(void)
193 while (pending_cpus) {
194 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
198 /* Start an exclusive operation.
199 Must only be called from outside cpu_arm_exec. */
200 static inline void start_exclusive(void)
203 pthread_mutex_lock(&exclusive_lock);
207 /* Make all other cpus stop executing. */
208 for (other = first_cpu; other; other = other->next_cpu) {
209 if (other->running) {
214 if (pending_cpus > 1) {
215 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
219 /* Finish an exclusive operation. */
220 static inline void end_exclusive(void)
223 pthread_cond_broadcast(&exclusive_resume);
224 pthread_mutex_unlock(&exclusive_lock);
227 /* Wait for exclusive ops to finish, and begin cpu execution. */
228 static inline void cpu_exec_start(CPUState *env)
230 pthread_mutex_lock(&exclusive_lock);
233 pthread_mutex_unlock(&exclusive_lock);
236 /* Mark cpu as not executing, and release pending exclusive ops. */
237 static inline void cpu_exec_end(CPUState *env)
239 pthread_mutex_lock(&exclusive_lock);
241 if (pending_cpus > 1) {
243 if (pending_cpus == 1) {
244 pthread_cond_signal(&exclusive_cond);
248 pthread_mutex_unlock(&exclusive_lock);
251 void cpu_list_lock(void)
253 pthread_mutex_lock(&cpu_list_mutex);
256 void cpu_list_unlock(void)
258 pthread_mutex_unlock(&cpu_list_mutex);
260 #else /* if !USE_NPTL */
261 /* These are no-ops because we are not threadsafe. */
262 static inline void cpu_exec_start(CPUState *env)
266 static inline void cpu_exec_end(CPUState *env)
270 static inline void start_exclusive(void)
274 static inline void end_exclusive(void)
278 void fork_start(void)
282 void fork_end(int child)
285 gdbserver_fork(thread_env);
289 void cpu_list_lock(void)
293 void cpu_list_unlock(void)
300 /***********************************************************/
301 /* CPUX86 core interface */
303 void cpu_smm_update(CPUState *env)
307 uint64_t cpu_get_tsc(CPUX86State *env)
309 return cpu_get_real_ticks();
312 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
317 e1 = (addr << 16) | (limit & 0xffff);
318 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
325 static uint64_t *idt_table;
327 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
328 uint64_t addr, unsigned int sel)
331 e1 = (addr & 0xffff) | (sel << 16);
332 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
336 p[2] = tswap32(addr >> 32);
339 /* only dpl matters as we do only user space emulation */
340 static void set_idt(int n, unsigned int dpl)
342 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
345 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
346 uint32_t addr, unsigned int sel)
349 e1 = (addr & 0xffff) | (sel << 16);
350 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
356 /* only dpl matters as we do only user space emulation */
357 static void set_idt(int n, unsigned int dpl)
359 set_gate(idt_table + n, 0, dpl, 0, 0);
363 void cpu_loop(CPUX86State *env)
367 target_siginfo_t info;
370 trapnr = cpu_x86_exec(env);
373 /* linux syscall from int $0x80 */
374 env->regs[R_EAX] = do_syscall(env,
385 /* linux syscall from syscall intruction */
386 env->regs[R_EAX] = do_syscall(env,
394 env->eip = env->exception_next_eip;
399 info.si_signo = SIGBUS;
401 info.si_code = TARGET_SI_KERNEL;
402 info._sifields._sigfault._addr = 0;
403 queue_signal(env, info.si_signo, &info);
406 /* XXX: potential problem if ABI32 */
407 #ifndef TARGET_X86_64
408 if (env->eflags & VM_MASK) {
409 handle_vm86_fault(env);
413 info.si_signo = SIGSEGV;
415 info.si_code = TARGET_SI_KERNEL;
416 info._sifields._sigfault._addr = 0;
417 queue_signal(env, info.si_signo, &info);
421 info.si_signo = SIGSEGV;
423 if (!(env->error_code & 1))
424 info.si_code = TARGET_SEGV_MAPERR;
426 info.si_code = TARGET_SEGV_ACCERR;
427 info._sifields._sigfault._addr = env->cr[2];
428 queue_signal(env, info.si_signo, &info);
431 #ifndef TARGET_X86_64
432 if (env->eflags & VM_MASK) {
433 handle_vm86_trap(env, trapnr);
437 /* division by zero */
438 info.si_signo = SIGFPE;
440 info.si_code = TARGET_FPE_INTDIV;
441 info._sifields._sigfault._addr = env->eip;
442 queue_signal(env, info.si_signo, &info);
447 #ifndef TARGET_X86_64
448 if (env->eflags & VM_MASK) {
449 handle_vm86_trap(env, trapnr);
453 info.si_signo = SIGTRAP;
455 if (trapnr == EXCP01_DB) {
456 info.si_code = TARGET_TRAP_BRKPT;
457 info._sifields._sigfault._addr = env->eip;
459 info.si_code = TARGET_SI_KERNEL;
460 info._sifields._sigfault._addr = 0;
462 queue_signal(env, info.si_signo, &info);
467 #ifndef TARGET_X86_64
468 if (env->eflags & VM_MASK) {
469 handle_vm86_trap(env, trapnr);
473 info.si_signo = SIGSEGV;
475 info.si_code = TARGET_SI_KERNEL;
476 info._sifields._sigfault._addr = 0;
477 queue_signal(env, info.si_signo, &info);
481 info.si_signo = SIGILL;
483 info.si_code = TARGET_ILL_ILLOPN;
484 info._sifields._sigfault._addr = env->eip;
485 queue_signal(env, info.si_signo, &info);
488 /* just indicate that signals should be handled asap */
494 sig = gdb_handlesig (env, TARGET_SIGTRAP);
499 info.si_code = TARGET_TRAP_BRKPT;
500 queue_signal(env, info.si_signo, &info);
505 pc = env->segs[R_CS].base + env->eip;
506 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
510 process_pending_signals(env);
517 static void arm_cache_flush(abi_ulong start, abi_ulong last)
519 abi_ulong addr, last1;
525 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
528 tb_invalidate_page_range(addr, last1 + 1);
535 /* Handle a jump to the kernel code page. */
537 do_kernel_trap(CPUARMState *env)
543 switch (env->regs[15]) {
544 case 0xffff0fa0: /* __kernel_memory_barrier */
545 /* ??? No-op. Will need to do better for SMP. */
547 case 0xffff0fc0: /* __kernel_cmpxchg */
548 /* XXX: This only works between threads, not between processes.
549 It's probably possible to implement this with native host
550 operations. However things like ldrex/strex are much harder so
551 there's not much point trying. */
553 cpsr = cpsr_read(env);
555 /* FIXME: This should SEGV if the access fails. */
556 if (get_user_u32(val, addr))
558 if (val == env->regs[0]) {
560 /* FIXME: Check for segfaults. */
561 put_user_u32(val, addr);
568 cpsr_write(env, cpsr, CPSR_C);
571 case 0xffff0fe0: /* __kernel_get_tls */
572 env->regs[0] = env->cp15.c13_tls2;
577 /* Jump back to the caller. */
578 addr = env->regs[14];
583 env->regs[15] = addr;
588 void cpu_loop(CPUARMState *env)
591 unsigned int n, insn;
592 target_siginfo_t info;
597 trapnr = cpu_arm_exec(env);
602 TaskState *ts = env->opaque;
606 /* we handle the FPU emulation here, as Linux */
607 /* we get the opcode */
608 /* FIXME - what to do if get_user() fails? */
609 get_user_u32(opcode, env->regs[15]);
611 rc = EmulateAll(opcode, &ts->fpa, env);
612 if (rc == 0) { /* illegal instruction */
613 info.si_signo = SIGILL;
615 info.si_code = TARGET_ILL_ILLOPN;
616 info._sifields._sigfault._addr = env->regs[15];
617 queue_signal(env, info.si_signo, &info);
618 } else if (rc < 0) { /* FP exception */
621 /* translate softfloat flags to FPSR flags */
622 if (-rc & float_flag_invalid)
624 if (-rc & float_flag_divbyzero)
626 if (-rc & float_flag_overflow)
628 if (-rc & float_flag_underflow)
630 if (-rc & float_flag_inexact)
633 FPSR fpsr = ts->fpa.fpsr;
634 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
636 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
637 info.si_signo = SIGFPE;
640 /* ordered by priority, least first */
641 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
642 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
643 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
644 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
645 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
647 info._sifields._sigfault._addr = env->regs[15];
648 queue_signal(env, info.si_signo, &info);
653 /* accumulate unenabled exceptions */
654 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
656 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
658 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
660 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
662 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
665 } else { /* everything OK */
676 if (trapnr == EXCP_BKPT) {
678 /* FIXME - what to do if get_user() fails? */
679 get_user_u16(insn, env->regs[15]);
683 /* FIXME - what to do if get_user() fails? */
684 get_user_u32(insn, env->regs[15]);
685 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
690 /* FIXME - what to do if get_user() fails? */
691 get_user_u16(insn, env->regs[15] - 2);
694 /* FIXME - what to do if get_user() fails? */
695 get_user_u32(insn, env->regs[15] - 4);
700 if (n == ARM_NR_cacheflush) {
701 arm_cache_flush(env->regs[0], env->regs[1]);
702 } else if (n == ARM_NR_semihosting
703 || n == ARM_NR_thumb_semihosting) {
704 env->regs[0] = do_arm_semihosting (env);
705 } else if (n == 0 || n >= ARM_SYSCALL_BASE
706 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
708 if (env->thumb || n == 0) {
711 n -= ARM_SYSCALL_BASE;
714 if ( n > ARM_NR_BASE) {
716 case ARM_NR_cacheflush:
717 arm_cache_flush(env->regs[0], env->regs[1]);
720 cpu_set_tls(env, env->regs[0]);
724 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
726 env->regs[0] = -TARGET_ENOSYS;
730 env->regs[0] = do_syscall(env,
745 /* just indicate that signals should be handled asap */
747 case EXCP_PREFETCH_ABORT:
748 addr = env->cp15.c6_insn;
750 case EXCP_DATA_ABORT:
751 addr = env->cp15.c6_data;
755 info.si_signo = SIGSEGV;
757 /* XXX: check env->error_code */
758 info.si_code = TARGET_SEGV_MAPERR;
759 info._sifields._sigfault._addr = addr;
760 queue_signal(env, info.si_signo, &info);
767 sig = gdb_handlesig (env, TARGET_SIGTRAP);
772 info.si_code = TARGET_TRAP_BRKPT;
773 queue_signal(env, info.si_signo, &info);
777 case EXCP_KERNEL_TRAP:
778 if (do_kernel_trap(env))
783 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
785 cpu_dump_state(env, stderr, fprintf, 0);
788 process_pending_signals(env);
795 #define SPARC64_STACK_BIAS 2047
799 /* WARNING: dealing with register windows _is_ complicated. More info
800 can be found at http://www.sics.se/~psm/sparcstack.html */
801 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
803 index = (index + cwp * 16) % (16 * env->nwindows);
804 /* wrap handling : if cwp is on the last window, then we use the
805 registers 'after' the end */
806 if (index < 8 && env->cwp == env->nwindows - 1)
807 index += 16 * env->nwindows;
811 /* save the register window 'cwp1' */
812 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
817 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
818 #ifdef TARGET_SPARC64
820 sp_ptr += SPARC64_STACK_BIAS;
822 #if defined(DEBUG_WIN)
823 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
826 for(i = 0; i < 16; i++) {
827 /* FIXME - what to do if put_user() fails? */
828 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
829 sp_ptr += sizeof(abi_ulong);
833 static void save_window(CPUSPARCState *env)
835 #ifndef TARGET_SPARC64
836 unsigned int new_wim;
837 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
838 ((1LL << env->nwindows) - 1);
839 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
842 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
848 static void restore_window(CPUSPARCState *env)
850 #ifndef TARGET_SPARC64
851 unsigned int new_wim;
853 unsigned int i, cwp1;
856 #ifndef TARGET_SPARC64
857 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
858 ((1LL << env->nwindows) - 1);
861 /* restore the invalid window */
862 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
863 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
864 #ifdef TARGET_SPARC64
866 sp_ptr += SPARC64_STACK_BIAS;
868 #if defined(DEBUG_WIN)
869 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
872 for(i = 0; i < 16; i++) {
873 /* FIXME - what to do if get_user() fails? */
874 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
875 sp_ptr += sizeof(abi_ulong);
877 #ifdef TARGET_SPARC64
879 if (env->cleanwin < env->nwindows - 1)
887 static void flush_windows(CPUSPARCState *env)
893 /* if restore would invoke restore_window(), then we can stop */
894 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
895 #ifndef TARGET_SPARC64
896 if (env->wim & (1 << cwp1))
899 if (env->canrestore == 0)
904 save_window_offset(env, cwp1);
907 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
908 #ifndef TARGET_SPARC64
909 /* set wim so that restore will reload the registers */
910 env->wim = 1 << cwp1;
912 #if defined(DEBUG_WIN)
913 printf("flush_windows: nb=%d\n", offset - 1);
917 void cpu_loop (CPUSPARCState *env)
920 target_siginfo_t info;
923 trapnr = cpu_sparc_exec (env);
926 #ifndef TARGET_SPARC64
933 ret = do_syscall (env, env->gregs[1],
934 env->regwptr[0], env->regwptr[1],
935 env->regwptr[2], env->regwptr[3],
936 env->regwptr[4], env->regwptr[5]);
937 if ((unsigned int)ret >= (unsigned int)(-515)) {
938 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
939 env->xcc |= PSR_CARRY;
941 env->psr |= PSR_CARRY;
945 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
946 env->xcc &= ~PSR_CARRY;
948 env->psr &= ~PSR_CARRY;
951 env->regwptr[0] = ret;
952 /* next instruction */
954 env->npc = env->npc + 4;
956 case 0x83: /* flush windows */
961 /* next instruction */
963 env->npc = env->npc + 4;
965 #ifndef TARGET_SPARC64
966 case TT_WIN_OVF: /* window overflow */
969 case TT_WIN_UNF: /* window underflow */
975 info.si_signo = SIGSEGV;
977 /* XXX: check env->error_code */
978 info.si_code = TARGET_SEGV_MAPERR;
979 info._sifields._sigfault._addr = env->mmuregs[4];
980 queue_signal(env, info.si_signo, &info);
984 case TT_SPILL: /* window overflow */
987 case TT_FILL: /* window underflow */
993 info.si_signo = SIGSEGV;
995 /* XXX: check env->error_code */
996 info.si_code = TARGET_SEGV_MAPERR;
997 if (trapnr == TT_DFAULT)
998 info._sifields._sigfault._addr = env->dmmuregs[4];
1000 info._sifields._sigfault._addr = env->tsptr->tpc;
1001 queue_signal(env, info.si_signo, &info);
1004 #ifndef TARGET_ABI32
1007 sparc64_get_context(env);
1011 sparc64_set_context(env);
1015 case EXCP_INTERRUPT:
1016 /* just indicate that signals should be handled asap */
1022 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1025 info.si_signo = sig;
1027 info.si_code = TARGET_TRAP_BRKPT;
1028 queue_signal(env, info.si_signo, &info);
1033 printf ("Unhandled trap: 0x%x\n", trapnr);
1034 cpu_dump_state(env, stderr, fprintf, 0);
1037 process_pending_signals (env);
1044 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1050 uint32_t cpu_ppc_load_tbl (CPUState *env)
1052 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1055 uint32_t cpu_ppc_load_tbu (CPUState *env)
1057 return cpu_ppc_get_tb(env) >> 32;
1060 uint32_t cpu_ppc_load_atbl (CPUState *env)
1062 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1065 uint32_t cpu_ppc_load_atbu (CPUState *env)
1067 return cpu_ppc_get_tb(env) >> 32;
1070 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1071 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1073 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1075 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1078 /* XXX: to be fixed */
1079 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1084 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1089 #define EXCP_DUMP(env, fmt, args...) \
1091 fprintf(stderr, fmt , ##args); \
1092 cpu_dump_state(env, stderr, fprintf, 0); \
1093 qemu_log(fmt, ##args); \
1094 log_cpu_state(env, 0); \
1097 void cpu_loop(CPUPPCState *env)
1099 target_siginfo_t info;
1104 trapnr = cpu_ppc_exec(env);
1106 case POWERPC_EXCP_NONE:
1109 case POWERPC_EXCP_CRITICAL: /* Critical input */
1110 cpu_abort(env, "Critical interrupt while in user mode. "
1113 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1114 cpu_abort(env, "Machine check exception while in user mode. "
1117 case POWERPC_EXCP_DSI: /* Data storage exception */
1118 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1120 /* XXX: check this. Seems bugged */
1121 switch (env->error_code & 0xFF000000) {
1123 info.si_signo = TARGET_SIGSEGV;
1125 info.si_code = TARGET_SEGV_MAPERR;
1128 info.si_signo = TARGET_SIGILL;
1130 info.si_code = TARGET_ILL_ILLADR;
1133 info.si_signo = TARGET_SIGSEGV;
1135 info.si_code = TARGET_SEGV_ACCERR;
1138 /* Let's send a regular segfault... */
1139 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1141 info.si_signo = TARGET_SIGSEGV;
1143 info.si_code = TARGET_SEGV_MAPERR;
1146 info._sifields._sigfault._addr = env->nip;
1147 queue_signal(env, info.si_signo, &info);
1149 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1150 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
1151 env->spr[SPR_SRR0]);
1152 /* XXX: check this */
1153 switch (env->error_code & 0xFF000000) {
1155 info.si_signo = TARGET_SIGSEGV;
1157 info.si_code = TARGET_SEGV_MAPERR;
1161 info.si_signo = TARGET_SIGSEGV;
1163 info.si_code = TARGET_SEGV_ACCERR;
1166 /* Let's send a regular segfault... */
1167 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1169 info.si_signo = TARGET_SIGSEGV;
1171 info.si_code = TARGET_SEGV_MAPERR;
1174 info._sifields._sigfault._addr = env->nip - 4;
1175 queue_signal(env, info.si_signo, &info);
1177 case POWERPC_EXCP_EXTERNAL: /* External input */
1178 cpu_abort(env, "External interrupt while in user mode. "
1181 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1182 EXCP_DUMP(env, "Unaligned memory access\n");
1183 /* XXX: check this */
1184 info.si_signo = TARGET_SIGBUS;
1186 info.si_code = TARGET_BUS_ADRALN;
1187 info._sifields._sigfault._addr = env->nip - 4;
1188 queue_signal(env, info.si_signo, &info);
1190 case POWERPC_EXCP_PROGRAM: /* Program exception */
1191 /* XXX: check this */
1192 switch (env->error_code & ~0xF) {
1193 case POWERPC_EXCP_FP:
1194 EXCP_DUMP(env, "Floating point program exception\n");
1195 info.si_signo = TARGET_SIGFPE;
1197 switch (env->error_code & 0xF) {
1198 case POWERPC_EXCP_FP_OX:
1199 info.si_code = TARGET_FPE_FLTOVF;
1201 case POWERPC_EXCP_FP_UX:
1202 info.si_code = TARGET_FPE_FLTUND;
1204 case POWERPC_EXCP_FP_ZX:
1205 case POWERPC_EXCP_FP_VXZDZ:
1206 info.si_code = TARGET_FPE_FLTDIV;
1208 case POWERPC_EXCP_FP_XX:
1209 info.si_code = TARGET_FPE_FLTRES;
1211 case POWERPC_EXCP_FP_VXSOFT:
1212 info.si_code = TARGET_FPE_FLTINV;
1214 case POWERPC_EXCP_FP_VXSNAN:
1215 case POWERPC_EXCP_FP_VXISI:
1216 case POWERPC_EXCP_FP_VXIDI:
1217 case POWERPC_EXCP_FP_VXIMZ:
1218 case POWERPC_EXCP_FP_VXVC:
1219 case POWERPC_EXCP_FP_VXSQRT:
1220 case POWERPC_EXCP_FP_VXCVI:
1221 info.si_code = TARGET_FPE_FLTSUB;
1224 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1229 case POWERPC_EXCP_INVAL:
1230 EXCP_DUMP(env, "Invalid instruction\n");
1231 info.si_signo = TARGET_SIGILL;
1233 switch (env->error_code & 0xF) {
1234 case POWERPC_EXCP_INVAL_INVAL:
1235 info.si_code = TARGET_ILL_ILLOPC;
1237 case POWERPC_EXCP_INVAL_LSWX:
1238 info.si_code = TARGET_ILL_ILLOPN;
1240 case POWERPC_EXCP_INVAL_SPR:
1241 info.si_code = TARGET_ILL_PRVREG;
1243 case POWERPC_EXCP_INVAL_FP:
1244 info.si_code = TARGET_ILL_COPROC;
1247 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1248 env->error_code & 0xF);
1249 info.si_code = TARGET_ILL_ILLADR;
1253 case POWERPC_EXCP_PRIV:
1254 EXCP_DUMP(env, "Privilege violation\n");
1255 info.si_signo = TARGET_SIGILL;
1257 switch (env->error_code & 0xF) {
1258 case POWERPC_EXCP_PRIV_OPC:
1259 info.si_code = TARGET_ILL_PRVOPC;
1261 case POWERPC_EXCP_PRIV_REG:
1262 info.si_code = TARGET_ILL_PRVREG;
1265 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1266 env->error_code & 0xF);
1267 info.si_code = TARGET_ILL_PRVOPC;
1271 case POWERPC_EXCP_TRAP:
1272 cpu_abort(env, "Tried to call a TRAP\n");
1275 /* Should not happen ! */
1276 cpu_abort(env, "Unknown program exception (%02x)\n",
1280 info._sifields._sigfault._addr = env->nip - 4;
1281 queue_signal(env, info.si_signo, &info);
1283 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1284 EXCP_DUMP(env, "No floating point allowed\n");
1285 info.si_signo = TARGET_SIGILL;
1287 info.si_code = TARGET_ILL_COPROC;
1288 info._sifields._sigfault._addr = env->nip - 4;
1289 queue_signal(env, info.si_signo, &info);
1291 case POWERPC_EXCP_SYSCALL: /* System call exception */
1292 cpu_abort(env, "Syscall exception while in user mode. "
1295 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1296 EXCP_DUMP(env, "No APU instruction allowed\n");
1297 info.si_signo = TARGET_SIGILL;
1299 info.si_code = TARGET_ILL_COPROC;
1300 info._sifields._sigfault._addr = env->nip - 4;
1301 queue_signal(env, info.si_signo, &info);
1303 case POWERPC_EXCP_DECR: /* Decrementer exception */
1304 cpu_abort(env, "Decrementer interrupt while in user mode. "
1307 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1308 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1311 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1312 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1315 case POWERPC_EXCP_DTLB: /* Data TLB error */
1316 cpu_abort(env, "Data TLB exception while in user mode. "
1319 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1320 cpu_abort(env, "Instruction TLB exception while in user mode. "
1323 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1324 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1325 info.si_signo = TARGET_SIGILL;
1327 info.si_code = TARGET_ILL_COPROC;
1328 info._sifields._sigfault._addr = env->nip - 4;
1329 queue_signal(env, info.si_signo, &info);
1331 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1332 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1334 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1335 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1337 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1338 cpu_abort(env, "Performance monitor exception not handled\n");
1340 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1341 cpu_abort(env, "Doorbell interrupt while in user mode. "
1344 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1345 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1348 case POWERPC_EXCP_RESET: /* System reset exception */
1349 cpu_abort(env, "Reset interrupt while in user mode. "
1352 case POWERPC_EXCP_DSEG: /* Data segment exception */
1353 cpu_abort(env, "Data segment exception while in user mode. "
1356 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1357 cpu_abort(env, "Instruction segment exception "
1358 "while in user mode. Aborting\n");
1360 /* PowerPC 64 with hypervisor mode support */
1361 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1362 cpu_abort(env, "Hypervisor decrementer interrupt "
1363 "while in user mode. Aborting\n");
1365 case POWERPC_EXCP_TRACE: /* Trace exception */
1367 * we use this exception to emulate step-by-step execution mode.
1370 /* PowerPC 64 with hypervisor mode support */
1371 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1372 cpu_abort(env, "Hypervisor data storage exception "
1373 "while in user mode. Aborting\n");
1375 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1376 cpu_abort(env, "Hypervisor instruction storage exception "
1377 "while in user mode. Aborting\n");
1379 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1380 cpu_abort(env, "Hypervisor data segment exception "
1381 "while in user mode. Aborting\n");
1383 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1384 cpu_abort(env, "Hypervisor instruction segment exception "
1385 "while in user mode. Aborting\n");
1387 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1388 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1389 info.si_signo = TARGET_SIGILL;
1391 info.si_code = TARGET_ILL_COPROC;
1392 info._sifields._sigfault._addr = env->nip - 4;
1393 queue_signal(env, info.si_signo, &info);
1395 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1396 cpu_abort(env, "Programable interval timer interrupt "
1397 "while in user mode. Aborting\n");
1399 case POWERPC_EXCP_IO: /* IO error exception */
1400 cpu_abort(env, "IO error exception while in user mode. "
1403 case POWERPC_EXCP_RUNM: /* Run mode exception */
1404 cpu_abort(env, "Run mode exception while in user mode. "
1407 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1408 cpu_abort(env, "Emulation trap exception not handled\n");
1410 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1411 cpu_abort(env, "Instruction fetch TLB exception "
1412 "while in user-mode. Aborting");
1414 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1415 cpu_abort(env, "Data load TLB exception while in user-mode. "
1418 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1419 cpu_abort(env, "Data store TLB exception while in user-mode. "
1422 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1423 cpu_abort(env, "Floating-point assist exception not handled\n");
1425 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1426 cpu_abort(env, "Instruction address breakpoint exception "
1429 case POWERPC_EXCP_SMI: /* System management interrupt */
1430 cpu_abort(env, "System management interrupt while in user mode. "
1433 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1434 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1437 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1438 cpu_abort(env, "Performance monitor exception not handled\n");
1440 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1441 cpu_abort(env, "Vector assist exception not handled\n");
1443 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1444 cpu_abort(env, "Soft patch exception not handled\n");
1446 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1447 cpu_abort(env, "Maintenance exception while in user mode. "
1450 case POWERPC_EXCP_STOP: /* stop translation */
1451 /* We did invalidate the instruction cache. Go on */
1453 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1454 /* We just stopped because of a branch. Go on */
1456 case POWERPC_EXCP_SYSCALL_USER:
1457 /* system call in user-mode emulation */
1459 * PPC ABI uses overflow flag in cr0 to signal an error
1463 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1464 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1466 env->crf[0] &= ~0x1;
1467 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1468 env->gpr[5], env->gpr[6], env->gpr[7],
1470 if (ret > (uint32_t)(-515)) {
1476 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1483 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1485 info.si_signo = sig;
1487 info.si_code = TARGET_TRAP_BRKPT;
1488 queue_signal(env, info.si_signo, &info);
1492 case EXCP_INTERRUPT:
1493 /* just indicate that signals should be handled asap */
1496 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1499 process_pending_signals(env);
1506 #define MIPS_SYS(name, args) args,
1508 static const uint8_t mips_syscall_args[] = {
1509 MIPS_SYS(sys_syscall , 0) /* 4000 */
1510 MIPS_SYS(sys_exit , 1)
1511 MIPS_SYS(sys_fork , 0)
1512 MIPS_SYS(sys_read , 3)
1513 MIPS_SYS(sys_write , 3)
1514 MIPS_SYS(sys_open , 3) /* 4005 */
1515 MIPS_SYS(sys_close , 1)
1516 MIPS_SYS(sys_waitpid , 3)
1517 MIPS_SYS(sys_creat , 2)
1518 MIPS_SYS(sys_link , 2)
1519 MIPS_SYS(sys_unlink , 1) /* 4010 */
1520 MIPS_SYS(sys_execve , 0)
1521 MIPS_SYS(sys_chdir , 1)
1522 MIPS_SYS(sys_time , 1)
1523 MIPS_SYS(sys_mknod , 3)
1524 MIPS_SYS(sys_chmod , 2) /* 4015 */
1525 MIPS_SYS(sys_lchown , 3)
1526 MIPS_SYS(sys_ni_syscall , 0)
1527 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1528 MIPS_SYS(sys_lseek , 3)
1529 MIPS_SYS(sys_getpid , 0) /* 4020 */
1530 MIPS_SYS(sys_mount , 5)
1531 MIPS_SYS(sys_oldumount , 1)
1532 MIPS_SYS(sys_setuid , 1)
1533 MIPS_SYS(sys_getuid , 0)
1534 MIPS_SYS(sys_stime , 1) /* 4025 */
1535 MIPS_SYS(sys_ptrace , 4)
1536 MIPS_SYS(sys_alarm , 1)
1537 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1538 MIPS_SYS(sys_pause , 0)
1539 MIPS_SYS(sys_utime , 2) /* 4030 */
1540 MIPS_SYS(sys_ni_syscall , 0)
1541 MIPS_SYS(sys_ni_syscall , 0)
1542 MIPS_SYS(sys_access , 2)
1543 MIPS_SYS(sys_nice , 1)
1544 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1545 MIPS_SYS(sys_sync , 0)
1546 MIPS_SYS(sys_kill , 2)
1547 MIPS_SYS(sys_rename , 2)
1548 MIPS_SYS(sys_mkdir , 2)
1549 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1550 MIPS_SYS(sys_dup , 1)
1551 MIPS_SYS(sys_pipe , 0)
1552 MIPS_SYS(sys_times , 1)
1553 MIPS_SYS(sys_ni_syscall , 0)
1554 MIPS_SYS(sys_brk , 1) /* 4045 */
1555 MIPS_SYS(sys_setgid , 1)
1556 MIPS_SYS(sys_getgid , 0)
1557 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1558 MIPS_SYS(sys_geteuid , 0)
1559 MIPS_SYS(sys_getegid , 0) /* 4050 */
1560 MIPS_SYS(sys_acct , 0)
1561 MIPS_SYS(sys_umount , 2)
1562 MIPS_SYS(sys_ni_syscall , 0)
1563 MIPS_SYS(sys_ioctl , 3)
1564 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1565 MIPS_SYS(sys_ni_syscall , 2)
1566 MIPS_SYS(sys_setpgid , 2)
1567 MIPS_SYS(sys_ni_syscall , 0)
1568 MIPS_SYS(sys_olduname , 1)
1569 MIPS_SYS(sys_umask , 1) /* 4060 */
1570 MIPS_SYS(sys_chroot , 1)
1571 MIPS_SYS(sys_ustat , 2)
1572 MIPS_SYS(sys_dup2 , 2)
1573 MIPS_SYS(sys_getppid , 0)
1574 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1575 MIPS_SYS(sys_setsid , 0)
1576 MIPS_SYS(sys_sigaction , 3)
1577 MIPS_SYS(sys_sgetmask , 0)
1578 MIPS_SYS(sys_ssetmask , 1)
1579 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1580 MIPS_SYS(sys_setregid , 2)
1581 MIPS_SYS(sys_sigsuspend , 0)
1582 MIPS_SYS(sys_sigpending , 1)
1583 MIPS_SYS(sys_sethostname , 2)
1584 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1585 MIPS_SYS(sys_getrlimit , 2)
1586 MIPS_SYS(sys_getrusage , 2)
1587 MIPS_SYS(sys_gettimeofday, 2)
1588 MIPS_SYS(sys_settimeofday, 2)
1589 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1590 MIPS_SYS(sys_setgroups , 2)
1591 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1592 MIPS_SYS(sys_symlink , 2)
1593 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1594 MIPS_SYS(sys_readlink , 3) /* 4085 */
1595 MIPS_SYS(sys_uselib , 1)
1596 MIPS_SYS(sys_swapon , 2)
1597 MIPS_SYS(sys_reboot , 3)
1598 MIPS_SYS(old_readdir , 3)
1599 MIPS_SYS(old_mmap , 6) /* 4090 */
1600 MIPS_SYS(sys_munmap , 2)
1601 MIPS_SYS(sys_truncate , 2)
1602 MIPS_SYS(sys_ftruncate , 2)
1603 MIPS_SYS(sys_fchmod , 2)
1604 MIPS_SYS(sys_fchown , 3) /* 4095 */
1605 MIPS_SYS(sys_getpriority , 2)
1606 MIPS_SYS(sys_setpriority , 3)
1607 MIPS_SYS(sys_ni_syscall , 0)
1608 MIPS_SYS(sys_statfs , 2)
1609 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1610 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1611 MIPS_SYS(sys_socketcall , 2)
1612 MIPS_SYS(sys_syslog , 3)
1613 MIPS_SYS(sys_setitimer , 3)
1614 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1615 MIPS_SYS(sys_newstat , 2)
1616 MIPS_SYS(sys_newlstat , 2)
1617 MIPS_SYS(sys_newfstat , 2)
1618 MIPS_SYS(sys_uname , 1)
1619 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1620 MIPS_SYS(sys_vhangup , 0)
1621 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1622 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1623 MIPS_SYS(sys_wait4 , 4)
1624 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1625 MIPS_SYS(sys_sysinfo , 1)
1626 MIPS_SYS(sys_ipc , 6)
1627 MIPS_SYS(sys_fsync , 1)
1628 MIPS_SYS(sys_sigreturn , 0)
1629 MIPS_SYS(sys_clone , 0) /* 4120 */
1630 MIPS_SYS(sys_setdomainname, 2)
1631 MIPS_SYS(sys_newuname , 1)
1632 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1633 MIPS_SYS(sys_adjtimex , 1)
1634 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1635 MIPS_SYS(sys_sigprocmask , 3)
1636 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1637 MIPS_SYS(sys_init_module , 5)
1638 MIPS_SYS(sys_delete_module, 1)
1639 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1640 MIPS_SYS(sys_quotactl , 0)
1641 MIPS_SYS(sys_getpgid , 1)
1642 MIPS_SYS(sys_fchdir , 1)
1643 MIPS_SYS(sys_bdflush , 2)
1644 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1645 MIPS_SYS(sys_personality , 1)
1646 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1647 MIPS_SYS(sys_setfsuid , 1)
1648 MIPS_SYS(sys_setfsgid , 1)
1649 MIPS_SYS(sys_llseek , 5) /* 4140 */
1650 MIPS_SYS(sys_getdents , 3)
1651 MIPS_SYS(sys_select , 5)
1652 MIPS_SYS(sys_flock , 2)
1653 MIPS_SYS(sys_msync , 3)
1654 MIPS_SYS(sys_readv , 3) /* 4145 */
1655 MIPS_SYS(sys_writev , 3)
1656 MIPS_SYS(sys_cacheflush , 3)
1657 MIPS_SYS(sys_cachectl , 3)
1658 MIPS_SYS(sys_sysmips , 4)
1659 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1660 MIPS_SYS(sys_getsid , 1)
1661 MIPS_SYS(sys_fdatasync , 0)
1662 MIPS_SYS(sys_sysctl , 1)
1663 MIPS_SYS(sys_mlock , 2)
1664 MIPS_SYS(sys_munlock , 2) /* 4155 */
1665 MIPS_SYS(sys_mlockall , 1)
1666 MIPS_SYS(sys_munlockall , 0)
1667 MIPS_SYS(sys_sched_setparam, 2)
1668 MIPS_SYS(sys_sched_getparam, 2)
1669 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1670 MIPS_SYS(sys_sched_getscheduler, 1)
1671 MIPS_SYS(sys_sched_yield , 0)
1672 MIPS_SYS(sys_sched_get_priority_max, 1)
1673 MIPS_SYS(sys_sched_get_priority_min, 1)
1674 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1675 MIPS_SYS(sys_nanosleep, 2)
1676 MIPS_SYS(sys_mremap , 4)
1677 MIPS_SYS(sys_accept , 3)
1678 MIPS_SYS(sys_bind , 3)
1679 MIPS_SYS(sys_connect , 3) /* 4170 */
1680 MIPS_SYS(sys_getpeername , 3)
1681 MIPS_SYS(sys_getsockname , 3)
1682 MIPS_SYS(sys_getsockopt , 5)
1683 MIPS_SYS(sys_listen , 2)
1684 MIPS_SYS(sys_recv , 4) /* 4175 */
1685 MIPS_SYS(sys_recvfrom , 6)
1686 MIPS_SYS(sys_recvmsg , 3)
1687 MIPS_SYS(sys_send , 4)
1688 MIPS_SYS(sys_sendmsg , 3)
1689 MIPS_SYS(sys_sendto , 6) /* 4180 */
1690 MIPS_SYS(sys_setsockopt , 5)
1691 MIPS_SYS(sys_shutdown , 2)
1692 MIPS_SYS(sys_socket , 3)
1693 MIPS_SYS(sys_socketpair , 4)
1694 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1695 MIPS_SYS(sys_getresuid , 3)
1696 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1697 MIPS_SYS(sys_poll , 3)
1698 MIPS_SYS(sys_nfsservctl , 3)
1699 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1700 MIPS_SYS(sys_getresgid , 3)
1701 MIPS_SYS(sys_prctl , 5)
1702 MIPS_SYS(sys_rt_sigreturn, 0)
1703 MIPS_SYS(sys_rt_sigaction, 4)
1704 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1705 MIPS_SYS(sys_rt_sigpending, 2)
1706 MIPS_SYS(sys_rt_sigtimedwait, 4)
1707 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1708 MIPS_SYS(sys_rt_sigsuspend, 0)
1709 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1710 MIPS_SYS(sys_pwrite64 , 6)
1711 MIPS_SYS(sys_chown , 3)
1712 MIPS_SYS(sys_getcwd , 2)
1713 MIPS_SYS(sys_capget , 2)
1714 MIPS_SYS(sys_capset , 2) /* 4205 */
1715 MIPS_SYS(sys_sigaltstack , 0)
1716 MIPS_SYS(sys_sendfile , 4)
1717 MIPS_SYS(sys_ni_syscall , 0)
1718 MIPS_SYS(sys_ni_syscall , 0)
1719 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1720 MIPS_SYS(sys_truncate64 , 4)
1721 MIPS_SYS(sys_ftruncate64 , 4)
1722 MIPS_SYS(sys_stat64 , 2)
1723 MIPS_SYS(sys_lstat64 , 2)
1724 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1725 MIPS_SYS(sys_pivot_root , 2)
1726 MIPS_SYS(sys_mincore , 3)
1727 MIPS_SYS(sys_madvise , 3)
1728 MIPS_SYS(sys_getdents64 , 3)
1729 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1730 MIPS_SYS(sys_ni_syscall , 0)
1731 MIPS_SYS(sys_gettid , 0)
1732 MIPS_SYS(sys_readahead , 5)
1733 MIPS_SYS(sys_setxattr , 5)
1734 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1735 MIPS_SYS(sys_fsetxattr , 5)
1736 MIPS_SYS(sys_getxattr , 4)
1737 MIPS_SYS(sys_lgetxattr , 4)
1738 MIPS_SYS(sys_fgetxattr , 4)
1739 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1740 MIPS_SYS(sys_llistxattr , 3)
1741 MIPS_SYS(sys_flistxattr , 3)
1742 MIPS_SYS(sys_removexattr , 2)
1743 MIPS_SYS(sys_lremovexattr, 2)
1744 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1745 MIPS_SYS(sys_tkill , 2)
1746 MIPS_SYS(sys_sendfile64 , 5)
1747 MIPS_SYS(sys_futex , 2)
1748 MIPS_SYS(sys_sched_setaffinity, 3)
1749 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1750 MIPS_SYS(sys_io_setup , 2)
1751 MIPS_SYS(sys_io_destroy , 1)
1752 MIPS_SYS(sys_io_getevents, 5)
1753 MIPS_SYS(sys_io_submit , 3)
1754 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1755 MIPS_SYS(sys_exit_group , 1)
1756 MIPS_SYS(sys_lookup_dcookie, 3)
1757 MIPS_SYS(sys_epoll_create, 1)
1758 MIPS_SYS(sys_epoll_ctl , 4)
1759 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1760 MIPS_SYS(sys_remap_file_pages, 5)
1761 MIPS_SYS(sys_set_tid_address, 1)
1762 MIPS_SYS(sys_restart_syscall, 0)
1763 MIPS_SYS(sys_fadvise64_64, 7)
1764 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1765 MIPS_SYS(sys_fstatfs64 , 2)
1766 MIPS_SYS(sys_timer_create, 3)
1767 MIPS_SYS(sys_timer_settime, 4)
1768 MIPS_SYS(sys_timer_gettime, 2)
1769 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1770 MIPS_SYS(sys_timer_delete, 1)
1771 MIPS_SYS(sys_clock_settime, 2)
1772 MIPS_SYS(sys_clock_gettime, 2)
1773 MIPS_SYS(sys_clock_getres, 2)
1774 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1775 MIPS_SYS(sys_tgkill , 3)
1776 MIPS_SYS(sys_utimes , 2)
1777 MIPS_SYS(sys_mbind , 4)
1778 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1779 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1780 MIPS_SYS(sys_mq_open , 4)
1781 MIPS_SYS(sys_mq_unlink , 1)
1782 MIPS_SYS(sys_mq_timedsend, 5)
1783 MIPS_SYS(sys_mq_timedreceive, 5)
1784 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1785 MIPS_SYS(sys_mq_getsetattr, 3)
1786 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1787 MIPS_SYS(sys_waitid , 4)
1788 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1789 MIPS_SYS(sys_add_key , 5)
1790 MIPS_SYS(sys_request_key, 4)
1791 MIPS_SYS(sys_keyctl , 5)
1792 MIPS_SYS(sys_set_thread_area, 1)
1793 MIPS_SYS(sys_inotify_init, 0)
1794 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1795 MIPS_SYS(sys_inotify_rm_watch, 2)
1796 MIPS_SYS(sys_migrate_pages, 4)
1797 MIPS_SYS(sys_openat, 4)
1798 MIPS_SYS(sys_mkdirat, 3)
1799 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1800 MIPS_SYS(sys_fchownat, 5)
1801 MIPS_SYS(sys_futimesat, 3)
1802 MIPS_SYS(sys_fstatat64, 4)
1803 MIPS_SYS(sys_unlinkat, 3)
1804 MIPS_SYS(sys_renameat, 4) /* 4295 */
1805 MIPS_SYS(sys_linkat, 5)
1806 MIPS_SYS(sys_symlinkat, 3)
1807 MIPS_SYS(sys_readlinkat, 4)
1808 MIPS_SYS(sys_fchmodat, 3)
1809 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1810 MIPS_SYS(sys_pselect6, 6)
1811 MIPS_SYS(sys_ppoll, 5)
1812 MIPS_SYS(sys_unshare, 1)
1813 MIPS_SYS(sys_splice, 4)
1814 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1815 MIPS_SYS(sys_tee, 4)
1816 MIPS_SYS(sys_vmsplice, 4)
1817 MIPS_SYS(sys_move_pages, 6)
1818 MIPS_SYS(sys_set_robust_list, 2)
1819 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1820 MIPS_SYS(sys_kexec_load, 4)
1821 MIPS_SYS(sys_getcpu, 3)
1822 MIPS_SYS(sys_epoll_pwait, 6)
1823 MIPS_SYS(sys_ioprio_set, 3)
1824 MIPS_SYS(sys_ioprio_get, 2)
1829 void cpu_loop(CPUMIPSState *env)
1831 target_siginfo_t info;
1833 unsigned int syscall_num;
1836 trapnr = cpu_mips_exec(env);
1839 syscall_num = env->active_tc.gpr[2] - 4000;
1840 env->active_tc.PC += 4;
1841 if (syscall_num >= sizeof(mips_syscall_args)) {
1846 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1848 nb_args = mips_syscall_args[syscall_num];
1849 sp_reg = env->active_tc.gpr[29];
1851 /* these arguments are taken from the stack */
1852 /* FIXME - what to do if get_user() fails? */
1853 case 8: get_user_ual(arg8, sp_reg + 28);
1854 case 7: get_user_ual(arg7, sp_reg + 24);
1855 case 6: get_user_ual(arg6, sp_reg + 20);
1856 case 5: get_user_ual(arg5, sp_reg + 16);
1860 ret = do_syscall(env, env->active_tc.gpr[2],
1861 env->active_tc.gpr[4],
1862 env->active_tc.gpr[5],
1863 env->active_tc.gpr[6],
1864 env->active_tc.gpr[7],
1865 arg5, arg6/*, arg7, arg8*/);
1867 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1868 env->active_tc.gpr[7] = 1; /* error flag */
1871 env->active_tc.gpr[7] = 0; /* error flag */
1873 env->active_tc.gpr[2] = ret;
1879 info.si_signo = TARGET_SIGILL;
1882 queue_signal(env, info.si_signo, &info);
1884 case EXCP_INTERRUPT:
1885 /* just indicate that signals should be handled asap */
1891 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1894 info.si_signo = sig;
1896 info.si_code = TARGET_TRAP_BRKPT;
1897 queue_signal(env, info.si_signo, &info);
1903 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1905 cpu_dump_state(env, stderr, fprintf, 0);
1908 process_pending_signals(env);
1914 void cpu_loop (CPUState *env)
1917 target_siginfo_t info;
1920 trapnr = cpu_sh4_exec (env);
1925 ret = do_syscall(env,
1933 env->gregs[0] = ret;
1935 case EXCP_INTERRUPT:
1936 /* just indicate that signals should be handled asap */
1942 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1945 info.si_signo = sig;
1947 info.si_code = TARGET_TRAP_BRKPT;
1948 queue_signal(env, info.si_signo, &info);
1954 info.si_signo = SIGSEGV;
1956 info.si_code = TARGET_SEGV_MAPERR;
1957 info._sifields._sigfault._addr = env->tea;
1958 queue_signal(env, info.si_signo, &info);
1962 printf ("Unhandled trap: 0x%x\n", trapnr);
1963 cpu_dump_state(env, stderr, fprintf, 0);
1966 process_pending_signals (env);
1972 void cpu_loop (CPUState *env)
1975 target_siginfo_t info;
1978 trapnr = cpu_cris_exec (env);
1982 info.si_signo = SIGSEGV;
1984 /* XXX: check env->error_code */
1985 info.si_code = TARGET_SEGV_MAPERR;
1986 info._sifields._sigfault._addr = env->pregs[PR_EDA];
1987 queue_signal(env, info.si_signo, &info);
1990 case EXCP_INTERRUPT:
1991 /* just indicate that signals should be handled asap */
1994 ret = do_syscall(env,
2002 env->regs[10] = ret;
2008 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2011 info.si_signo = sig;
2013 info.si_code = TARGET_TRAP_BRKPT;
2014 queue_signal(env, info.si_signo, &info);
2019 printf ("Unhandled trap: 0x%x\n", trapnr);
2020 cpu_dump_state(env, stderr, fprintf, 0);
2023 process_pending_signals (env);
2030 void cpu_loop(CPUM68KState *env)
2034 target_siginfo_t info;
2035 TaskState *ts = env->opaque;
2038 trapnr = cpu_m68k_exec(env);
2042 if (ts->sim_syscalls) {
2044 nr = lduw(env->pc + 2);
2046 do_m68k_simcall(env, nr);
2052 case EXCP_HALT_INSN:
2053 /* Semihosing syscall. */
2055 do_m68k_semihosting(env, env->dregs[0]);
2059 case EXCP_UNSUPPORTED:
2061 info.si_signo = SIGILL;
2063 info.si_code = TARGET_ILL_ILLOPN;
2064 info._sifields._sigfault._addr = env->pc;
2065 queue_signal(env, info.si_signo, &info);
2069 ts->sim_syscalls = 0;
2072 env->dregs[0] = do_syscall(env,
2082 case EXCP_INTERRUPT:
2083 /* just indicate that signals should be handled asap */
2087 info.si_signo = SIGSEGV;
2089 /* XXX: check env->error_code */
2090 info.si_code = TARGET_SEGV_MAPERR;
2091 info._sifields._sigfault._addr = env->mmu.ar;
2092 queue_signal(env, info.si_signo, &info);
2099 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2102 info.si_signo = sig;
2104 info.si_code = TARGET_TRAP_BRKPT;
2105 queue_signal(env, info.si_signo, &info);
2110 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2112 cpu_dump_state(env, stderr, fprintf, 0);
2115 process_pending_signals(env);
2118 #endif /* TARGET_M68K */
2121 void cpu_loop (CPUState *env)
2124 target_siginfo_t info;
2127 trapnr = cpu_alpha_exec (env);
2131 fprintf(stderr, "Reset requested. Exit\n");
2135 fprintf(stderr, "Machine check exception. Exit\n");
2139 fprintf(stderr, "Arithmetic trap.\n");
2142 case EXCP_HW_INTERRUPT:
2143 fprintf(stderr, "External interrupt. Exit\n");
2147 fprintf(stderr, "MMU data fault\n");
2150 case EXCP_DTB_MISS_PAL:
2151 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2155 fprintf(stderr, "MMU instruction TLB miss\n");
2159 fprintf(stderr, "MMU instruction access violation\n");
2162 case EXCP_DTB_MISS_NATIVE:
2163 fprintf(stderr, "MMU data TLB miss\n");
2167 fprintf(stderr, "Unaligned access\n");
2171 fprintf(stderr, "Invalid instruction\n");
2175 fprintf(stderr, "Floating-point not allowed\n");
2178 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2179 call_pal(env, (trapnr >> 6) | 0x80);
2181 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2182 fprintf(stderr, "Privileged call to PALcode\n");
2189 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2192 info.si_signo = sig;
2194 info.si_code = TARGET_TRAP_BRKPT;
2195 queue_signal(env, info.si_signo, &info);
2200 printf ("Unhandled trap: 0x%x\n", trapnr);
2201 cpu_dump_state(env, stderr, fprintf, 0);
2204 process_pending_signals (env);
2207 #endif /* TARGET_ALPHA */
2209 static void usage(void)
2211 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2212 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2213 "Linux CPU emulator (compiled for %s emulation)\n"
2215 "Standard options:\n"
2216 "-h print this help\n"
2217 "-g port wait gdb connection to port\n"
2218 "-L path set the elf interpreter prefix (default=%s)\n"
2219 "-s size set the stack size in bytes (default=%ld)\n"
2220 "-cpu model select CPU (-cpu ? for list)\n"
2221 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2222 "-E var=value sets/modifies targets environment variable(s)\n"
2223 "-U var unsets targets environment variable(s)\n"
2224 "-0 argv0 forces target process argv[0] to be argv0\n"
2225 #if defined(CONFIG_USE_GUEST_BASE)
2226 "-B address set guest_base address to address\n"
2230 "-d options activate log (logfile=%s)\n"
2231 "-p pagesize set the host page size to 'pagesize'\n"
2232 "-singlestep always run in singlestep mode\n"
2233 "-strace log system calls\n"
2235 "Environment variables:\n"
2236 "QEMU_STRACE Print system calls and arguments similar to the\n"
2237 " 'strace' program. Enable by setting to any value.\n"
2239 "You can use -E and -U options to set/unset environment variables\n"
2240 "for target process. It is possible to provide several variables\n"
2241 "by repeating the option. For example:\n"
2242 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2243 "Note that if you provide several changes to single variable\n"
2244 "last change will stay in effect.\n"
2245 #if defined(CONFIG_USE_GUEST_BASE)
2247 "You can use -B option to load target binary into different\n"
2248 "address that is specified in elf headers. This can be useful\n"
2249 "when target binary would be loaded to low addresses and\n"
2250 "/proc/sys/vm/mmap_min_addr is set to higher. For example\n"
2251 " qemu-" TARGET_ARCH " -B 0x100000 ...\n"
2252 "loads target binary starting from the first meg.\n"
2262 THREAD CPUState *thread_env;
2264 void task_settid(TaskState *ts)
2266 if (ts->ts_tid == 0) {
2268 ts->ts_tid = (pid_t)syscall(SYS_gettid);
2270 /* when no threads are used, tid becomes pid */
2271 ts->ts_tid = getpid();
2276 void stop_all_tasks(void)
2279 * We trust that when using NPTL, start_exclusive()
2280 * handles thread stopping correctly. Note that there
2281 * is no way out of this state as we don't provide
2282 * any suspend routine.
2287 /* Assumes contents are already zeroed. */
2288 void init_task_state(TaskState *ts)
2293 ts->first_free = ts->sigqueue_table;
2294 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2295 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2297 ts->sigqueue_table[i].next = NULL;
2300 int main(int argc, char **argv, char **envp)
2302 const char *filename = NULL;
2303 const char *cpu_model;
2304 struct target_pt_regs regs1, *regs = ®s1;
2305 struct image_info info1, *info = &info1;
2306 struct linux_binprm bprm;
2307 TaskState ts1, *ts = &ts1;
2311 int gdbstub_port = 0;
2312 char **target_environ, **wrk;
2315 int drop_ld_preload = 0;
2316 envlist_t *envlist = NULL;
2317 const char *argv0 = NULL;
2324 qemu_cache_utils_init(envp);
2327 cpu_set_log_filename(DEBUG_LOGFILE);
2329 if ((envlist = envlist_create()) == NULL) {
2330 (void) fprintf(stderr, "Unable to allocate envlist\n");
2334 /* add current environment into the list */
2335 for (wrk = environ; *wrk != NULL; wrk++) {
2336 (void) envlist_setenv(envlist, *wrk);
2349 if (!strcmp(r, "-")) {
2351 } else if (!strcmp(r, "d")) {
2353 const CPULogItem *item;
2359 mask = cpu_str_to_log_mask(r);
2361 printf("Log items (comma separated):\n");
2362 for(item = cpu_log_items; item->mask != 0; item++) {
2363 printf("%-10s %s\n", item->name, item->help);
2368 } else if (!strcmp(r, "E")) {
2370 if (envlist_setenv(envlist, r) != 0)
2372 } else if (!strcmp(r, "U")) {
2374 if (envlist_unsetenv(envlist, r) != 0)
2376 } else if (!strcmp(r, "0")) {
2379 } else if (!strcmp(r,"-sbox-call")) {
2381 } else if (!strcmp(r, "s")) {
2385 x86_stack_size = strtol(r, (char **)&r, 0);
2386 if (x86_stack_size <= 0)
2389 x86_stack_size *= 1024 * 1024;
2390 else if (*r == 'k' || *r == 'K')
2391 x86_stack_size *= 1024;
2392 } else if (!strcmp(r, "L")) {
2393 interp_prefix = argv[optind++];
2394 } else if (!strcmp(r, "p")) {
2397 qemu_host_page_size = atoi(argv[optind++]);
2398 if (qemu_host_page_size == 0 ||
2399 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2400 fprintf(stderr, "page size must be a power of two\n");
2403 } else if (!strcmp(r, "g")) {
2406 gdbstub_port = atoi(argv[optind++]);
2407 } else if (!strcmp(r, "r")) {
2408 qemu_uname_release = argv[optind++];
2409 } else if (!strcmp(r, "cpu")) {
2410 cpu_model = argv[optind++];
2411 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
2412 /* XXX: implement xxx_cpu_list for targets that still miss it */
2413 #if defined(cpu_list)
2414 cpu_list(stdout, &fprintf);
2418 #if defined(CONFIG_USE_GUEST_BASE)
2419 } else if (!strcmp(r, "B")) {
2420 guest_base = strtol(argv[optind++], NULL, 0);
2422 } else if (!strcmp(r, "drop-ld-preload")) {
2423 drop_ld_preload = 1;
2424 } else if (!strcmp(r, "keep-ld-preload")) {
2425 drop_ld_preload = 0;
2426 } else if (!strcmp(r, "singlestep")) {
2428 } else if (!strcmp(r, "strace")) {
2437 if (filename == NULL) {
2438 filename = argv[optind];
2439 exec_path = argv[optind];
2441 argv0 = argv[optind];
2443 if (drop_ld_preload) {
2444 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
2448 memset(regs, 0, sizeof(struct target_pt_regs));
2450 /* Zero out image_info */
2451 memset(info, 0, sizeof(struct image_info));
2453 memset(&bprm, 0, sizeof (bprm));
2455 /* Scan interp_prefix dir for replacement files. */
2456 init_paths(interp_prefix);
2458 if (cpu_model == NULL) {
2459 #if defined(TARGET_I386)
2460 #ifdef TARGET_X86_64
2461 cpu_model = "qemu64";
2463 cpu_model = "qemu32";
2465 #elif defined(TARGET_ARM)
2467 #elif defined(TARGET_M68K)
2469 #elif defined(TARGET_SPARC)
2470 #ifdef TARGET_SPARC64
2471 cpu_model = "TI UltraSparc II";
2473 cpu_model = "Fujitsu MB86904";
2475 #elif defined(TARGET_MIPS)
2476 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2481 #elif defined(TARGET_PPC)
2491 cpu_exec_init_all(0);
2492 /* NOTE: we need to init the CPU at this stage to get
2493 qemu_host_page_size */
2494 env = cpu_init(cpu_model);
2496 fprintf(stderr, "Unable to find CPU definition\n");
2501 if (getenv("QEMU_STRACE")) {
2505 target_environ = envlist_to_environ(envlist, NULL);
2506 envlist_free(envlist);
2508 #if defined(CONFIG_USE_GUEST_BASE)
2510 * Now that page sizes are configured in cpu_init() we can do
2511 * proper page alignment for guest_base.
2513 guest_base = HOST_PAGE_ALIGN(guest_base);
2516 * Read in mmap_min_addr kernel parameter and check
2517 * whether it is set to some value > 0. This value is used
2518 * later on when doing mmap(2)s to calculate where guest_base
2519 * is to set, if needed.
2521 * When user has explicitly set the quest base, we skip this
2524 if (guest_base == 0) {
2527 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
2529 if (fscanf(fp, "%lu", &tmp) == 1) {
2530 mmap_min_addr = tmp;
2531 qemu_log("kernel mmap_min_addr=%lu\n", mmap_min_addr);
2536 #endif /* CONFIG_USE_GUEST_BASE */
2539 * Prepare copy of argv vector for target.
2541 target_argc = argc - optind;
2542 target_argv = calloc(target_argc + 1, sizeof (char *));
2543 if (target_argv == NULL) {
2544 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
2549 * If argv0 is specified (using '-0' switch) we replace
2550 * argv[0] pointer with the given one.
2553 if (argv0 != NULL) {
2554 target_argv[i++] = strdup(argv0);
2556 for (; i < target_argc; i++) {
2557 target_argv[i] = strdup(argv[optind + i]);
2559 target_argv[target_argc] = NULL;
2561 memset(ts, 0, sizeof(TaskState));
2562 init_task_state(ts);
2563 /* build Task State */
2569 if (loader_exec(filename, target_argv+argskip, target_environ, regs,
2570 info, &bprm) != 0) {
2571 printf("Error loading %s\n", filename);
2575 for (i = 0; i < target_argc; i++) {
2576 free(target_argv[i]);
2580 for (wrk = target_environ; *wrk; wrk++) {
2584 free(target_environ);
2586 if (qemu_log_enabled()) {
2587 #if defined(CONFIG_USE_GUEST_BASE)
2588 if (guest_base > 0) {
2589 qemu_log("guest_base is set to 0x%lx\n", guest_base);
2591 "==========================================================\n"
2592 "Note that all target addresses below are given in target\n"
2593 "address space which is different from host by guest_base.\n"
2594 "For example: target address 0x%x becomes 0x%x and so on.\n"
2595 "==========================================================\n",
2596 (uintptr_t)0x8000, (uintptr_t)g2h(0x8000));
2601 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2602 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2603 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
2605 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
2607 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2608 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
2610 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2611 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2614 target_set_brk(info->brk);
2618 #if defined(TARGET_I386)
2619 cpu_x86_set_cpl(env, 3);
2621 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2622 env->hflags |= HF_PE_MASK;
2623 if (env->cpuid_features & CPUID_SSE) {
2624 env->cr[4] |= CR4_OSFXSR_MASK;
2625 env->hflags |= HF_OSFXSR_MASK;
2627 #ifndef TARGET_ABI32
2628 /* enable 64 bit mode if possible */
2629 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2630 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2633 env->cr[4] |= CR4_PAE_MASK;
2634 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2635 env->hflags |= HF_LMA_MASK;
2638 /* flags setup : we activate the IRQs by default as in user mode */
2639 env->eflags |= IF_MASK;
2641 /* linux register setup */
2642 #ifndef TARGET_ABI32
2643 env->regs[R_EAX] = regs->rax;
2644 env->regs[R_EBX] = regs->rbx;
2645 env->regs[R_ECX] = regs->rcx;
2646 env->regs[R_EDX] = regs->rdx;
2647 env->regs[R_ESI] = regs->rsi;
2648 env->regs[R_EDI] = regs->rdi;
2649 env->regs[R_EBP] = regs->rbp;
2650 env->regs[R_ESP] = regs->rsp;
2651 env->eip = regs->rip;
2653 env->regs[R_EAX] = regs->eax;
2654 env->regs[R_EBX] = regs->ebx;
2655 env->regs[R_ECX] = regs->ecx;
2656 env->regs[R_EDX] = regs->edx;
2657 env->regs[R_ESI] = regs->esi;
2658 env->regs[R_EDI] = regs->edi;
2659 env->regs[R_EBP] = regs->ebp;
2660 env->regs[R_ESP] = regs->esp;
2661 env->eip = regs->eip;
2664 /* linux interrupt setup */
2665 #ifndef TARGET_ABI32
2666 env->idt.limit = 511;
2668 env->idt.limit = 255;
2670 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
2671 PROT_READ|PROT_WRITE,
2672 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2673 idt_table = g2h(env->idt.base);
2696 /* linux segment setup */
2698 uint64_t *gdt_table;
2699 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
2700 PROT_READ|PROT_WRITE,
2701 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2702 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2703 gdt_table = g2h(env->gdt.base);
2705 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2706 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2707 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2709 /* 64 bit code segment */
2710 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2711 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2713 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2715 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2716 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2717 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2719 cpu_x86_load_seg(env, R_CS, __USER_CS);
2720 cpu_x86_load_seg(env, R_SS, __USER_DS);
2722 cpu_x86_load_seg(env, R_DS, __USER_DS);
2723 cpu_x86_load_seg(env, R_ES, __USER_DS);
2724 cpu_x86_load_seg(env, R_FS, __USER_DS);
2725 cpu_x86_load_seg(env, R_GS, __USER_DS);
2726 /* This hack makes Wine work... */
2727 env->segs[R_FS].selector = 0;
2729 cpu_x86_load_seg(env, R_DS, 0);
2730 cpu_x86_load_seg(env, R_ES, 0);
2731 cpu_x86_load_seg(env, R_FS, 0);
2732 cpu_x86_load_seg(env, R_GS, 0);
2734 #elif defined(TARGET_ARM)
2737 cpsr_write(env, regs->uregs[16], 0xffffffff);
2738 for(i = 0; i < 16; i++) {
2739 env->regs[i] = regs->uregs[i];
2742 #elif defined(TARGET_SPARC)
2746 env->npc = regs->npc;
2748 for(i = 0; i < 8; i++)
2749 env->gregs[i] = regs->u_regs[i];
2750 for(i = 0; i < 8; i++)
2751 env->regwptr[i] = regs->u_regs[i + 8];
2753 #elif defined(TARGET_PPC)
2757 #if defined(TARGET_PPC64)
2758 #if defined(TARGET_ABI32)
2759 env->msr &= ~((target_ulong)1 << MSR_SF);
2761 env->msr |= (target_ulong)1 << MSR_SF;
2764 env->nip = regs->nip;
2765 for(i = 0; i < 32; i++) {
2766 env->gpr[i] = regs->gpr[i];
2769 #elif defined(TARGET_M68K)
2772 env->dregs[0] = regs->d0;
2773 env->dregs[1] = regs->d1;
2774 env->dregs[2] = regs->d2;
2775 env->dregs[3] = regs->d3;
2776 env->dregs[4] = regs->d4;
2777 env->dregs[5] = regs->d5;
2778 env->dregs[6] = regs->d6;
2779 env->dregs[7] = regs->d7;
2780 env->aregs[0] = regs->a0;
2781 env->aregs[1] = regs->a1;
2782 env->aregs[2] = regs->a2;
2783 env->aregs[3] = regs->a3;
2784 env->aregs[4] = regs->a4;
2785 env->aregs[5] = regs->a5;
2786 env->aregs[6] = regs->a6;
2787 env->aregs[7] = regs->usp;
2789 ts->sim_syscalls = 1;
2791 #elif defined(TARGET_MIPS)
2795 for(i = 0; i < 32; i++) {
2796 env->active_tc.gpr[i] = regs->regs[i];
2798 env->active_tc.PC = regs->cp0_epc;
2800 #elif defined(TARGET_SH4)
2804 for(i = 0; i < 16; i++) {
2805 env->gregs[i] = regs->regs[i];
2809 #elif defined(TARGET_ALPHA)
2813 for(i = 0; i < 28; i++) {
2814 env->ir[i] = ((abi_ulong *)regs)[i];
2816 env->ipr[IPR_USP] = regs->usp;
2817 env->ir[30] = regs->usp;
2819 env->unique = regs->unique;
2821 #elif defined(TARGET_CRIS)
2823 env->regs[0] = regs->r0;
2824 env->regs[1] = regs->r1;
2825 env->regs[2] = regs->r2;
2826 env->regs[3] = regs->r3;
2827 env->regs[4] = regs->r4;
2828 env->regs[5] = regs->r5;
2829 env->regs[6] = regs->r6;
2830 env->regs[7] = regs->r7;
2831 env->regs[8] = regs->r8;
2832 env->regs[9] = regs->r9;
2833 env->regs[10] = regs->r10;
2834 env->regs[11] = regs->r11;
2835 env->regs[12] = regs->r12;
2836 env->regs[13] = regs->r13;
2837 env->regs[14] = info->start_stack;
2838 env->regs[15] = regs->acr;
2839 env->pc = regs->erp;
2842 #error unsupported target CPU
2845 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2846 ts->stack_base = info->start_stack;
2847 ts->heap_base = info->brk;
2848 /* This will be filled in on the first SYS_HEAPINFO call. */
2853 gdbserver_start (gdbstub_port);
2854 gdb_handlesig(env, 0);