7 #define regA R11 //format : 0xhhll0000 or 0xll000000
8 #define rstatus R4 //format : 0xff800000
9 #define regDBank R4 //format : 0x000000ll
10 #define regX R5 //format : 0xhhll0000 or 0xll000000
11 #define regY R6 //format : 0xhhll0000 or 0xll000000
13 #define rpc R7 //32bits address
14 #define regD R8 //format : 0xhhll0000
15 #define regPBank R8 //format : 0x000000ll
16 #define regCycles R9 //32bits counter
17 #define regS R10 //format : 0x0000hhll
19 #define rscratch R0 //format : 0xhhll0000 if data and calculation or return of S9XREADBYTE or WORD
20 #define regopcode R0 //format : 0x000000ll
21 #define rscratch2 R1 //format : 0xhhll for calculation and value
22 #define rscratch3 R2 //
23 #define rscratch4 R3 //??????
26 #define rscratch5 R5 //??????
27 #define rscratch6 R6 //??????
28 #define rscratch7 R8 //??????
29 #define rscratch8 R9 //??????
30 #define rscratch9 R10 //??????
32 #define regpcbase R12 //32bits address
39 //R13 //Pointer 32 bit on a struct.
52 #define Emulation 256*/
54 #define STATUS_SHIFTER 24
55 #define MASK_EMUL (1<<(STATUS_SHIFTER-1))
56 #define MASK_SHIFTER_CARRY (STATUS_SHIFTER+1)
57 #define MASK_CARRY (1<<(STATUS_SHIFTER)) //0
58 #define MASK_ZERO (2<<(STATUS_SHIFTER)) //1
59 #define MASK_IRQ (4<<(STATUS_SHIFTER)) //2
60 #define MASK_DECIMAL (8<<(STATUS_SHIFTER)) //3
61 #define MASK_INDEX (16<<(STATUS_SHIFTER)) //4 //1
62 #define MASK_MEM (32<<(STATUS_SHIFTER)) //5 //2
63 #define MASK_OVERFLOW (64<<(STATUS_SHIFTER)) //6 //4
64 #define MASK_NEG (128<<(STATUS_SHIFTER))//7 //8
67 #define SLOW_ONE_CYCLE 8
69 #define NMI_FLAG (1 << 7)
70 #define IRQ_PENDING_FLAG (1 << 11)
71 #define SCAN_KEYS_FLAG (1 << 4)
74 #define MEMMAP_BLOCK_SIZE (0x1000)
75 #define MEMMAP_SHIFT 12
76 #define MEMMAP_MASK (0xFFF)