2 * Alpha emulation cpu micro-operations helpers for qemu.
4 * Copyright (c) 2007 Jocelyn Mayer
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include "softfloat.h"
24 #include "op_helper.h"
26 #define MEMSUFFIX _raw
27 #include "op_helper_mem.h"
29 #if !defined(CONFIG_USER_ONLY)
30 #define MEMSUFFIX _kernel
31 #include "op_helper_mem.h"
33 #define MEMSUFFIX _executive
34 #include "op_helper_mem.h"
36 #define MEMSUFFIX _supervisor
37 #include "op_helper_mem.h"
39 #define MEMSUFFIX _user
40 #include "op_helper_mem.h"
42 /* This is used for pal modes */
43 #define MEMSUFFIX _data
44 #include "op_helper_mem.h"
47 void helper_tb_flush (void)
52 void cpu_dump_EA (target_ulong EA);
53 void helper_print_mem_EA (target_ulong EA)
58 /*****************************************************************************/
59 /* Exceptions processing helpers */
60 void helper_excp (uint32_t excp, uint32_t error)
62 env->exception_index = excp;
63 env->error_code = error;
67 void helper_amask (void)
69 switch (env->implver) {
71 /* EV4, EV45, LCA, LCA45 & EV5 */
81 void helper_load_pcc (void)
87 void helper_load_implver (void)
92 void helper_load_fpcr (void)
95 #ifdef CONFIG_SOFTFLOAT
96 T0 |= env->fp_status.float_exception_flags << 52;
97 if (env->fp_status.float_exception_flags)
99 env->ipr[IPR_EXC_SUM] &= ~0x3E:
100 env->ipr[IPR_EXC_SUM] |= env->fp_status.float_exception_flags << 1;
102 switch (env->fp_status.float_rounding_mode) {
103 case float_round_nearest_even:
106 case float_round_down:
112 case float_round_to_zero:
117 void helper_store_fpcr (void)
119 #ifdef CONFIG_SOFTFLOAT
120 set_float_exception_flags((T0 >> 52) & 0x3F, &FP_STATUS);
122 switch ((T0 >> 58) & 3) {
124 set_float_rounding_mode(float_round_to_zero, &FP_STATUS);
127 set_float_rounding_mode(float_round_down, &FP_STATUS);
130 set_float_rounding_mode(float_round_nearest_even, &FP_STATUS);
133 set_float_rounding_mode(float_round_up, &FP_STATUS);
138 void helper_load_irf (void)
144 void helper_set_irf (void)
149 void helper_clear_irf (void)
154 void helper_addqv (void)
158 if (unlikely((T2 ^ T1 ^ (-1ULL)) & (T2 ^ T0) & (1ULL << 63))) {
159 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
163 void helper_addlv (void)
166 T0 = (uint32_t)(T0 + T1);
167 if (unlikely((T2 ^ T1 ^ (-1UL)) & (T2 ^ T0) & (1UL << 31))) {
168 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
172 void helper_subqv (void)
176 if (unlikely(((~T2) ^ T0 ^ (-1ULL)) & ((~T2) ^ T1) & (1ULL << 63))) {
177 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
181 void helper_sublv (void)
184 T0 = (uint32_t)(T0 - T1);
185 if (unlikely(((~T2) ^ T0 ^ (-1UL)) & ((~T2) ^ T1) & (1UL << 31))) {
186 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
190 void helper_mullv (void)
192 int64_t res = (int64_t)T0 * (int64_t)T1;
194 if (unlikely((int32_t)res != res)) {
195 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
197 T0 = (int64_t)((int32_t)res);
202 uint64_t res, tmp0, tmp1;
204 res = (T0 >> 32) * (T1 >> 32);
205 tmp0 = ((T0 & 0xFFFFFFFF) * (T1 >> 32)) +
206 ((T0 >> 32) * (T1 & 0xFFFFFFFF));
207 tmp1 = (T0 & 0xFFFFFFFF) * (T1 & 0xFFFFFFFF);
211 if (unlikely(res != 0)) {
212 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
216 void helper_umulh (void)
220 tmp0 = ((T0 & 0xFFFFFFFF) * (T1 >> 32)) +
221 ((T0 >> 32) * (T1 & 0xFFFFFFFF));
222 tmp1 = (T0 & 0xFFFFFFFF) * (T1 & 0xFFFFFFFF);
224 T0 = (T0 >> 32) * (T0 >> 32);
228 void helper_ctpop (void)
232 for (n = 0; T0 != 0; n++)
237 void helper_ctlz (void)
243 if (!(T0 & 0xFFFFFFFF00000000ULL)) {
247 /* Make it easier for 32 bits hosts */
249 if (!(op32 & 0xFFFF0000UL)) {
253 if (!(op32 & 0xFF000000UL)) {
257 if (!(op32 & 0xF0000000UL)) {
261 if (!(op32 & 0xC0000000UL)) {
265 if (!(op32 & 0x80000000UL)) {
269 if (!(op32 & 0x80000000UL)) {
275 void helper_cttz (void)
281 if (!(T0 & 0x00000000FFFFFFFFULL)) {
285 /* Make it easier for 32 bits hosts */
287 if (!(op32 & 0x0000FFFFUL)) {
291 if (!(op32 & 0x000000FFUL)) {
295 if (!(op32 & 0x0000000FUL)) {
299 if (!(op32 & 0x00000003UL)) {
303 if (!(op32 & 0x00000001UL)) {
307 if (!(op32 & 0x00000001UL)) {
313 static inline uint64_t byte_zap (uint64_t op, uint8_t mskb)
318 mask |= ((mskb >> 0) & 1) * 0x00000000000000FFULL;
319 mask |= ((mskb >> 1) & 1) * 0x000000000000FF00ULL;
320 mask |= ((mskb >> 2) & 1) * 0x0000000000FF0000ULL;
321 mask |= ((mskb >> 3) & 1) * 0x00000000FF000000ULL;
322 mask |= ((mskb >> 4) & 1) * 0x000000FF00000000ULL;
323 mask |= ((mskb >> 5) & 1) * 0x0000FF0000000000ULL;
324 mask |= ((mskb >> 6) & 1) * 0x00FF000000000000ULL;
325 mask |= ((mskb >> 7) & 1) * 0xFF00000000000000ULL;
330 void helper_mskbl (void)
332 T0 = byte_zap(T0, 0x01 << (T1 & 7));
335 void helper_extbl (void)
338 T0 = byte_zap(T0, 0xFE);
341 void helper_insbl (void)
344 T0 = byte_zap(T0, ~(0x01 << (T1 & 7)));
347 void helper_mskwl (void)
349 T0 = byte_zap(T0, 0x03 << (T1 & 7));
352 void helper_extwl (void)
355 T0 = byte_zap(T0, 0xFC);
358 void helper_inswl (void)
361 T0 = byte_zap(T0, ~(0x03 << (T1 & 7)));
364 void helper_mskll (void)
366 T0 = byte_zap(T0, 0x0F << (T1 & 7));
369 void helper_extll (void)
372 T0 = byte_zap(T0, 0xF0);
375 void helper_insll (void)
378 T0 = byte_zap(T0, ~(0x0F << (T1 & 7)));
381 void helper_zap (void)
383 T0 = byte_zap(T0, T1);
386 void helper_zapnot (void)
388 T0 = byte_zap(T0, ~T1);
391 void helper_mskql (void)
393 T0 = byte_zap(T0, 0xFF << (T1 & 7));
396 void helper_extql (void)
399 T0 = byte_zap(T0, 0x00);
402 void helper_insql (void)
405 T0 = byte_zap(T0, ~(0xFF << (T1 & 7)));
408 void helper_mskwh (void)
410 T0 = byte_zap(T0, (0x03 << (T1 & 7)) >> 8);
413 void helper_inswh (void)
415 T0 >>= 64 - ((T1 & 7) * 8);
416 T0 = byte_zap(T0, ~((0x03 << (T1 & 7)) >> 8));
419 void helper_extwh (void)
421 T0 <<= 64 - ((T1 & 7) * 8);
422 T0 = byte_zap(T0, ~0x07);
425 void helper_msklh (void)
427 T0 = byte_zap(T0, (0x0F << (T1 & 7)) >> 8);
430 void helper_inslh (void)
432 T0 >>= 64 - ((T1 & 7) * 8);
433 T0 = byte_zap(T0, ~((0x0F << (T1 & 7)) >> 8));
436 void helper_extlh (void)
438 T0 <<= 64 - ((T1 & 7) * 8);
439 T0 = byte_zap(T0, ~0x0F);
442 void helper_mskqh (void)
444 T0 = byte_zap(T0, (0xFF << (T1 & 7)) >> 8);
447 void helper_insqh (void)
449 T0 >>= 64 - ((T1 & 7) * 8);
450 T0 = byte_zap(T0, ~((0xFF << (T1 & 7)) >> 8));
453 void helper_extqh (void)
455 T0 <<= 64 - ((T1 & 7) * 8);
456 T0 = byte_zap(T0, 0x00);
459 void helper_cmpbge (void)
461 uint8_t opa, opb, res;
465 for (i = 0; i < 7; i++) {
474 void helper_cmov_fir (int freg)
477 env->fir[freg] = FT1;
480 void helper_sqrts (void)
482 FT0 = float32_sqrt(FT0, &FP_STATUS);
485 void helper_cpys (void)
494 r.i = p.i & 0x8000000000000000ULL;
495 r.i |= q.i & ~0x8000000000000000ULL;
499 void helper_cpysn (void)
508 r.i = (~p.i) & 0x8000000000000000ULL;
509 r.i |= q.i & ~0x8000000000000000ULL;
513 void helper_cpyse (void)
522 r.i = p.i & 0xFFF0000000000000ULL;
523 r.i |= q.i & ~0xFFF0000000000000ULL;
527 void helper_itofs (void)
535 FT0 = int64_to_float32(p.i, &FP_STATUS);
538 void helper_ftois (void)
545 p.i = float32_to_int64(FT0, &FP_STATUS);
549 void helper_sqrtt (void)
551 FT0 = float64_sqrt(FT0, &FP_STATUS);
554 void helper_cmptun (void)
562 if (float64_is_nan(FT0) || float64_is_nan(FT1))
563 p.i = 0x4000000000000000ULL;
567 void helper_cmpteq (void)
575 if (float64_eq(FT0, FT1, &FP_STATUS))
576 p.i = 0x4000000000000000ULL;
580 void helper_cmptle (void)
588 if (float64_le(FT0, FT1, &FP_STATUS))
589 p.i = 0x4000000000000000ULL;
593 void helper_cmptlt (void)
601 if (float64_lt(FT0, FT1, &FP_STATUS))
602 p.i = 0x4000000000000000ULL;
606 void helper_itoft (void)
614 FT0 = int64_to_float64(p.i, &FP_STATUS);
617 void helper_ftoit (void)
624 p.i = float64_to_int64(FT0, &FP_STATUS);
628 static int vaxf_is_valid (float ff)
637 exp = (p.i >> 23) & 0xFF;
638 mant = p.i & 0x007FFFFF;
639 if (exp == 0 && ((p.i & 0x80000000) || mant != 0)) {
640 /* Reserved operands / Dirty zero */
647 static float vaxf_to_ieee32 (float ff)
656 exp = (p.i >> 23) & 0xFF;
667 static float ieee32_to_vaxf (float fi)
676 exp = (p.i >> 23) & 0xFF;
677 mant = p.i & 0x007FFFFF;
679 /* NaN or infinity */
681 } else if (exp == 0) {
701 void helper_addf (void)
705 if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
708 ft0 = vaxf_to_ieee32(FT0);
709 ft1 = vaxf_to_ieee32(FT1);
710 ft2 = float32_add(ft0, ft1, &FP_STATUS);
711 FT0 = ieee32_to_vaxf(ft2);
714 void helper_subf (void)
718 if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
721 ft0 = vaxf_to_ieee32(FT0);
722 ft1 = vaxf_to_ieee32(FT1);
723 ft2 = float32_sub(ft0, ft1, &FP_STATUS);
724 FT0 = ieee32_to_vaxf(ft2);
727 void helper_mulf (void)
731 if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
734 ft0 = vaxf_to_ieee32(FT0);
735 ft1 = vaxf_to_ieee32(FT1);
736 ft2 = float32_mul(ft0, ft1, &FP_STATUS);
737 FT0 = ieee32_to_vaxf(ft2);
740 void helper_divf (void)
744 if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
747 ft0 = vaxf_to_ieee32(FT0);
748 ft1 = vaxf_to_ieee32(FT1);
749 ft2 = float32_div(ft0, ft1, &FP_STATUS);
750 FT0 = ieee32_to_vaxf(ft2);
753 void helper_sqrtf (void)
757 if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
760 ft0 = vaxf_to_ieee32(FT0);
761 ft1 = float32_sqrt(ft0, &FP_STATUS);
762 FT0 = ieee32_to_vaxf(ft1);
765 void helper_itoff (void)
770 static int vaxg_is_valid (double ff)
779 exp = (p.i >> 52) & 0x7FF;
780 mant = p.i & 0x000FFFFFFFFFFFFFULL;
781 if (exp == 0 && ((p.i & 0x8000000000000000ULL) || mant != 0)) {
782 /* Reserved operands / Dirty zero */
789 static double vaxg_to_ieee64 (double fg)
798 exp = (p.i >> 52) & 0x7FF;
809 static double ieee64_to_vaxg (double fi)
819 exp = (p.i >> 52) & 0x7FF;
820 mant = p.i & 0x000FFFFFFFFFFFFFULL;
822 /* NaN or infinity */
823 p.i = 1; /* VAX dirty zero */
824 } else if (exp == 0) {
835 p.i = 1; /* VAX dirty zero */
844 void helper_addg (void)
846 double ft0, ft1, ft2;
848 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
851 ft0 = vaxg_to_ieee64(FT0);
852 ft1 = vaxg_to_ieee64(FT1);
853 ft2 = float64_add(ft0, ft1, &FP_STATUS);
854 FT0 = ieee64_to_vaxg(ft2);
857 void helper_subg (void)
859 double ft0, ft1, ft2;
861 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
864 ft0 = vaxg_to_ieee64(FT0);
865 ft1 = vaxg_to_ieee64(FT1);
866 ft2 = float64_sub(ft0, ft1, &FP_STATUS);
867 FT0 = ieee64_to_vaxg(ft2);
870 void helper_mulg (void)
872 double ft0, ft1, ft2;
874 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
877 ft0 = vaxg_to_ieee64(FT0);
878 ft1 = vaxg_to_ieee64(FT1);
879 ft2 = float64_mul(ft0, ft1, &FP_STATUS);
880 FT0 = ieee64_to_vaxg(ft2);
883 void helper_divg (void)
885 double ft0, ft1, ft2;
887 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
890 ft0 = vaxg_to_ieee64(FT0);
891 ft1 = vaxg_to_ieee64(FT1);
892 ft2 = float64_div(ft0, ft1, &FP_STATUS);
893 FT0 = ieee64_to_vaxg(ft2);
896 void helper_sqrtg (void)
900 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
903 ft0 = vaxg_to_ieee64(FT0);
904 ft1 = float64_sqrt(ft0, &FP_STATUS);
905 FT0 = ieee64_to_vaxg(ft1);
908 void helper_cmpgeq (void)
916 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
919 ft0 = vaxg_to_ieee64(FT0);
920 ft1 = vaxg_to_ieee64(FT1);
922 if (float64_eq(ft0, ft1, &FP_STATUS))
923 p.u = 0x4000000000000000ULL;
927 void helper_cmpglt (void)
935 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
938 ft0 = vaxg_to_ieee64(FT0);
939 ft1 = vaxg_to_ieee64(FT1);
941 if (float64_lt(ft0, ft1, &FP_STATUS))
942 p.u = 0x4000000000000000ULL;
946 void helper_cmpgle (void)
954 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
957 ft0 = vaxg_to_ieee64(FT0);
958 ft1 = vaxg_to_ieee64(FT1);
960 if (float64_le(ft0, ft1, &FP_STATUS))
961 p.u = 0x4000000000000000ULL;
965 void helper_cvtqs (void)
976 void helper_cvttq (void)
987 void helper_cvtqt (void)
998 void helper_cvtqf (void)
1006 FT0 = ieee32_to_vaxf(p.u);
1009 void helper_cvtgf (void)
1013 ft0 = vaxg_to_ieee64(FT0);
1014 FT0 = ieee32_to_vaxf(ft0);
1017 void helper_cvtgd (void)
1022 void helper_cvtgq (void)
1029 p.u = vaxg_to_ieee64(FT0);
1033 void helper_cvtqg (void)
1041 FT0 = ieee64_to_vaxg(p.u);
1044 void helper_cvtdg (void)
1049 void helper_cvtlq (void)
1057 q.u = (p.u >> 29) & 0x3FFFFFFF;
1059 q.u = (int64_t)((int32_t)q.u);
1063 static inline void __helper_cvtql (int s, int v)
1071 q.u = ((uint64_t)(p.u & 0xC0000000)) << 32;
1072 q.u |= ((uint64_t)(p.u & 0x7FFFFFFF)) << 29;
1074 if (v && (int64_t)((int32_t)p.u) != (int64_t)p.u) {
1075 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
1082 void helper_cvtql (void)
1084 __helper_cvtql(0, 0);
1087 void helper_cvtqlv (void)
1089 __helper_cvtql(0, 1);
1092 void helper_cvtqlsv (void)
1094 __helper_cvtql(1, 1);
1097 void helper_cmpfeq (void)
1099 if (float64_eq(FT0, FT1, &FP_STATUS))
1105 void helper_cmpfne (void)
1107 if (float64_eq(FT0, FT1, &FP_STATUS))
1113 void helper_cmpflt (void)
1115 if (float64_lt(FT0, FT1, &FP_STATUS))
1121 void helper_cmpfle (void)
1123 if (float64_lt(FT0, FT1, &FP_STATUS))
1129 void helper_cmpfgt (void)
1131 if (float64_le(FT0, FT1, &FP_STATUS))
1137 void helper_cmpfge (void)
1139 if (float64_lt(FT0, FT1, &FP_STATUS))
1145 #if !defined (CONFIG_USER_ONLY)
1146 void helper_mfpr (int iprn)
1150 if (cpu_alpha_mfpr(env, iprn, &val) == 0)
1154 void helper_mtpr (int iprn)
1156 cpu_alpha_mtpr(env, iprn, T0, NULL);
1160 /*****************************************************************************/
1161 /* Softmmu support */
1162 #if !defined (CONFIG_USER_ONLY)
1164 #define GETPC() (__builtin_return_address(0))
1166 /* XXX: the two following helpers are pure hacks.
1167 * Hopefully, we emulate the PALcode, then we should never see
1168 * HW_LD / HW_ST instructions.
1170 void helper_ld_phys_to_virt (void)
1172 uint64_t tlb_addr, physaddr;
1176 mmu_idx = cpu_mmu_index(env);
1177 index = (T0 >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
1179 tlb_addr = env->tlb_table[mmu_idx][index].addr_read;
1180 if ((T0 & TARGET_PAGE_MASK) ==
1181 (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
1182 physaddr = T0 + env->tlb_table[mmu_idx][index].addend;
1184 /* the page is not in the TLB : fill it */
1186 tlb_fill(T0, 0, mmu_idx, retaddr);
1192 void helper_st_phys_to_virt (void)
1194 uint64_t tlb_addr, physaddr;
1198 mmu_idx = cpu_mmu_index(env);
1199 index = (T0 >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
1201 tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
1202 if ((T0 & TARGET_PAGE_MASK) ==
1203 (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
1204 physaddr = T0 + env->tlb_table[mmu_idx][index].addend;
1206 /* the page is not in the TLB : fill it */
1208 tlb_fill(T0, 1, mmu_idx, retaddr);
1214 #define MMUSUFFIX _mmu
1217 #include "softmmu_template.h"
1220 #include "softmmu_template.h"
1223 #include "softmmu_template.h"
1226 #include "softmmu_template.h"
1228 /* try to fill the TLB and return an exception if error. If retaddr is
1229 NULL, it means that the function was called in C code (i.e. not
1230 from generated code or from helper.c) */
1231 /* XXX: fix it to restore all registers */
1232 void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
1234 TranslationBlock *tb;
1235 CPUState *saved_env;
1236 target_phys_addr_t pc;
1239 /* XXX: hack to restore env in all cases, even if not called from
1242 env = cpu_single_env;
1243 ret = cpu_alpha_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
1244 if (!likely(ret == 0)) {
1245 if (likely(retaddr)) {
1246 /* now we have a real cpu fault */
1247 pc = (target_phys_addr_t)retaddr;
1248 tb = tb_find_pc(pc);
1250 /* the PC is inside the translated code. It means that we have
1251 a virtual CPU fault */
1252 cpu_restore_state(tb, env, pc, NULL);
1255 /* Exception index and error code are already set */