2 * Alpha emulation cpu micro-operations helpers for qemu.
4 * Copyright (c) 2007 Jocelyn Mayer
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include "softfloat.h"
24 #include "op_helper.h"
26 #define MEMSUFFIX _raw
27 #include "op_helper_mem.h"
29 #if !defined(CONFIG_USER_ONLY)
30 #define MEMSUFFIX _kernel
31 #include "op_helper_mem.h"
33 #define MEMSUFFIX _executive
34 #include "op_helper_mem.h"
36 #define MEMSUFFIX _supervisor
37 #include "op_helper_mem.h"
39 #define MEMSUFFIX _user
40 #include "op_helper_mem.h"
42 /* This is used for pal modes */
43 #define MEMSUFFIX _data
44 #include "op_helper_mem.h"
47 void helper_tb_flush (void)
52 void cpu_dump_EA (target_ulong EA);
53 void helper_print_mem_EA (target_ulong EA)
58 /*****************************************************************************/
59 /* Exceptions processing helpers */
60 void helper_excp (uint32_t excp, uint32_t error)
62 env->exception_index = excp;
63 env->error_code = error;
67 void helper_amask (void)
69 switch (env->implver) {
71 /* EV4, EV45, LCA, LCA45 & EV5 */
81 void helper_load_pcc (void)
87 void helper_load_implver (void)
92 void helper_load_fpcr (void)
95 #ifdef CONFIG_SOFTFLOAT
96 T0 |= env->fp_status.float_exception_flags << 52;
97 if (env->fp_status.float_exception_flags)
99 env->ipr[IPR_EXC_SUM] &= ~0x3E:
100 env->ipr[IPR_EXC_SUM] |= env->fp_status.float_exception_flags << 1;
102 switch (env->fp_status.float_rounding_mode) {
103 case float_round_nearest_even:
106 case float_round_down:
112 case float_round_to_zero:
117 void helper_store_fpcr (void)
119 #ifdef CONFIG_SOFTFLOAT
120 set_float_exception_flags((T0 >> 52) & 0x3F, &FP_STATUS);
122 switch ((T0 >> 58) & 3) {
124 set_float_rounding_mode(float_round_to_zero, &FP_STATUS);
127 set_float_rounding_mode(float_round_down, &FP_STATUS);
130 set_float_rounding_mode(float_round_nearest_even, &FP_STATUS);
133 set_float_rounding_mode(float_round_up, &FP_STATUS);
138 void helper_load_irf (void)
144 void helper_set_irf (void)
149 void helper_clear_irf (void)
154 void helper_addqv (void)
158 if (unlikely((T2 ^ T1 ^ (-1ULL)) & (T2 ^ T0) & (1ULL << 63))) {
159 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
163 void helper_addlv (void)
166 T0 = (uint32_t)(T0 + T1);
167 if (unlikely((T2 ^ T1 ^ (-1UL)) & (T2 ^ T0) & (1UL << 31))) {
168 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
172 void helper_subqv (void)
176 if (unlikely(((~T2) ^ T0 ^ (-1ULL)) & ((~T2) ^ T1) & (1ULL << 63))) {
177 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
181 void helper_sublv (void)
184 T0 = (uint32_t)(T0 - T1);
185 if (unlikely(((~T2) ^ T0 ^ (-1UL)) & ((~T2) ^ T1) & (1UL << 31))) {
186 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
190 void helper_mullv (void)
192 int64_t res = (int64_t)T0 * (int64_t)T1;
194 if (unlikely((int32_t)res != res)) {
195 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
197 T0 = (int64_t)((int32_t)res);
204 muls64(&tl, &th, T0, T1);
205 /* If th != 0 && th != -1, then we had an overflow */
206 if (unlikely((th + 1) > 1)) {
207 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
212 void helper_ctpop (void)
216 for (n = 0; T0 != 0; n++)
221 void helper_ctlz (void)
227 if (!(T0 & 0xFFFFFFFF00000000ULL)) {
231 /* Make it easier for 32 bits hosts */
233 if (!(op32 & 0xFFFF0000UL)) {
237 if (!(op32 & 0xFF000000UL)) {
241 if (!(op32 & 0xF0000000UL)) {
245 if (!(op32 & 0xC0000000UL)) {
249 if (!(op32 & 0x80000000UL)) {
253 if (!(op32 & 0x80000000UL)) {
259 void helper_cttz (void)
265 if (!(T0 & 0x00000000FFFFFFFFULL)) {
269 /* Make it easier for 32 bits hosts */
271 if (!(op32 & 0x0000FFFFUL)) {
275 if (!(op32 & 0x000000FFUL)) {
279 if (!(op32 & 0x0000000FUL)) {
283 if (!(op32 & 0x00000003UL)) {
287 if (!(op32 & 0x00000001UL)) {
291 if (!(op32 & 0x00000001UL)) {
297 static inline uint64_t byte_zap (uint64_t op, uint8_t mskb)
302 mask |= ((mskb >> 0) & 1) * 0x00000000000000FFULL;
303 mask |= ((mskb >> 1) & 1) * 0x000000000000FF00ULL;
304 mask |= ((mskb >> 2) & 1) * 0x0000000000FF0000ULL;
305 mask |= ((mskb >> 3) & 1) * 0x00000000FF000000ULL;
306 mask |= ((mskb >> 4) & 1) * 0x000000FF00000000ULL;
307 mask |= ((mskb >> 5) & 1) * 0x0000FF0000000000ULL;
308 mask |= ((mskb >> 6) & 1) * 0x00FF000000000000ULL;
309 mask |= ((mskb >> 7) & 1) * 0xFF00000000000000ULL;
314 void helper_mskbl (void)
316 T0 = byte_zap(T0, 0x01 << (T1 & 7));
319 void helper_extbl (void)
322 T0 = byte_zap(T0, 0xFE);
325 void helper_insbl (void)
328 T0 = byte_zap(T0, ~(0x01 << (T1 & 7)));
331 void helper_mskwl (void)
333 T0 = byte_zap(T0, 0x03 << (T1 & 7));
336 void helper_extwl (void)
339 T0 = byte_zap(T0, 0xFC);
342 void helper_inswl (void)
345 T0 = byte_zap(T0, ~(0x03 << (T1 & 7)));
348 void helper_mskll (void)
350 T0 = byte_zap(T0, 0x0F << (T1 & 7));
353 void helper_extll (void)
356 T0 = byte_zap(T0, 0xF0);
359 void helper_insll (void)
362 T0 = byte_zap(T0, ~(0x0F << (T1 & 7)));
365 void helper_zap (void)
367 T0 = byte_zap(T0, T1);
370 void helper_zapnot (void)
372 T0 = byte_zap(T0, ~T1);
375 void helper_mskql (void)
377 T0 = byte_zap(T0, 0xFF << (T1 & 7));
380 void helper_extql (void)
383 T0 = byte_zap(T0, 0x00);
386 void helper_insql (void)
389 T0 = byte_zap(T0, ~(0xFF << (T1 & 7)));
392 void helper_mskwh (void)
394 T0 = byte_zap(T0, (0x03 << (T1 & 7)) >> 8);
397 void helper_inswh (void)
399 T0 >>= 64 - ((T1 & 7) * 8);
400 T0 = byte_zap(T0, ~((0x03 << (T1 & 7)) >> 8));
403 void helper_extwh (void)
405 T0 <<= 64 - ((T1 & 7) * 8);
406 T0 = byte_zap(T0, ~0x07);
409 void helper_msklh (void)
411 T0 = byte_zap(T0, (0x0F << (T1 & 7)) >> 8);
414 void helper_inslh (void)
416 T0 >>= 64 - ((T1 & 7) * 8);
417 T0 = byte_zap(T0, ~((0x0F << (T1 & 7)) >> 8));
420 void helper_extlh (void)
422 T0 <<= 64 - ((T1 & 7) * 8);
423 T0 = byte_zap(T0, ~0x0F);
426 void helper_mskqh (void)
428 T0 = byte_zap(T0, (0xFF << (T1 & 7)) >> 8);
431 void helper_insqh (void)
433 T0 >>= 64 - ((T1 & 7) * 8);
434 T0 = byte_zap(T0, ~((0xFF << (T1 & 7)) >> 8));
437 void helper_extqh (void)
439 T0 <<= 64 - ((T1 & 7) * 8);
440 T0 = byte_zap(T0, 0x00);
443 void helper_cmpbge (void)
445 uint8_t opa, opb, res;
449 for (i = 0; i < 7; i++) {
458 void helper_cmov_fir (int freg)
461 env->fir[freg] = FT1;
464 void helper_sqrts (void)
466 FT0 = float32_sqrt(FT0, &FP_STATUS);
469 void helper_cpys (void)
478 r.i = p.i & 0x8000000000000000ULL;
479 r.i |= q.i & ~0x8000000000000000ULL;
483 void helper_cpysn (void)
492 r.i = (~p.i) & 0x8000000000000000ULL;
493 r.i |= q.i & ~0x8000000000000000ULL;
497 void helper_cpyse (void)
506 r.i = p.i & 0xFFF0000000000000ULL;
507 r.i |= q.i & ~0xFFF0000000000000ULL;
511 void helper_itofs (void)
519 FT0 = int64_to_float32(p.i, &FP_STATUS);
522 void helper_ftois (void)
529 p.i = float32_to_int64(FT0, &FP_STATUS);
533 void helper_sqrtt (void)
535 FT0 = float64_sqrt(FT0, &FP_STATUS);
538 void helper_cmptun (void)
546 if (float64_is_nan(FT0) || float64_is_nan(FT1))
547 p.i = 0x4000000000000000ULL;
551 void helper_cmpteq (void)
559 if (float64_eq(FT0, FT1, &FP_STATUS))
560 p.i = 0x4000000000000000ULL;
564 void helper_cmptle (void)
572 if (float64_le(FT0, FT1, &FP_STATUS))
573 p.i = 0x4000000000000000ULL;
577 void helper_cmptlt (void)
585 if (float64_lt(FT0, FT1, &FP_STATUS))
586 p.i = 0x4000000000000000ULL;
590 void helper_itoft (void)
598 FT0 = int64_to_float64(p.i, &FP_STATUS);
601 void helper_ftoit (void)
608 p.i = float64_to_int64(FT0, &FP_STATUS);
612 static int vaxf_is_valid (float ff)
621 exp = (p.i >> 23) & 0xFF;
622 mant = p.i & 0x007FFFFF;
623 if (exp == 0 && ((p.i & 0x80000000) || mant != 0)) {
624 /* Reserved operands / Dirty zero */
631 static float vaxf_to_ieee32 (float ff)
640 exp = (p.i >> 23) & 0xFF;
651 static float ieee32_to_vaxf (float fi)
660 exp = (p.i >> 23) & 0xFF;
661 mant = p.i & 0x007FFFFF;
663 /* NaN or infinity */
665 } else if (exp == 0) {
685 void helper_addf (void)
689 if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
692 ft0 = vaxf_to_ieee32(FT0);
693 ft1 = vaxf_to_ieee32(FT1);
694 ft2 = float32_add(ft0, ft1, &FP_STATUS);
695 FT0 = ieee32_to_vaxf(ft2);
698 void helper_subf (void)
702 if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
705 ft0 = vaxf_to_ieee32(FT0);
706 ft1 = vaxf_to_ieee32(FT1);
707 ft2 = float32_sub(ft0, ft1, &FP_STATUS);
708 FT0 = ieee32_to_vaxf(ft2);
711 void helper_mulf (void)
715 if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
718 ft0 = vaxf_to_ieee32(FT0);
719 ft1 = vaxf_to_ieee32(FT1);
720 ft2 = float32_mul(ft0, ft1, &FP_STATUS);
721 FT0 = ieee32_to_vaxf(ft2);
724 void helper_divf (void)
728 if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
731 ft0 = vaxf_to_ieee32(FT0);
732 ft1 = vaxf_to_ieee32(FT1);
733 ft2 = float32_div(ft0, ft1, &FP_STATUS);
734 FT0 = ieee32_to_vaxf(ft2);
737 void helper_sqrtf (void)
741 if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
744 ft0 = vaxf_to_ieee32(FT0);
745 ft1 = float32_sqrt(ft0, &FP_STATUS);
746 FT0 = ieee32_to_vaxf(ft1);
749 void helper_itoff (void)
754 static int vaxg_is_valid (double ff)
763 exp = (p.i >> 52) & 0x7FF;
764 mant = p.i & 0x000FFFFFFFFFFFFFULL;
765 if (exp == 0 && ((p.i & 0x8000000000000000ULL) || mant != 0)) {
766 /* Reserved operands / Dirty zero */
773 static double vaxg_to_ieee64 (double fg)
782 exp = (p.i >> 52) & 0x7FF;
793 static double ieee64_to_vaxg (double fi)
803 exp = (p.i >> 52) & 0x7FF;
804 mant = p.i & 0x000FFFFFFFFFFFFFULL;
806 /* NaN or infinity */
807 p.i = 1; /* VAX dirty zero */
808 } else if (exp == 0) {
819 p.i = 1; /* VAX dirty zero */
828 void helper_addg (void)
830 double ft0, ft1, ft2;
832 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
835 ft0 = vaxg_to_ieee64(FT0);
836 ft1 = vaxg_to_ieee64(FT1);
837 ft2 = float64_add(ft0, ft1, &FP_STATUS);
838 FT0 = ieee64_to_vaxg(ft2);
841 void helper_subg (void)
843 double ft0, ft1, ft2;
845 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
848 ft0 = vaxg_to_ieee64(FT0);
849 ft1 = vaxg_to_ieee64(FT1);
850 ft2 = float64_sub(ft0, ft1, &FP_STATUS);
851 FT0 = ieee64_to_vaxg(ft2);
854 void helper_mulg (void)
856 double ft0, ft1, ft2;
858 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
861 ft0 = vaxg_to_ieee64(FT0);
862 ft1 = vaxg_to_ieee64(FT1);
863 ft2 = float64_mul(ft0, ft1, &FP_STATUS);
864 FT0 = ieee64_to_vaxg(ft2);
867 void helper_divg (void)
869 double ft0, ft1, ft2;
871 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
874 ft0 = vaxg_to_ieee64(FT0);
875 ft1 = vaxg_to_ieee64(FT1);
876 ft2 = float64_div(ft0, ft1, &FP_STATUS);
877 FT0 = ieee64_to_vaxg(ft2);
880 void helper_sqrtg (void)
884 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
887 ft0 = vaxg_to_ieee64(FT0);
888 ft1 = float64_sqrt(ft0, &FP_STATUS);
889 FT0 = ieee64_to_vaxg(ft1);
892 void helper_cmpgeq (void)
900 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
903 ft0 = vaxg_to_ieee64(FT0);
904 ft1 = vaxg_to_ieee64(FT1);
906 if (float64_eq(ft0, ft1, &FP_STATUS))
907 p.u = 0x4000000000000000ULL;
911 void helper_cmpglt (void)
919 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
922 ft0 = vaxg_to_ieee64(FT0);
923 ft1 = vaxg_to_ieee64(FT1);
925 if (float64_lt(ft0, ft1, &FP_STATUS))
926 p.u = 0x4000000000000000ULL;
930 void helper_cmpgle (void)
938 if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
941 ft0 = vaxg_to_ieee64(FT0);
942 ft1 = vaxg_to_ieee64(FT1);
944 if (float64_le(ft0, ft1, &FP_STATUS))
945 p.u = 0x4000000000000000ULL;
949 void helper_cvtqs (void)
960 void helper_cvttq (void)
971 void helper_cvtqt (void)
982 void helper_cvtqf (void)
990 FT0 = ieee32_to_vaxf(p.u);
993 void helper_cvtgf (void)
997 ft0 = vaxg_to_ieee64(FT0);
998 FT0 = ieee32_to_vaxf(ft0);
1001 void helper_cvtgd (void)
1006 void helper_cvtgq (void)
1013 p.u = vaxg_to_ieee64(FT0);
1017 void helper_cvtqg (void)
1025 FT0 = ieee64_to_vaxg(p.u);
1028 void helper_cvtdg (void)
1033 void helper_cvtlq (void)
1041 q.u = (p.u >> 29) & 0x3FFFFFFF;
1043 q.u = (int64_t)((int32_t)q.u);
1047 static inline void __helper_cvtql (int s, int v)
1055 q.u = ((uint64_t)(p.u & 0xC0000000)) << 32;
1056 q.u |= ((uint64_t)(p.u & 0x7FFFFFFF)) << 29;
1058 if (v && (int64_t)((int32_t)p.u) != (int64_t)p.u) {
1059 helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
1066 void helper_cvtql (void)
1068 __helper_cvtql(0, 0);
1071 void helper_cvtqlv (void)
1073 __helper_cvtql(0, 1);
1076 void helper_cvtqlsv (void)
1078 __helper_cvtql(1, 1);
1081 void helper_cmpfeq (void)
1083 if (float64_eq(FT0, FT1, &FP_STATUS))
1089 void helper_cmpfne (void)
1091 if (float64_eq(FT0, FT1, &FP_STATUS))
1097 void helper_cmpflt (void)
1099 if (float64_lt(FT0, FT1, &FP_STATUS))
1105 void helper_cmpfle (void)
1107 if (float64_lt(FT0, FT1, &FP_STATUS))
1113 void helper_cmpfgt (void)
1115 if (float64_le(FT0, FT1, &FP_STATUS))
1121 void helper_cmpfge (void)
1123 if (float64_lt(FT0, FT1, &FP_STATUS))
1129 #if !defined (CONFIG_USER_ONLY)
1130 void helper_mfpr (int iprn)
1134 if (cpu_alpha_mfpr(env, iprn, &val) == 0)
1138 void helper_mtpr (int iprn)
1140 cpu_alpha_mtpr(env, iprn, T0, NULL);
1144 /*****************************************************************************/
1145 /* Softmmu support */
1146 #if !defined (CONFIG_USER_ONLY)
1148 #define GETPC() (__builtin_return_address(0))
1150 /* XXX: the two following helpers are pure hacks.
1151 * Hopefully, we emulate the PALcode, then we should never see
1152 * HW_LD / HW_ST instructions.
1154 void helper_ld_phys_to_virt (void)
1156 uint64_t tlb_addr, physaddr;
1160 mmu_idx = cpu_mmu_index(env);
1161 index = (T0 >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
1163 tlb_addr = env->tlb_table[mmu_idx][index].addr_read;
1164 if ((T0 & TARGET_PAGE_MASK) ==
1165 (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
1166 physaddr = T0 + env->tlb_table[mmu_idx][index].addend;
1168 /* the page is not in the TLB : fill it */
1170 tlb_fill(T0, 0, mmu_idx, retaddr);
1176 void helper_st_phys_to_virt (void)
1178 uint64_t tlb_addr, physaddr;
1182 mmu_idx = cpu_mmu_index(env);
1183 index = (T0 >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
1185 tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
1186 if ((T0 & TARGET_PAGE_MASK) ==
1187 (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
1188 physaddr = T0 + env->tlb_table[mmu_idx][index].addend;
1190 /* the page is not in the TLB : fill it */
1192 tlb_fill(T0, 1, mmu_idx, retaddr);
1198 #define MMUSUFFIX _mmu
1201 #include "softmmu_template.h"
1204 #include "softmmu_template.h"
1207 #include "softmmu_template.h"
1210 #include "softmmu_template.h"
1212 /* try to fill the TLB and return an exception if error. If retaddr is
1213 NULL, it means that the function was called in C code (i.e. not
1214 from generated code or from helper.c) */
1215 /* XXX: fix it to restore all registers */
1216 void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
1218 TranslationBlock *tb;
1219 CPUState *saved_env;
1220 target_phys_addr_t pc;
1223 /* XXX: hack to restore env in all cases, even if not called from
1226 env = cpu_single_env;
1227 ret = cpu_alpha_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
1228 if (!likely(ret == 0)) {
1229 if (likely(retaddr)) {
1230 /* now we have a real cpu fault */
1231 pc = (target_phys_addr_t)retaddr;
1232 tb = tb_find_pc(pc);
1234 /* the PC is inside the translated code. It means that we have
1235 a virtual CPU fault */
1236 cpu_restore_state(tb, env, pc, NULL);
1239 /* Exception index and error code are already set */