2 * CRIS virtual CPU header
4 * Copyright (c) 2007 AXIS Communications AB
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #define TARGET_LONG_BITS 32
28 #define TARGET_HAS_ICE 1
30 #define ELF_MACHINE EM_CRIS
34 #define EXCP_BUSFAULT 3
38 /* Register aliases. R0 - R15 */
43 /* Support regs, P0 - P15 */
62 #define Q_FLAG 0x80000000
63 #define M_FLAG 0x40000000
76 #define ALU_FLAGS 0x1F
78 /* Condition codes. */
96 /* Internal flags for the implementation. */
99 #define NB_MMU_MODES 2
101 typedef struct CPUCRISState {
103 /* P0 - P15 are referred to as special registers in the docs. */
106 /* Pseudo register for the PC. Not directly accessable on CRIS. */
109 /* Pseudo register for the kernel stack. */
117 /* Condition flag tracking. */
123 /* size of the operation, 1 = byte, 2 = word, 4 = dword. */
125 /* X flag at the time of cc snapshot. */
128 int interrupt_request;
129 int interrupt_vector;
133 /* FIXME: add a check in the translator to avoid writing to support
134 register sets beyond the 4th. The ISA allows up to 256! but in
135 practice there is no core that implements more than 4.
137 Support function registers are used to control units close to the
138 core. Accesses do not pass down the normal hierarchy.
140 uint32_t sregs[4][16];
142 /* Linear feedback shift reg in the mmu. Used to provide pseudo
143 randomness for the 'hint' the mmu gives to sw for chosing valid
144 sets on TLB refills. */
145 uint32_t mmu_rand_lfsr;
148 * We just store the stores to the tlbset here for later evaluation
149 * when the hw needs access to them.
151 * One for I and another for D.
164 CPUCRISState *cpu_cris_init(const char *cpu_model);
165 int cpu_cris_exec(CPUCRISState *s);
166 void cpu_cris_close(CPUCRISState *s);
167 void do_interrupt(CPUCRISState *env);
168 /* you can call this signal handler from your SIGBUS and SIGSEGV
169 signal handlers to inform the virtual CPU of exceptions. non zero
170 is returned if the signal was handled by the virtual CPU. */
171 int cpu_cris_signal_handler(int host_signum, void *pinfo,
173 void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
177 CC_OP_DYNAMIC, /* Use env->cc_op */
203 /* CRIS uses 8k pages. */
204 #define TARGET_PAGE_BITS 13
205 #define MMAP_SHIFT TARGET_PAGE_BITS
207 #define CPUState CPUCRISState
208 #define cpu_init cpu_cris_init
209 #define cpu_exec cpu_cris_exec
210 #define cpu_gen_code cpu_cris_gen_code
211 #define cpu_signal_handler cpu_cris_signal_handler
213 #define CPU_SAVE_VERSION 1
215 /* MMU modes definitions */
216 #define MMU_MODE0_SUFFIX _kernel
217 #define MMU_MODE1_SUFFIX _user
218 #define MMU_USER_IDX 1
219 static inline int cpu_mmu_index (CPUState *env)
221 return !!(env->pregs[PR_CCS] & U_FLAG);
224 #if defined(CONFIG_USER_ONLY)
225 static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
228 env->regs[14] = newsp;
233 /* Support function regs. */
234 #define SFR_RW_GC_CFG 0][0
235 #define SFR_RW_MM_CFG env->pregs[PR_SRS]][0
236 #define SFR_RW_MM_KBASE_LO env->pregs[PR_SRS]][1
237 #define SFR_RW_MM_KBASE_HI env->pregs[PR_SRS]][2
238 #define SFR_R_MM_CAUSE env->pregs[PR_SRS]][3
239 #define SFR_RW_MM_TLB_SEL env->pregs[PR_SRS]][4
240 #define SFR_RW_MM_TLB_LO env->pregs[PR_SRS]][5
241 #define SFR_RW_MM_TLB_HI env->pregs[PR_SRS]][6
243 #define CPU_PC_FROM_TB(env, tb) env->pc = tb->pc