2 * PPC emulation helpers for qemu.
4 * Copyright (c) 2003 Jocelyn Mayer
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 void cpu_loop_exit(void)
26 longjmp(env->jmp_env, 1);
29 /* shortcuts to generate exceptions */
30 void raise_exception_err (int exception_index, int error_code)
32 env->exception_index = exception_index;
33 env->error_code = error_code;
38 void raise_exception (int exception_index)
40 env->exception_index = exception_index;
46 /* Helpers for "fat" micro operations */
47 uint32_t do_load_cr (void)
49 return (env->crf[0] << 28) |
59 void do_store_cr (uint32_t crn, uint32_t value)
63 for (i = 0, sh = 7; i < 8; i++, sh --) {
65 env->crf[i] = (value >> (sh * 4)) & 0xF;
69 uint32_t do_load_xer (void)
71 return (xer_so << XER_SO) |
77 void do_store_xer (uint32_t value)
79 xer_so = (value >> XER_SO) & 0x01;
80 xer_ov = (value >> XER_OV) & 0x01;
81 xer_ca = (value >> XER_CA) & 0x01;
82 xer_bc = (value >> XER_BC) & 0x1f;
85 uint32_t do_load_msr (void)
87 return (msr_pow << MSR_POW) |
88 (msr_ile << MSR_ILE) |
93 (msr_fe0 << MSR_FE0) |
96 (msr_fe1 << MSR_FE1) |
104 void do_store_msr (uint32_t msr_value)
106 msr_pow = (msr_value >> MSR_POW) & 0x03;
107 msr_ile = (msr_value >> MSR_ILE) & 0x01;
108 msr_ee = (msr_value >> MSR_EE) & 0x01;
109 msr_pr = (msr_value >> MSR_PR) & 0x01;
110 msr_fp = (msr_value >> MSR_FP) & 0x01;
111 msr_me = (msr_value >> MSR_ME) & 0x01;
112 msr_fe0 = (msr_value >> MSR_FE0) & 0x01;
113 msr_se = (msr_value >> MSR_SE) & 0x01;
114 msr_be = (msr_value >> MSR_BE) & 0x01;
115 msr_fe1 = (msr_value >> MSR_FE1) & 0x01;
116 msr_ip = (msr_value >> MSR_IP) & 0x01;
117 msr_ir = (msr_value >> MSR_IR) & 0x01;
118 msr_dr = (msr_value >> MSR_DR) & 0x01;
119 msr_ri = (msr_value >> MSR_RI) & 0x01;
120 msr_le = (msr_value >> MSR_LE) & 0x01;
123 /* The 32 MSB of the target fpr are undefined. They'll be zero... */
124 uint32_t do_load_fpscr (void)
126 return (fpscr_fx << FPSCR_FX) |
127 (fpscr_fex << FPSCR_FEX) |
128 (fpscr_vx << FPSCR_VX) |
129 (fpscr_ox << FPSCR_OX) |
130 (fpscr_ux << FPSCR_UX) |
131 (fpscr_zx << FPSCR_ZX) |
132 (fpscr_xx << FPSCR_XX) |
133 (fpscr_vsxnan << FPSCR_VXSNAN) |
134 (fpscr_vxisi << FPSCR_VXISI) |
135 (fpscr_vxidi << FPSCR_VXIDI) |
136 (fpscr_vxzdz << FPSCR_VXZDZ) |
137 (fpscr_vximz << FPSCR_VXIMZ) |
138 (fpscr_fr << FPSCR_FR) |
139 (fpscr_fi << FPSCR_FI) |
140 (fpscr_fprf << FPSCR_FPRF) |
141 (fpscr_vxsoft << FPSCR_VXSOFT) |
142 (fpscr_vxsqrt << FPSCR_VXSQRT) |
143 (fpscr_oe << FPSCR_OE) |
144 (fpscr_ue << FPSCR_UE) |
145 (fpscr_ze << FPSCR_ZE) |
146 (fpscr_xe << FPSCR_XE) |
147 (fpscr_ni << FPSCR_NI) |
148 (fpscr_rn << FPSCR_RN);
151 /* We keep only 32 bits of input... */
152 /* For now, this is COMPLETELY BUGGY ! */
153 void do_store_fpscr (uint8_t mask, uint32_t fp)
157 for (i = 0; i < 7; i++) {
158 if ((mask & (1 << i)) == 0)
159 fp &= ~(0xf << (4 * i));
161 if ((mask & 80) != 0)
162 fpscr_fx = (fp >> FPSCR_FX) & 0x01;
163 fpscr_fex = (fp >> FPSCR_FEX) & 0x01;
164 fpscr_vx = (fp >> FPSCR_VX) & 0x01;
165 fpscr_ox = (fp >> FPSCR_OX) & 0x01;
166 fpscr_ux = (fp >> FPSCR_UX) & 0x01;
167 fpscr_zx = (fp >> FPSCR_ZX) & 0x01;
168 fpscr_xx = (fp >> FPSCR_XX) & 0x01;
169 fpscr_vsxnan = (fp >> FPSCR_VXSNAN) & 0x01;
170 fpscr_vxisi = (fp >> FPSCR_VXISI) & 0x01;
171 fpscr_vxidi = (fp >> FPSCR_VXIDI) & 0x01;
172 fpscr_vxzdz = (fp >> FPSCR_VXZDZ) & 0x01;
173 fpscr_vximz = (fp >> FPSCR_VXIMZ) & 0x01;
174 fpscr_fr = (fp >> FPSCR_FR) & 0x01;
175 fpscr_fi = (fp >> FPSCR_FI) & 0x01;
176 fpscr_fprf = (fp >> FPSCR_FPRF) & 0x1F;
177 fpscr_vxsoft = (fp >> FPSCR_VXSOFT) & 0x01;
178 fpscr_vxsqrt = (fp >> FPSCR_VXSQRT) & 0x01;
179 fpscr_oe = (fp >> FPSCR_OE) & 0x01;
180 fpscr_ue = (fp >> FPSCR_UE) & 0x01;
181 fpscr_ze = (fp >> FPSCR_ZE) & 0x01;
182 fpscr_xe = (fp >> FPSCR_XE) & 0x01;
183 fpscr_ni = (fp >> FPSCR_NI) & 0x01;
184 fpscr_rn = (fp >> FPSCR_RN) & 0x03;
187 int32_t do_sraw(int32_t value, uint32_t shift)
193 ret = (-1) * ((uint32_t)value >> 31);
197 ret = value >> (shift & 0x1f);
198 if (ret < 0 && (value & ((1 << shift) - 1)) != 0)
205 void do_lmw (int reg, uint32_t src)
207 for (; reg <= 31; reg++, src += 4)
208 ugpr(reg) = ld32(src);
211 void do_stmw (int reg, uint32_t dest)
213 for (; reg <= 31; reg++, dest += 4)
214 st32(dest, ugpr(reg));
217 void do_lsw (uint32_t reg, int count, uint32_t src)
222 for (; count > 3; count -= 4, src += 4) {
225 ugpr(reg++) = ld32(src);
228 for (sh = 24, tmp = 0; count > 0; count--, src++, sh -= 8) {
231 tmp |= ld8(src) << sh;
242 void do_stsw (uint32_t reg, int count, uint32_t dest)
246 for (; count > 3; count -= 4, dest += 4) {
249 st32(dest, ugpr(reg++));
252 for (sh = 24; count > 0; count--, dest++, sh -= 8) {
255 st8(dest, (ugpr(reg) >> sh) & 0xFF);