4 #include "dyngen-exec.h"
6 register struct CPUSPARCState *env asm(AREG0);
11 #define REGWPTR env->regwptr
13 register uint32_t T0 asm(AREG1);
15 #undef REG_REGWPTR // Broken
17 #if defined(__sparc__)
18 register uint32_t *REGWPTR asm(AREG4);
20 register uint32_t *REGWPTR asm(AREG3);
25 register uint32_t T2 asm(AREG4);
32 #define REGWPTR env->regwptr
33 register uint32_t T2 asm(AREG3);
38 #define FT0 (env->ft0)
39 #define FT1 (env->ft1)
40 #define DT0 (env->dt0)
41 #define DT1 (env->dt1)
42 #if defined(CONFIG_USER_ONLY)
43 #define QT0 (env->qt0)
44 #define QT1 (env->qt1)
51 void cpu_unlock(void);
52 void cpu_loop_exit(void);
53 void set_cwp(int new_cwp);
54 void do_interrupt(int intno);
55 void memcpy32(target_ulong *dst, const target_ulong *src);
56 target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev);
57 void dump_mmu(CPUState *env);
59 static inline void env_to_regs(void)
61 #if defined(reg_REGWPTR)
62 REGWPTR = env->regbase + (env->cwp * 16);
63 env->regwptr = REGWPTR;
67 static inline void regs_to_env(void)
71 int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
72 int mmu_idx, int is_softmmu);
74 static inline int cpu_halted(CPUState *env) {
77 if ((env->interrupt_request & CPU_INTERRUPT_HARD) && (env->psret != 0)) {