6 void register_machines(void)
9 qemu_register_machine(&sun4u_machine);
11 qemu_register_machine(&ss5_machine);
12 qemu_register_machine(&ss10_machine);
13 qemu_register_machine(&ss600mp_machine);
14 qemu_register_machine(&ss20_machine);
15 qemu_register_machine(&ss2_machine);
16 qemu_register_machine(&voyager_machine);
17 qemu_register_machine(&ss_lx_machine);
18 qemu_register_machine(&ss4_machine);
19 qemu_register_machine(&scls_machine);
20 qemu_register_machine(&sbook_machine);
21 qemu_register_machine(&ss1000_machine);
22 qemu_register_machine(&ss2000_machine);
26 void cpu_save(QEMUFile *f, void *opaque)
28 CPUState *env = opaque;
32 for(i = 0; i < 8; i++)
33 qemu_put_betls(f, &env->gregs[i]);
34 for(i = 0; i < NWINDOWS * 16; i++)
35 qemu_put_betls(f, &env->regbase[i]);
38 for(i = 0; i < TARGET_FPREGS; i++) {
44 qemu_put_be32(f, u.i);
47 qemu_put_betls(f, &env->pc);
48 qemu_put_betls(f, &env->npc);
49 qemu_put_betls(f, &env->y);
51 qemu_put_be32(f, tmp);
52 qemu_put_betls(f, &env->fsr);
53 qemu_put_betls(f, &env->tbr);
54 #ifndef TARGET_SPARC64
55 qemu_put_be32s(f, &env->wim);
57 for(i = 0; i < 16; i++)
58 qemu_put_be32s(f, &env->mmuregs[i]);
62 int cpu_load(QEMUFile *f, void *opaque, int version_id)
64 CPUState *env = opaque;
68 for(i = 0; i < 8; i++)
69 qemu_get_betls(f, &env->gregs[i]);
70 for(i = 0; i < NWINDOWS * 16; i++)
71 qemu_get_betls(f, &env->regbase[i]);
74 for(i = 0; i < TARGET_FPREGS; i++) {
79 u.i = qemu_get_be32(f);
83 qemu_get_betls(f, &env->pc);
84 qemu_get_betls(f, &env->npc);
85 qemu_get_betls(f, &env->y);
86 tmp = qemu_get_be32(f);
87 env->cwp = 0; /* needed to ensure that the wrapping registers are
90 qemu_get_betls(f, &env->fsr);
91 qemu_get_betls(f, &env->tbr);
92 #ifndef TARGET_SPARC64
93 qemu_get_be32s(f, &env->wim);
95 for(i = 0; i < 16; i++)
96 qemu_get_be32s(f, &env->mmuregs[i]);