2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 const char *tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
35 int tcg_target_reg_alloc_order[] = {
46 const int tcg_target_call_iarg_regs[3] = { TCG_REG_EAX, TCG_REG_EDX, TCG_REG_ECX };
47 const int tcg_target_call_oarg_regs[2] = { TCG_REG_EAX, TCG_REG_EDX };
49 static void patch_reloc(uint8_t *code_ptr, int type,
50 tcg_target_long value, tcg_target_long addend)
55 *(uint32_t *)code_ptr = value;
58 *(uint32_t *)code_ptr = value - (long)code_ptr;
65 /* maximum number of register used for input function arguments */
66 static inline int tcg_target_get_call_iarg_regs_count(int flags)
68 flags &= TCG_CALL_TYPE_MASK;
70 case TCG_CALL_TYPE_STD:
72 case TCG_CALL_TYPE_REGPARM_1:
73 case TCG_CALL_TYPE_REGPARM_2:
74 case TCG_CALL_TYPE_REGPARM:
75 return flags - TCG_CALL_TYPE_REGPARM_1 + 1;
81 /* parse target specific constraints */
82 int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
90 tcg_regset_set_reg(ct->u.regs, TCG_REG_EAX);
94 tcg_regset_set_reg(ct->u.regs, TCG_REG_EBX);
98 tcg_regset_set_reg(ct->u.regs, TCG_REG_ECX);
101 ct->ct |= TCG_CT_REG;
102 tcg_regset_set_reg(ct->u.regs, TCG_REG_EDX);
105 ct->ct |= TCG_CT_REG;
106 tcg_regset_set_reg(ct->u.regs, TCG_REG_ESI);
109 ct->ct |= TCG_CT_REG;
110 tcg_regset_set_reg(ct->u.regs, TCG_REG_EDI);
113 ct->ct |= TCG_CT_REG;
114 tcg_regset_set32(ct->u.regs, 0, 0xf);
117 ct->ct |= TCG_CT_REG;
118 tcg_regset_set32(ct->u.regs, 0, 0xff);
121 /* qemu_ld/st address constraint */
123 ct->ct |= TCG_CT_REG;
124 tcg_regset_set32(ct->u.regs, 0, 0xff);
125 tcg_regset_reset_reg(ct->u.regs, TCG_REG_EAX);
126 tcg_regset_reset_reg(ct->u.regs, TCG_REG_EDX);
136 /* test if a constant matches the constraint */
137 static inline int tcg_target_const_match(tcg_target_long val,
138 const TCGArgConstraint *arg_ct)
142 if (ct & TCG_CT_CONST)
179 #define P_EXT 0x100 /* 0x0f opcode prefix */
181 static const uint8_t tcg_cond_to_jcc[10] = {
182 [TCG_COND_EQ] = JCC_JE,
183 [TCG_COND_NE] = JCC_JNE,
184 [TCG_COND_LT] = JCC_JL,
185 [TCG_COND_GE] = JCC_JGE,
186 [TCG_COND_LE] = JCC_JLE,
187 [TCG_COND_GT] = JCC_JG,
188 [TCG_COND_LTU] = JCC_JB,
189 [TCG_COND_GEU] = JCC_JAE,
190 [TCG_COND_LEU] = JCC_JBE,
191 [TCG_COND_GTU] = JCC_JA,
194 static inline void tcg_out_opc(TCGContext *s, int opc)
201 static inline void tcg_out_modrm(TCGContext *s, int opc, int r, int rm)
204 tcg_out8(s, 0xc0 | (r << 3) | rm);
207 /* rm == -1 means no register index */
208 static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm,
213 tcg_out8(s, 0x05 | (r << 3));
214 tcg_out32(s, offset);
215 } else if (offset == 0 && rm != TCG_REG_EBP) {
216 if (rm == TCG_REG_ESP) {
217 tcg_out8(s, 0x04 | (r << 3));
220 tcg_out8(s, 0x00 | (r << 3) | rm);
222 } else if ((int8_t)offset == offset) {
223 if (rm == TCG_REG_ESP) {
224 tcg_out8(s, 0x44 | (r << 3));
227 tcg_out8(s, 0x40 | (r << 3) | rm);
231 if (rm == TCG_REG_ESP) {
232 tcg_out8(s, 0x84 | (r << 3));
235 tcg_out8(s, 0x80 | (r << 3) | rm);
237 tcg_out32(s, offset);
241 static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
244 tcg_out_modrm(s, 0x8b, ret, arg);
247 static inline void tcg_out_movi(TCGContext *s, TCGType type,
248 int ret, int32_t arg)
252 tcg_out_modrm(s, 0x01 | (ARITH_XOR << 3), ret, ret);
254 tcg_out8(s, 0xb8 + ret);
259 static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
260 int arg1, tcg_target_long arg2)
263 tcg_out_modrm_offset(s, 0x8b, ret, arg1, arg2);
266 static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
267 int arg1, tcg_target_long arg2)
270 tcg_out_modrm_offset(s, 0x89, arg, arg1, arg2);
273 static inline void tgen_arithi(TCGContext *s, int c, int r0, int32_t val)
275 if (val == (int8_t)val) {
276 tcg_out_modrm(s, 0x83, c, r0);
279 tcg_out_modrm(s, 0x81, c, r0);
284 void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
287 tgen_arithi(s, ARITH_ADD, reg, val);
290 static void tcg_out_jxx(TCGContext *s, int opc, int label_index)
293 TCGLabel *l = &s->labels[label_index];
296 val = l->u.value - (tcg_target_long)s->code_ptr;
298 if ((int8_t)val1 == val1) {
302 tcg_out8(s, 0x70 + opc);
307 tcg_out32(s, val - 5);
310 tcg_out8(s, 0x80 + opc);
311 tcg_out32(s, val - 6);
319 tcg_out8(s, 0x80 + opc);
321 tcg_out_reloc(s, s->code_ptr, R_386_PC32, label_index, -4);
326 static void tcg_out_brcond(TCGContext *s, int cond,
327 TCGArg arg1, TCGArg arg2, int const_arg2,
351 tcg_out_modrm(s, 0x85, arg1, arg1);
352 tcg_out_jxx(s, c, label_index);
355 tgen_arithi(s, ARITH_CMP, arg1, arg2);
356 tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index);
359 tcg_out_modrm(s, 0x01 | (ARITH_CMP << 3), arg2, arg1);
360 tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index);
364 /* XXX: we implement it at the target level to avoid having to
365 handle cross basic blocks temporaries */
366 static void tcg_out_brcond2(TCGContext *s,
367 const TCGArg *args, const int *const_args)
370 label_next = gen_new_label();
373 tcg_out_brcond(s, TCG_COND_NE, args[0], args[2], const_args[2], label_next);
374 tcg_out_brcond(s, TCG_COND_EQ, args[1], args[3], const_args[3], args[5]);
377 tcg_out_brcond(s, TCG_COND_NE, args[0], args[2], const_args[2], args[5]);
378 tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], args[5]);
381 tcg_out_brcond(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5]);
382 tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
383 tcg_out_brcond(s, TCG_COND_LT, args[0], args[2], const_args[2], args[5]);
386 tcg_out_brcond(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5]);
387 tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
388 tcg_out_brcond(s, TCG_COND_LE, args[0], args[2], const_args[2], args[5]);
391 tcg_out_brcond(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5]);
392 tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
393 tcg_out_brcond(s, TCG_COND_GT, args[0], args[2], const_args[2], args[5]);
396 tcg_out_brcond(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5]);
397 tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
398 tcg_out_brcond(s, TCG_COND_GE, args[0], args[2], const_args[2], args[5]);
401 tcg_out_brcond(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5]);
402 tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
403 tcg_out_brcond(s, TCG_COND_LTU, args[0], args[2], const_args[2], args[5]);
406 tcg_out_brcond(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5]);
407 tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
408 tcg_out_brcond(s, TCG_COND_LEU, args[0], args[2], const_args[2], args[5]);
411 tcg_out_brcond(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5]);
412 tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
413 tcg_out_brcond(s, TCG_COND_GTU, args[0], args[2], const_args[2], args[5]);
416 tcg_out_brcond(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5]);
417 tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
418 tcg_out_brcond(s, TCG_COND_GEU, args[0], args[2], const_args[2], args[5]);
423 tcg_out_label(s, label_next, (tcg_target_long)s->code_ptr);
426 #if defined(CONFIG_SOFTMMU)
427 extern void __ldb_mmu(void);
428 extern void __ldw_mmu(void);
429 extern void __ldl_mmu(void);
430 extern void __ldq_mmu(void);
432 extern void __stb_mmu(void);
433 extern void __stw_mmu(void);
434 extern void __stl_mmu(void);
435 extern void __stq_mmu(void);
437 static void *qemu_ld_helpers[4] = {
444 static void *qemu_st_helpers[4] = {
452 /* XXX: qemu_ld and qemu_st could be modified to clobber only EDX and
453 EAX. It will be useful once fixed registers globals are less
455 static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
458 int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap;
459 #if defined(CONFIG_SOFTMMU)
460 uint8_t *label1_ptr, *label2_ptr;
462 #if TARGET_LONG_BITS == 64
463 #if defined(CONFIG_SOFTMMU)
475 #if TARGET_LONG_BITS == 64
484 #if defined(CONFIG_SOFTMMU)
485 tcg_out_mov(s, r1, addr_reg);
487 tcg_out_mov(s, r0, addr_reg);
489 tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
490 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
492 tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */
493 tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
495 tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
496 tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
498 tcg_out_opc(s, 0x8d); /* lea offset(r1, %ebp), r1 */
499 tcg_out8(s, 0x80 | (r1 << 3) | 0x04);
500 tcg_out8(s, (5 << 3) | r1);
501 tcg_out32(s, offsetof(CPUState, tlb_table[mem_index][0].addr_read));
504 tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
506 tcg_out_mov(s, r0, addr_reg);
508 #if TARGET_LONG_BITS == 32
510 tcg_out8(s, 0x70 + JCC_JE);
511 label1_ptr = s->code_ptr;
515 tcg_out8(s, 0x70 + JCC_JNE);
516 label3_ptr = s->code_ptr;
519 /* cmp 4(r1), addr_reg2 */
520 tcg_out_modrm_offset(s, 0x3b, addr_reg2, r1, 4);
523 tcg_out8(s, 0x70 + JCC_JE);
524 label1_ptr = s->code_ptr;
528 *label3_ptr = s->code_ptr - label3_ptr - 1;
531 /* XXX: move that code at the end of the TB */
532 #if TARGET_LONG_BITS == 32
533 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EDX, mem_index);
535 tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
536 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
539 tcg_out32(s, (tcg_target_long)qemu_ld_helpers[s_bits] -
540 (tcg_target_long)s->code_ptr - 4);
545 tcg_out_modrm(s, 0xbe | P_EXT, data_reg, TCG_REG_EAX);
549 tcg_out_modrm(s, 0xbf | P_EXT, data_reg, TCG_REG_EAX);
555 tcg_out_mov(s, data_reg, TCG_REG_EAX);
558 if (data_reg == TCG_REG_EDX) {
559 tcg_out_opc(s, 0x90 + TCG_REG_EDX); /* xchg %edx, %eax */
560 tcg_out_mov(s, data_reg2, TCG_REG_EAX);
562 tcg_out_mov(s, data_reg, TCG_REG_EAX);
563 tcg_out_mov(s, data_reg2, TCG_REG_EDX);
570 label2_ptr = s->code_ptr;
574 *label1_ptr = s->code_ptr - label1_ptr - 1;
577 tcg_out_modrm_offset(s, 0x03, r0, r1, offsetof(CPUTLBEntry, addend) -
578 offsetof(CPUTLBEntry, addr_read));
583 #ifdef TARGET_WORDS_BIGENDIAN
591 tcg_out_modrm_offset(s, 0xb6 | P_EXT, data_reg, r0, 0);
595 tcg_out_modrm_offset(s, 0xbe | P_EXT, data_reg, r0, 0);
599 tcg_out_modrm_offset(s, 0xb7 | P_EXT, data_reg, r0, 0);
601 /* rolw $8, data_reg */
603 tcg_out_modrm(s, 0xc1, 0, data_reg);
609 tcg_out_modrm_offset(s, 0xbf | P_EXT, data_reg, r0, 0);
611 /* rolw $8, data_reg */
613 tcg_out_modrm(s, 0xc1, 0, data_reg);
616 /* movswl data_reg, data_reg */
617 tcg_out_modrm(s, 0xbf | P_EXT, data_reg, data_reg);
621 /* movl (r0), data_reg */
622 tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0);
625 tcg_out_opc(s, (0xc8 + data_reg) | P_EXT);
629 /* XXX: could be nicer */
630 if (r0 == data_reg) {
634 tcg_out_mov(s, r1, r0);
638 tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0);
639 tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, 4);
641 tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 4);
642 tcg_out_opc(s, (0xc8 + data_reg) | P_EXT);
644 tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, 0);
646 tcg_out_opc(s, (0xc8 + data_reg2) | P_EXT);
653 #if defined(CONFIG_SOFTMMU)
655 *label2_ptr = s->code_ptr - label2_ptr - 1;
660 static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
663 int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap;
664 #if defined(CONFIG_SOFTMMU)
665 uint8_t *label1_ptr, *label2_ptr;
667 #if TARGET_LONG_BITS == 64
668 #if defined(CONFIG_SOFTMMU)
680 #if TARGET_LONG_BITS == 64
690 #if defined(CONFIG_SOFTMMU)
691 tcg_out_mov(s, r1, addr_reg);
693 tcg_out_mov(s, r0, addr_reg);
695 tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
696 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
698 tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */
699 tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
701 tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
702 tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
704 tcg_out_opc(s, 0x8d); /* lea offset(r1, %ebp), r1 */
705 tcg_out8(s, 0x80 | (r1 << 3) | 0x04);
706 tcg_out8(s, (5 << 3) | r1);
707 tcg_out32(s, offsetof(CPUState, tlb_table[mem_index][0].addr_write));
710 tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
712 tcg_out_mov(s, r0, addr_reg);
714 #if TARGET_LONG_BITS == 32
716 tcg_out8(s, 0x70 + JCC_JE);
717 label1_ptr = s->code_ptr;
721 tcg_out8(s, 0x70 + JCC_JNE);
722 label3_ptr = s->code_ptr;
725 /* cmp 4(r1), addr_reg2 */
726 tcg_out_modrm_offset(s, 0x3b, addr_reg2, r1, 4);
729 tcg_out8(s, 0x70 + JCC_JE);
730 label1_ptr = s->code_ptr;
734 *label3_ptr = s->code_ptr - label3_ptr - 1;
737 /* XXX: move that code at the end of the TB */
738 #if TARGET_LONG_BITS == 32
740 tcg_out_mov(s, TCG_REG_EDX, data_reg);
741 tcg_out_mov(s, TCG_REG_ECX, data_reg2);
742 tcg_out8(s, 0x6a); /* push Ib */
743 tcg_out8(s, mem_index);
745 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
746 (tcg_target_long)s->code_ptr - 4);
747 tcg_out_addi(s, TCG_REG_ESP, 4);
752 tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_EDX, data_reg);
756 tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_EDX, data_reg);
759 tcg_out_mov(s, TCG_REG_EDX, data_reg);
762 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
764 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
765 (tcg_target_long)s->code_ptr - 4);
769 tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
770 tcg_out8(s, 0x6a); /* push Ib */
771 tcg_out8(s, mem_index);
772 tcg_out_opc(s, 0x50 + data_reg2); /* push */
773 tcg_out_opc(s, 0x50 + data_reg); /* push */
775 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
776 (tcg_target_long)s->code_ptr - 4);
777 tcg_out_addi(s, TCG_REG_ESP, 12);
779 tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
783 tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_ECX, data_reg);
787 tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_ECX, data_reg);
790 tcg_out_mov(s, TCG_REG_ECX, data_reg);
793 tcg_out8(s, 0x6a); /* push Ib */
794 tcg_out8(s, mem_index);
796 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
797 (tcg_target_long)s->code_ptr - 4);
798 tcg_out_addi(s, TCG_REG_ESP, 4);
804 label2_ptr = s->code_ptr;
808 *label1_ptr = s->code_ptr - label1_ptr - 1;
811 tcg_out_modrm_offset(s, 0x03, r0, r1, offsetof(CPUTLBEntry, addend) -
812 offsetof(CPUTLBEntry, addr_write));
817 #ifdef TARGET_WORDS_BIGENDIAN
825 tcg_out_modrm_offset(s, 0x88, data_reg, r0, 0);
829 tcg_out_mov(s, r1, data_reg);
830 tcg_out8(s, 0x66); /* rolw $8, %ecx */
831 tcg_out_modrm(s, 0xc1, 0, r1);
837 tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
841 tcg_out_mov(s, r1, data_reg);
843 tcg_out_opc(s, (0xc8 + r1) | P_EXT);
847 tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
851 tcg_out_mov(s, r1, data_reg2);
853 tcg_out_opc(s, (0xc8 + r1) | P_EXT);
854 tcg_out_modrm_offset(s, 0x89, r1, r0, 0);
855 tcg_out_mov(s, r1, data_reg);
857 tcg_out_opc(s, (0xc8 + r1) | P_EXT);
858 tcg_out_modrm_offset(s, 0x89, r1, r0, 4);
860 tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
861 tcg_out_modrm_offset(s, 0x89, data_reg2, r0, 4);
868 #if defined(CONFIG_SOFTMMU)
870 *label2_ptr = s->code_ptr - label2_ptr - 1;
874 static inline void tcg_out_op(TCGContext *s, int opc,
875 const TCGArg *args, const int *const_args)
880 case INDEX_op_exit_tb:
881 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EAX, args[0]);
882 tcg_out8(s, 0xc3); /* ret */
884 case INDEX_op_goto_tb:
885 if (s->tb_jmp_offset) {
886 /* direct jump method */
887 tcg_out8(s, 0xe9); /* jmp im */
888 s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
891 /* indirect jump method */
893 tcg_out_modrm_offset(s, 0xff, 4, -1,
894 (tcg_target_long)(s->tb_next + args[0]));
896 s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
901 tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
903 tcg_out_modrm(s, 0xff, 2, args[0]);
909 tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
911 tcg_out_modrm(s, 0xff, 4, args[0]);
915 tcg_out_jxx(s, JCC_JMP, args[0]);
917 case INDEX_op_movi_i32:
918 tcg_out_movi(s, TCG_TYPE_I32, args[0], args[1]);
920 case INDEX_op_ld8u_i32:
922 tcg_out_modrm_offset(s, 0xb6 | P_EXT, args[0], args[1], args[2]);
924 case INDEX_op_ld8s_i32:
926 tcg_out_modrm_offset(s, 0xbe | P_EXT, args[0], args[1], args[2]);
928 case INDEX_op_ld16u_i32:
930 tcg_out_modrm_offset(s, 0xb7 | P_EXT, args[0], args[1], args[2]);
932 case INDEX_op_ld16s_i32:
934 tcg_out_modrm_offset(s, 0xbf | P_EXT, args[0], args[1], args[2]);
936 case INDEX_op_ld_i32:
938 tcg_out_modrm_offset(s, 0x8b, args[0], args[1], args[2]);
940 case INDEX_op_st8_i32:
942 tcg_out_modrm_offset(s, 0x88, args[0], args[1], args[2]);
944 case INDEX_op_st16_i32:
947 tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
949 case INDEX_op_st_i32:
951 tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
953 case INDEX_op_sub_i32:
956 case INDEX_op_and_i32:
959 case INDEX_op_or_i32:
962 case INDEX_op_xor_i32:
965 case INDEX_op_add_i32:
969 tgen_arithi(s, c, args[0], args[2]);
971 tcg_out_modrm(s, 0x01 | (c << 3), args[2], args[0]);
974 case INDEX_op_mul_i32:
978 if (val == (int8_t)val) {
979 tcg_out_modrm(s, 0x6b, args[0], args[0]);
982 tcg_out_modrm(s, 0x69, args[0], args[0]);
986 tcg_out_modrm(s, 0xaf | P_EXT, args[0], args[2]);
989 case INDEX_op_mulu2_i32:
990 tcg_out_modrm(s, 0xf7, 4, args[3]);
992 case INDEX_op_div2_i32:
993 tcg_out_modrm(s, 0xf7, 7, args[4]);
995 case INDEX_op_divu2_i32:
996 tcg_out_modrm(s, 0xf7, 6, args[4]);
998 case INDEX_op_shl_i32:
1001 if (const_args[2]) {
1003 tcg_out_modrm(s, 0xd1, c, args[0]);
1005 tcg_out_modrm(s, 0xc1, c, args[0]);
1006 tcg_out8(s, args[2]);
1009 tcg_out_modrm(s, 0xd3, c, args[0]);
1012 case INDEX_op_shr_i32:
1015 case INDEX_op_sar_i32:
1019 case INDEX_op_add2_i32:
1021 tgen_arithi(s, ARITH_ADD, args[0], args[4]);
1023 tcg_out_modrm(s, 0x01 | (ARITH_ADD << 3), args[4], args[0]);
1025 tgen_arithi(s, ARITH_ADC, args[1], args[5]);
1027 tcg_out_modrm(s, 0x01 | (ARITH_ADC << 3), args[5], args[1]);
1029 case INDEX_op_sub2_i32:
1031 tgen_arithi(s, ARITH_SUB, args[0], args[4]);
1033 tcg_out_modrm(s, 0x01 | (ARITH_SUB << 3), args[4], args[0]);
1035 tgen_arithi(s, ARITH_SBB, args[1], args[5]);
1037 tcg_out_modrm(s, 0x01 | (ARITH_SBB << 3), args[5], args[1]);
1039 case INDEX_op_brcond_i32:
1040 tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], args[3]);
1042 case INDEX_op_brcond2_i32:
1043 tcg_out_brcond2(s, args, const_args);
1046 case INDEX_op_qemu_ld8u:
1047 tcg_out_qemu_ld(s, args, 0);
1049 case INDEX_op_qemu_ld8s:
1050 tcg_out_qemu_ld(s, args, 0 | 4);
1052 case INDEX_op_qemu_ld16u:
1053 tcg_out_qemu_ld(s, args, 1);
1055 case INDEX_op_qemu_ld16s:
1056 tcg_out_qemu_ld(s, args, 1 | 4);
1058 case INDEX_op_qemu_ld32u:
1059 tcg_out_qemu_ld(s, args, 2);
1061 case INDEX_op_qemu_ld64:
1062 tcg_out_qemu_ld(s, args, 3);
1065 case INDEX_op_qemu_st8:
1066 tcg_out_qemu_st(s, args, 0);
1068 case INDEX_op_qemu_st16:
1069 tcg_out_qemu_st(s, args, 1);
1071 case INDEX_op_qemu_st32:
1072 tcg_out_qemu_st(s, args, 2);
1074 case INDEX_op_qemu_st64:
1075 tcg_out_qemu_st(s, args, 3);
1083 static const TCGTargetOpDef x86_op_defs[] = {
1084 { INDEX_op_exit_tb, { } },
1085 { INDEX_op_goto_tb, { } },
1086 { INDEX_op_call, { "ri" } },
1087 { INDEX_op_jmp, { "ri" } },
1088 { INDEX_op_br, { } },
1089 { INDEX_op_mov_i32, { "r", "r" } },
1090 { INDEX_op_movi_i32, { "r" } },
1091 { INDEX_op_ld8u_i32, { "r", "r" } },
1092 { INDEX_op_ld8s_i32, { "r", "r" } },
1093 { INDEX_op_ld16u_i32, { "r", "r" } },
1094 { INDEX_op_ld16s_i32, { "r", "r" } },
1095 { INDEX_op_ld_i32, { "r", "r" } },
1096 { INDEX_op_st8_i32, { "q", "r" } },
1097 { INDEX_op_st16_i32, { "r", "r" } },
1098 { INDEX_op_st_i32, { "r", "r" } },
1100 { INDEX_op_add_i32, { "r", "0", "ri" } },
1101 { INDEX_op_sub_i32, { "r", "0", "ri" } },
1102 { INDEX_op_mul_i32, { "r", "0", "ri" } },
1103 { INDEX_op_mulu2_i32, { "a", "d", "a", "r" } },
1104 { INDEX_op_div2_i32, { "a", "d", "0", "1", "r" } },
1105 { INDEX_op_divu2_i32, { "a", "d", "0", "1", "r" } },
1106 { INDEX_op_and_i32, { "r", "0", "ri" } },
1107 { INDEX_op_or_i32, { "r", "0", "ri" } },
1108 { INDEX_op_xor_i32, { "r", "0", "ri" } },
1110 { INDEX_op_shl_i32, { "r", "0", "ci" } },
1111 { INDEX_op_shr_i32, { "r", "0", "ci" } },
1112 { INDEX_op_sar_i32, { "r", "0", "ci" } },
1114 { INDEX_op_brcond_i32, { "r", "ri" } },
1116 { INDEX_op_add2_i32, { "r", "r", "0", "1", "ri", "ri" } },
1117 { INDEX_op_sub2_i32, { "r", "r", "0", "1", "ri", "ri" } },
1118 { INDEX_op_brcond2_i32, { "r", "r", "ri", "ri" } },
1120 #if TARGET_LONG_BITS == 32
1121 { INDEX_op_qemu_ld8u, { "r", "L" } },
1122 { INDEX_op_qemu_ld8s, { "r", "L" } },
1123 { INDEX_op_qemu_ld16u, { "r", "L" } },
1124 { INDEX_op_qemu_ld16s, { "r", "L" } },
1125 { INDEX_op_qemu_ld32u, { "r", "L" } },
1126 { INDEX_op_qemu_ld64, { "r", "r", "L" } },
1128 { INDEX_op_qemu_st8, { "cb", "L" } },
1129 { INDEX_op_qemu_st16, { "L", "L" } },
1130 { INDEX_op_qemu_st32, { "L", "L" } },
1131 { INDEX_op_qemu_st64, { "L", "L", "L" } },
1133 { INDEX_op_qemu_ld8u, { "r", "L", "L" } },
1134 { INDEX_op_qemu_ld8s, { "r", "L", "L" } },
1135 { INDEX_op_qemu_ld16u, { "r", "L", "L" } },
1136 { INDEX_op_qemu_ld16s, { "r", "L", "L" } },
1137 { INDEX_op_qemu_ld32u, { "r", "L", "L" } },
1138 { INDEX_op_qemu_ld64, { "r", "r", "L", "L" } },
1140 { INDEX_op_qemu_st8, { "cb", "L", "L" } },
1141 { INDEX_op_qemu_st16, { "L", "L", "L" } },
1142 { INDEX_op_qemu_st32, { "L", "L", "L" } },
1143 { INDEX_op_qemu_st64, { "L", "L", "L", "L" } },
1148 void tcg_target_init(TCGContext *s)
1151 if ((1 << CPU_TLB_ENTRY_BITS) != sizeof(CPUTLBEntry))
1154 tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xff);
1155 tcg_regset_set32(tcg_target_call_clobber_regs, 0,
1156 (1 << TCG_REG_EAX) |
1157 (1 << TCG_REG_EDX) |
1158 (1 << TCG_REG_ECX));
1160 tcg_regset_clear(s->reserved_regs);
1161 tcg_regset_set_reg(s->reserved_regs, TCG_REG_ESP);
1163 tcg_add_target_add_op_defs(x86_op_defs);