2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 int gen_new_label(void);
28 static inline void tcg_gen_op1_i32(int opc, TCGv_i32 arg1)
31 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
34 static inline void tcg_gen_op1_i64(int opc, TCGv_i64 arg1)
37 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
40 static inline void tcg_gen_op1i(int opc, TCGArg arg1)
43 *gen_opparam_ptr++ = arg1;
46 static inline void tcg_gen_op2_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2)
49 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
50 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
53 static inline void tcg_gen_op2_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2)
56 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
57 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
60 static inline void tcg_gen_op2i_i32(int opc, TCGv_i32 arg1, TCGArg arg2)
63 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
64 *gen_opparam_ptr++ = arg2;
67 static inline void tcg_gen_op2i_i64(int opc, TCGv_i64 arg1, TCGArg arg2)
70 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
71 *gen_opparam_ptr++ = arg2;
74 static inline void tcg_gen_op2ii(int opc, TCGArg arg1, TCGArg arg2)
77 *gen_opparam_ptr++ = arg1;
78 *gen_opparam_ptr++ = arg2;
81 static inline void tcg_gen_op3_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
85 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
86 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
87 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
90 static inline void tcg_gen_op3_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
94 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
95 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
96 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
99 static inline void tcg_gen_op3i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
102 *gen_opc_ptr++ = opc;
103 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
104 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
105 *gen_opparam_ptr++ = arg3;
108 static inline void tcg_gen_op3i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
111 *gen_opc_ptr++ = opc;
112 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
113 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
114 *gen_opparam_ptr++ = arg3;
117 static inline void tcg_gen_ldst_op_i32(int opc, TCGv_i32 val, TCGv_ptr base,
120 *gen_opc_ptr++ = opc;
121 *gen_opparam_ptr++ = GET_TCGV_I32(val);
122 *gen_opparam_ptr++ = GET_TCGV_PTR(base);
123 *gen_opparam_ptr++ = offset;
126 static inline void tcg_gen_ldst_op_i64(int opc, TCGv_i64 val, TCGv_ptr base,
129 *gen_opc_ptr++ = opc;
130 *gen_opparam_ptr++ = GET_TCGV_I64(val);
131 *gen_opparam_ptr++ = GET_TCGV_PTR(base);
132 *gen_opparam_ptr++ = offset;
135 static inline void tcg_gen_qemu_ldst_op_i64_i32(int opc, TCGv_i64 val, TCGv_i32 addr,
138 *gen_opc_ptr++ = opc;
139 *gen_opparam_ptr++ = GET_TCGV_I64(val);
140 *gen_opparam_ptr++ = GET_TCGV_I32(addr);
141 *gen_opparam_ptr++ = mem_index;
144 static inline void tcg_gen_qemu_ldst_op_i64_i64(int opc, TCGv_i64 val, TCGv_i64 addr,
147 *gen_opc_ptr++ = opc;
148 *gen_opparam_ptr++ = GET_TCGV_I64(val);
149 *gen_opparam_ptr++ = GET_TCGV_I64(addr);
150 *gen_opparam_ptr++ = mem_index;
153 static inline void tcg_gen_op4_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
154 TCGv_i32 arg3, TCGv_i32 arg4)
156 *gen_opc_ptr++ = opc;
157 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
158 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
159 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
160 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
163 static inline void tcg_gen_op4_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
164 TCGv_i64 arg3, TCGv_i64 arg4)
166 *gen_opc_ptr++ = opc;
167 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
168 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
169 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
170 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
173 static inline void tcg_gen_op4i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
174 TCGv_i32 arg3, TCGArg arg4)
176 *gen_opc_ptr++ = opc;
177 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
178 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
179 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
180 *gen_opparam_ptr++ = arg4;
183 static inline void tcg_gen_op4i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
184 TCGv_i64 arg3, TCGArg arg4)
186 *gen_opc_ptr++ = opc;
187 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
188 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
189 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
190 *gen_opparam_ptr++ = arg4;
193 static inline void tcg_gen_op4ii_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
194 TCGArg arg3, TCGArg arg4)
196 *gen_opc_ptr++ = opc;
197 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
198 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
199 *gen_opparam_ptr++ = arg3;
200 *gen_opparam_ptr++ = arg4;
203 static inline void tcg_gen_op4ii_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
204 TCGArg arg3, TCGArg arg4)
206 *gen_opc_ptr++ = opc;
207 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
208 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
209 *gen_opparam_ptr++ = arg3;
210 *gen_opparam_ptr++ = arg4;
213 static inline void tcg_gen_op5_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
214 TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5)
216 *gen_opc_ptr++ = opc;
217 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
218 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
219 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
220 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
221 *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
224 static inline void tcg_gen_op5_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
225 TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5)
227 *gen_opc_ptr++ = opc;
228 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
229 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
230 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
231 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
232 *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
235 static inline void tcg_gen_op5i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
236 TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5)
238 *gen_opc_ptr++ = opc;
239 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
240 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
241 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
242 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
243 *gen_opparam_ptr++ = arg5;
246 static inline void tcg_gen_op5i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
247 TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5)
249 *gen_opc_ptr++ = opc;
250 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
251 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
252 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
253 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
254 *gen_opparam_ptr++ = arg5;
257 static inline void tcg_gen_op6_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
258 TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5,
261 *gen_opc_ptr++ = opc;
262 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
263 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
264 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
265 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
266 *gen_opparam_ptr++ = GET_TCGV_I32(arg5);
267 *gen_opparam_ptr++ = GET_TCGV_I32(arg6);
270 static inline void tcg_gen_op6_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
271 TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5,
274 *gen_opc_ptr++ = opc;
275 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
276 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
277 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
278 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
279 *gen_opparam_ptr++ = GET_TCGV_I64(arg5);
280 *gen_opparam_ptr++ = GET_TCGV_I64(arg6);
283 static inline void tcg_gen_op6ii_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2,
284 TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5,
287 *gen_opc_ptr++ = opc;
288 *gen_opparam_ptr++ = GET_TCGV_I32(arg1);
289 *gen_opparam_ptr++ = GET_TCGV_I32(arg2);
290 *gen_opparam_ptr++ = GET_TCGV_I32(arg3);
291 *gen_opparam_ptr++ = GET_TCGV_I32(arg4);
292 *gen_opparam_ptr++ = arg5;
293 *gen_opparam_ptr++ = arg6;
296 static inline void tcg_gen_op6ii_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2,
297 TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5,
300 *gen_opc_ptr++ = opc;
301 *gen_opparam_ptr++ = GET_TCGV_I64(arg1);
302 *gen_opparam_ptr++ = GET_TCGV_I64(arg2);
303 *gen_opparam_ptr++ = GET_TCGV_I64(arg3);
304 *gen_opparam_ptr++ = GET_TCGV_I64(arg4);
305 *gen_opparam_ptr++ = arg5;
306 *gen_opparam_ptr++ = arg6;
309 static inline void gen_set_label(int n)
311 tcg_gen_op1i(INDEX_op_set_label, n);
314 static inline void tcg_gen_br(int label)
316 tcg_gen_op1i(INDEX_op_br, label);
319 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
321 if (!TCGV_EQUAL_I32(ret, arg))
322 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
325 static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
327 tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
331 static inline void tcg_gen_helperN(void *func, int flags, int sizemask,
332 TCGArg ret, int nargs, TCGArg *args)
335 fn = tcg_const_ptr((tcg_target_long)func);
336 tcg_gen_callN(&tcg_ctx, fn, flags, sizemask, ret,
338 tcg_temp_free_ptr(fn);
341 /* FIXME: Should this be pure? */
342 static inline void tcg_gen_helper64(void *func, TCGv_i64 ret,
343 TCGv_i64 a, TCGv_i64 b)
347 fn = tcg_const_ptr((tcg_target_long)func);
348 args[0] = GET_TCGV_I64(a);
349 args[1] = GET_TCGV_I64(b);
350 tcg_gen_callN(&tcg_ctx, fn, 0, 7, GET_TCGV_I64(ret), 2, args);
351 tcg_temp_free_ptr(fn);
356 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
358 tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
361 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
363 tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
366 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
368 tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
371 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
373 tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
376 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset)
378 tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
381 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
383 tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
386 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
388 tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
391 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset)
393 tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
396 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
398 tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
401 static inline void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
403 /* some cases can be optimized here */
405 tcg_gen_mov_i32(ret, arg1);
407 TCGv_i32 t0 = tcg_const_i32(arg2);
408 tcg_gen_add_i32(ret, arg1, t0);
409 tcg_temp_free_i32(t0);
413 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
415 tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
418 static inline void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2)
420 TCGv_i32 t0 = tcg_const_i32(arg1);
421 tcg_gen_sub_i32(ret, t0, arg2);
422 tcg_temp_free_i32(t0);
425 static inline void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
427 /* some cases can be optimized here */
429 tcg_gen_mov_i32(ret, arg1);
431 TCGv_i32 t0 = tcg_const_i32(arg2);
432 tcg_gen_sub_i32(ret, arg1, t0);
433 tcg_temp_free_i32(t0);
437 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
439 if (TCGV_EQUAL_I32(arg1, arg2)) {
440 tcg_gen_mov_i32(ret, arg1);
442 tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
446 static inline void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
448 /* some cases can be optimized here */
450 tcg_gen_movi_i32(ret, 0);
451 } else if (arg2 == 0xffffffff) {
452 tcg_gen_mov_i32(ret, arg1);
454 TCGv_i32 t0 = tcg_const_i32(arg2);
455 tcg_gen_and_i32(ret, arg1, t0);
456 tcg_temp_free_i32(t0);
460 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
462 if (TCGV_EQUAL_I32(arg1, arg2)) {
463 tcg_gen_mov_i32(ret, arg1);
465 tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
469 static inline void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
471 /* some cases can be optimized here */
472 if (arg2 == 0xffffffff) {
473 tcg_gen_movi_i32(ret, 0xffffffff);
474 } else if (arg2 == 0) {
475 tcg_gen_mov_i32(ret, arg1);
477 TCGv_i32 t0 = tcg_const_i32(arg2);
478 tcg_gen_or_i32(ret, arg1, t0);
479 tcg_temp_free_i32(t0);
483 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
485 if (TCGV_EQUAL_I32(arg1, arg2)) {
486 tcg_gen_movi_i32(ret, 0);
488 tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
492 static inline void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
494 /* some cases can be optimized here */
496 tcg_gen_mov_i32(ret, arg1);
498 TCGv_i32 t0 = tcg_const_i32(arg2);
499 tcg_gen_xor_i32(ret, arg1, t0);
500 tcg_temp_free_i32(t0);
504 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
506 tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
509 static inline void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
512 tcg_gen_mov_i32(ret, arg1);
514 TCGv_i32 t0 = tcg_const_i32(arg2);
515 tcg_gen_shl_i32(ret, arg1, t0);
516 tcg_temp_free_i32(t0);
520 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
522 tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
525 static inline void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
528 tcg_gen_mov_i32(ret, arg1);
530 TCGv_i32 t0 = tcg_const_i32(arg2);
531 tcg_gen_shr_i32(ret, arg1, t0);
532 tcg_temp_free_i32(t0);
536 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
538 tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
541 static inline void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
544 tcg_gen_mov_i32(ret, arg1);
546 TCGv_i32 t0 = tcg_const_i32(arg2);
547 tcg_gen_sar_i32(ret, arg1, t0);
548 tcg_temp_free_i32(t0);
552 static inline void tcg_gen_brcond_i32(int cond, TCGv_i32 arg1, TCGv_i32 arg2,
555 tcg_gen_op4ii_i32(INDEX_op_brcond_i32, arg1, arg2, cond, label_index);
558 static inline void tcg_gen_brcondi_i32(int cond, TCGv_i32 arg1, int32_t arg2,
561 TCGv_i32 t0 = tcg_const_i32(arg2);
562 tcg_gen_brcond_i32(cond, arg1, t0, label_index);
563 tcg_temp_free_i32(t0);
566 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
568 tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
571 static inline void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
573 TCGv_i32 t0 = tcg_const_i32(arg2);
574 tcg_gen_mul_i32(ret, arg1, t0);
575 tcg_temp_free_i32(t0);
578 #ifdef TCG_TARGET_HAS_div_i32
579 static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
581 tcg_gen_op3_i32(INDEX_op_div_i32, ret, arg1, arg2);
584 static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
586 tcg_gen_op3_i32(INDEX_op_rem_i32, ret, arg1, arg2);
589 static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
591 tcg_gen_op3_i32(INDEX_op_divu_i32, ret, arg1, arg2);
594 static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
596 tcg_gen_op3_i32(INDEX_op_remu_i32, ret, arg1, arg2);
599 static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
602 t0 = tcg_temp_new_i32();
603 tcg_gen_sari_i32(t0, arg1, 31);
604 tcg_gen_op5_i32(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2);
605 tcg_temp_free_i32(t0);
608 static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
611 t0 = tcg_temp_new_i32();
612 tcg_gen_sari_i32(t0, arg1, 31);
613 tcg_gen_op5_i32(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2);
614 tcg_temp_free_i32(t0);
617 static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
620 t0 = tcg_temp_new_i32();
621 tcg_gen_movi_i32(t0, 0);
622 tcg_gen_op5_i32(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2);
623 tcg_temp_free_i32(t0);
626 static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
629 t0 = tcg_temp_new_i32();
630 tcg_gen_movi_i32(t0, 0);
631 tcg_gen_op5_i32(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2);
632 tcg_temp_free_i32(t0);
636 #if TCG_TARGET_REG_BITS == 32
638 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
640 if (!TCGV_EQUAL_I64(ret, arg)) {
641 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
642 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
646 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
648 tcg_gen_movi_i32(TCGV_LOW(ret), arg);
649 tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
652 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
653 tcg_target_long offset)
655 tcg_gen_ld8u_i32(TCGV_LOW(ret), arg2, offset);
656 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
659 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
660 tcg_target_long offset)
662 tcg_gen_ld8s_i32(TCGV_LOW(ret), arg2, offset);
663 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), 31);
666 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
667 tcg_target_long offset)
669 tcg_gen_ld16u_i32(TCGV_LOW(ret), arg2, offset);
670 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
673 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
674 tcg_target_long offset)
676 tcg_gen_ld16s_i32(TCGV_LOW(ret), arg2, offset);
677 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
680 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
681 tcg_target_long offset)
683 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
684 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
687 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
688 tcg_target_long offset)
690 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
691 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
694 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
695 tcg_target_long offset)
697 /* since arg2 and ret have different types, they cannot be the
699 #ifdef TCG_TARGET_WORDS_BIGENDIAN
700 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset);
701 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset + 4);
703 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
704 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
708 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
709 tcg_target_long offset)
711 tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
714 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
715 tcg_target_long offset)
717 tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
720 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
721 tcg_target_long offset)
723 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
726 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
727 tcg_target_long offset)
729 #ifdef TCG_TARGET_WORDS_BIGENDIAN
730 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset);
731 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset + 4);
733 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
734 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
738 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
740 tcg_gen_op6_i32(INDEX_op_add2_i32, TCGV_LOW(ret), TCGV_HIGH(ret),
741 TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
745 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
747 tcg_gen_op6_i32(INDEX_op_sub2_i32, TCGV_LOW(ret), TCGV_HIGH(ret),
748 TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
752 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
754 tcg_gen_and_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
755 tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
758 static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
760 if (TCGV_EQUAL_I64(arg1, arg2)) {
761 tcg_gen_mov_i64(ret, arg1);
763 tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
764 tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
768 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
770 if (TCGV_EQUAL_I64(arg1, arg2)) {
771 tcg_gen_mov_i64(ret, arg1);
773 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
774 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
778 static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
780 tcg_gen_ori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
781 tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
784 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
786 if (TCGV_EQUAL_I64(arg1, arg2)) {
787 tcg_gen_movi_i64(ret, 0);
789 tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
790 tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
794 static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
796 tcg_gen_xori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2);
797 tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
800 /* XXX: use generic code when basic block handling is OK or CPU
801 specific code (x86) */
802 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
804 tcg_gen_helper64(tcg_helper_shl_i64, ret, arg1, arg2);
807 static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
809 tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0);
812 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
814 tcg_gen_helper64(tcg_helper_shr_i64, ret, arg1, arg2);
817 static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
819 tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0);
822 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
824 tcg_gen_helper64(tcg_helper_sar_i64, ret, arg1, arg2);
827 static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
829 tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1);
832 static inline void tcg_gen_brcond_i64(int cond, TCGv_i64 arg1, TCGv_i64 arg2,
835 tcg_gen_op6ii_i32(INDEX_op_brcond2_i32,
836 TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2),
837 TCGV_HIGH(arg2), cond, label_index);
840 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
845 t0 = tcg_temp_new_i64();
846 t1 = tcg_temp_new_i32();
848 tcg_gen_op4_i32(INDEX_op_mulu2_i32, TCGV_LOW(t0), TCGV_HIGH(t0),
849 TCGV_LOW(arg1), TCGV_LOW(arg2));
851 tcg_gen_mul_i32(t1, TCGV_LOW(arg1), TCGV_HIGH(arg2));
852 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
853 tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), TCGV_LOW(arg2));
854 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1);
856 tcg_gen_mov_i64(ret, t0);
857 tcg_temp_free_i64(t0);
858 tcg_temp_free_i32(t1);
861 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
863 tcg_gen_helper64(tcg_helper_div_i64, ret, arg1, arg2);
866 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
868 tcg_gen_helper64(tcg_helper_rem_i64, ret, arg1, arg2);
871 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
873 tcg_gen_helper64(tcg_helper_divu_i64, ret, arg1, arg2);
876 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
878 tcg_gen_helper64(tcg_helper_remu_i64, ret, arg1, arg2);
883 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
885 if (!TCGV_EQUAL_I64(ret, arg))
886 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
889 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
891 tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
894 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_i64 arg2,
895 tcg_target_long offset)
897 tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
900 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_i64 arg2,
901 tcg_target_long offset)
903 tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
906 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_i64 arg2,
907 tcg_target_long offset)
909 tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
912 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_i64 arg2,
913 tcg_target_long offset)
915 tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
918 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_i64 arg2,
919 tcg_target_long offset)
921 tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
924 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_i64 arg2,
925 tcg_target_long offset)
927 tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
930 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_i64 arg2, tcg_target_long offset)
932 tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
935 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_i64 arg2,
936 tcg_target_long offset)
938 tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
941 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_i64 arg2,
942 tcg_target_long offset)
944 tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
947 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_i64 arg2,
948 tcg_target_long offset)
950 tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
953 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_i64 arg2, tcg_target_long offset)
955 tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
958 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
960 tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
963 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
965 tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
968 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
970 if (TCGV_EQUAL_I64(arg1, arg2)) {
971 tcg_gen_mov_i64(ret, arg1);
973 tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
977 static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
979 TCGv_i64 t0 = tcg_const_i64(arg2);
980 tcg_gen_and_i64(ret, arg1, t0);
981 tcg_temp_free_i64(t0);
984 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
986 if (TCGV_EQUAL_I64(arg1, arg2)) {
987 tcg_gen_mov_i64(ret, arg1);
989 tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
993 static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
995 TCGv_i64 t0 = tcg_const_i64(arg2);
996 tcg_gen_or_i64(ret, arg1, t0);
997 tcg_temp_free_i64(t0);
1000 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1002 if (TCGV_EQUAL_I64(arg1, arg2)) {
1003 tcg_gen_movi_i64(ret, 0);
1005 tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
1009 static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1011 TCGv_i64 t0 = tcg_const_i64(arg2);
1012 tcg_gen_xor_i64(ret, arg1, t0);
1013 tcg_temp_free_i64(t0);
1016 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1018 tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
1021 static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1024 tcg_gen_mov_i64(ret, arg1);
1026 TCGv_i64 t0 = tcg_const_i64(arg2);
1027 tcg_gen_shl_i64(ret, arg1, t0);
1028 tcg_temp_free_i64(t0);
1032 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1034 tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
1037 static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1040 tcg_gen_mov_i64(ret, arg1);
1042 TCGv_i64 t0 = tcg_const_i64(arg2);
1043 tcg_gen_shr_i64(ret, arg1, t0);
1044 tcg_temp_free_i64(t0);
1048 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1050 tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
1053 static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1056 tcg_gen_mov_i64(ret, arg1);
1058 TCGv_i64 t0 = tcg_const_i64(arg2);
1059 tcg_gen_sar_i64(ret, arg1, t0);
1060 tcg_temp_free_i64(t0);
1064 static inline void tcg_gen_brcond_i64(int cond, TCGv_i64 arg1, TCGv_i64 arg2,
1067 tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond, label_index);
1070 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1072 tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
1075 #ifdef TCG_TARGET_HAS_div_i64
1076 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1078 tcg_gen_op3_i64(INDEX_op_div_i64, ret, arg1, arg2);
1081 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1083 tcg_gen_op3_i64(INDEX_op_rem_i64, ret, arg1, arg2);
1086 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1088 tcg_gen_op3_i64(INDEX_op_divu_i64, ret, arg1, arg2);
1091 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1093 tcg_gen_op3_i64(INDEX_op_remu_i64, ret, arg1, arg2);
1096 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1099 t0 = tcg_temp_new_i64();
1100 tcg_gen_sari_i64(t0, arg1, 63);
1101 tcg_gen_op5_i64(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2);
1102 tcg_temp_free_i64(t0);
1105 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1108 t0 = tcg_temp_new_i64();
1109 tcg_gen_sari_i64(t0, arg1, 63);
1110 tcg_gen_op5_i64(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2);
1111 tcg_temp_free_i64(t0);
1114 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1117 t0 = tcg_temp_new_i64();
1118 tcg_gen_movi_i64(t0, 0);
1119 tcg_gen_op5_i64(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2);
1120 tcg_temp_free_i64(t0);
1123 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1126 t0 = tcg_temp_new_i64();
1127 tcg_gen_movi_i64(t0, 0);
1128 tcg_gen_op5_i64(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2);
1129 tcg_temp_free_i64(t0);
1135 static inline void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1137 /* some cases can be optimized here */
1139 tcg_gen_mov_i64(ret, arg1);
1141 TCGv_i64 t0 = tcg_const_i64(arg2);
1142 tcg_gen_add_i64(ret, arg1, t0);
1143 tcg_temp_free_i64(t0);
1147 static inline void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2)
1149 TCGv_i64 t0 = tcg_const_i64(arg1);
1150 tcg_gen_sub_i64(ret, t0, arg2);
1151 tcg_temp_free_i64(t0);
1154 static inline void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1156 /* some cases can be optimized here */
1158 tcg_gen_mov_i64(ret, arg1);
1160 TCGv_i64 t0 = tcg_const_i64(arg2);
1161 tcg_gen_sub_i64(ret, arg1, t0);
1162 tcg_temp_free_i64(t0);
1165 static inline void tcg_gen_brcondi_i64(int cond, TCGv_i64 arg1, int64_t arg2,
1168 TCGv_i64 t0 = tcg_const_i64(arg2);
1169 tcg_gen_brcond_i64(cond, arg1, t0, label_index);
1170 tcg_temp_free_i64(t0);
1173 static inline void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1175 TCGv_i64 t0 = tcg_const_i64(arg2);
1176 tcg_gen_mul_i64(ret, arg1, t0);
1177 tcg_temp_free_i64(t0);
1181 /***************************************/
1182 /* optional operations */
1184 static inline void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg)
1186 #ifdef TCG_TARGET_HAS_ext8s_i32
1187 tcg_gen_op2_i32(INDEX_op_ext8s_i32, ret, arg);
1189 tcg_gen_shli_i32(ret, arg, 24);
1190 tcg_gen_sari_i32(ret, ret, 24);
1194 static inline void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg)
1196 #ifdef TCG_TARGET_HAS_ext16s_i32
1197 tcg_gen_op2_i32(INDEX_op_ext16s_i32, ret, arg);
1199 tcg_gen_shli_i32(ret, arg, 16);
1200 tcg_gen_sari_i32(ret, ret, 16);
1204 /* These are currently just for convenience.
1205 We assume a target will recognise these automatically . */
1206 static inline void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg)
1208 tcg_gen_andi_i32(ret, arg, 0xffu);
1211 static inline void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg)
1213 tcg_gen_andi_i32(ret, arg, 0xffffu);
1216 /* Note: we assume the two high bytes are set to zero */
1217 static inline void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg)
1219 #ifdef TCG_TARGET_HAS_bswap16_i32
1220 tcg_gen_op2_i32(INDEX_op_bswap16_i32, ret, arg);
1223 t0 = tcg_temp_new_i32();
1224 t1 = tcg_temp_new_i32();
1226 tcg_gen_shri_i32(t0, arg, 8);
1227 tcg_gen_andi_i32(t1, arg, 0x000000ff);
1228 tcg_gen_shli_i32(t1, t1, 8);
1229 tcg_gen_or_i32(ret, t0, t1);
1230 tcg_temp_free_i32(t0);
1231 tcg_temp_free_i32(t1);
1235 static inline void tcg_gen_bswap_i32(TCGv_i32 ret, TCGv_i32 arg)
1237 #ifdef TCG_TARGET_HAS_bswap_i32
1238 tcg_gen_op2_i32(INDEX_op_bswap_i32, ret, arg);
1241 t0 = tcg_temp_new_i32();
1242 t1 = tcg_temp_new_i32();
1244 tcg_gen_shli_i32(t0, arg, 24);
1246 tcg_gen_andi_i32(t1, arg, 0x0000ff00);
1247 tcg_gen_shli_i32(t1, t1, 8);
1248 tcg_gen_or_i32(t0, t0, t1);
1250 tcg_gen_shri_i32(t1, arg, 8);
1251 tcg_gen_andi_i32(t1, t1, 0x0000ff00);
1252 tcg_gen_or_i32(t0, t0, t1);
1254 tcg_gen_shri_i32(t1, arg, 24);
1255 tcg_gen_or_i32(ret, t0, t1);
1256 tcg_temp_free_i32(t0);
1257 tcg_temp_free_i32(t1);
1261 #if TCG_TARGET_REG_BITS == 32
1262 static inline void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg)
1264 tcg_gen_ext8s_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1265 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1268 static inline void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg)
1270 tcg_gen_ext16s_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1271 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1274 static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg)
1276 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1277 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1280 static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg)
1282 tcg_gen_ext8u_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1283 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1286 static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg)
1288 tcg_gen_ext16u_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1289 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1292 static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
1294 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
1295 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1298 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
1300 tcg_gen_mov_i32(ret, TCGV_LOW(arg));
1303 static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
1305 tcg_gen_mov_i32(TCGV_LOW(ret), arg);
1306 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1309 static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
1311 tcg_gen_mov_i32(TCGV_LOW(ret), arg);
1312 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1315 static inline void tcg_gen_bswap_i64(TCGv_i64 ret, TCGv_i64 arg)
1318 t0 = tcg_temp_new_i32();
1319 t1 = tcg_temp_new_i32();
1321 tcg_gen_bswap_i32(t0, TCGV_LOW(arg));
1322 tcg_gen_bswap_i32(t1, TCGV_HIGH(arg));
1323 tcg_gen_mov_i32(TCGV_LOW(ret), t1);
1324 tcg_gen_mov_i32(TCGV_HIGH(ret), t0);
1325 tcg_temp_free_i32(t0);
1326 tcg_temp_free_i32(t1);
1330 static inline void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg)
1332 #ifdef TCG_TARGET_HAS_ext8s_i64
1333 tcg_gen_op2_i64(INDEX_op_ext8s_i64, ret, arg);
1335 tcg_gen_shli_i64(ret, arg, 56);
1336 tcg_gen_sari_i64(ret, ret, 56);
1340 static inline void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg)
1342 #ifdef TCG_TARGET_HAS_ext16s_i64
1343 tcg_gen_op2_i64(INDEX_op_ext16s_i64, ret, arg);
1345 tcg_gen_shli_i64(ret, arg, 48);
1346 tcg_gen_sari_i64(ret, ret, 48);
1350 static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg)
1352 #ifdef TCG_TARGET_HAS_ext32s_i64
1353 tcg_gen_op2_i64(INDEX_op_ext32s_i64, ret, arg);
1355 tcg_gen_shli_i64(ret, arg, 32);
1356 tcg_gen_sari_i64(ret, ret, 32);
1360 static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg)
1362 tcg_gen_andi_i64(ret, arg, 0xffu);
1365 static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg)
1367 tcg_gen_andi_i64(ret, arg, 0xffffu);
1370 static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg)
1372 tcg_gen_andi_i64(ret, arg, 0xffffffffu);
1375 /* Note: we assume the target supports move between 32 and 64 bit
1376 registers. This will probably break MIPS64 targets. */
1377 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg)
1379 tcg_gen_mov_i32(ret, MAKE_TCGV_I32(GET_TCGV_I64(arg)));
1382 /* Note: we assume the target supports move between 32 and 64 bit
1384 static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
1386 tcg_gen_andi_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)), 0xffffffffu);
1389 /* Note: we assume the target supports move between 32 and 64 bit
1391 static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg)
1393 tcg_gen_ext32s_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)));
1396 static inline void tcg_gen_bswap_i64(TCGv_i64 ret, TCGv_i64 arg)
1398 #ifdef TCG_TARGET_HAS_bswap_i64
1399 tcg_gen_op2_i64(INDEX_op_bswap_i64, ret, arg);
1402 t0 = tcg_temp_new_i32();
1403 t1 = tcg_temp_new_i32();
1405 tcg_gen_shli_i64(t0, arg, 56);
1407 tcg_gen_andi_i64(t1, arg, 0x0000ff00);
1408 tcg_gen_shli_i64(t1, t1, 40);
1409 tcg_gen_or_i64(t0, t0, t1);
1411 tcg_gen_andi_i64(t1, arg, 0x00ff0000);
1412 tcg_gen_shli_i64(t1, t1, 24);
1413 tcg_gen_or_i64(t0, t0, t1);
1415 tcg_gen_andi_i64(t1, arg, 0xff000000);
1416 tcg_gen_shli_i64(t1, t1, 8);
1417 tcg_gen_or_i64(t0, t0, t1);
1419 tcg_gen_shri_i64(t1, arg, 8);
1420 tcg_gen_andi_i64(t1, t1, 0xff000000);
1421 tcg_gen_or_i64(t0, t0, t1);
1423 tcg_gen_shri_i64(t1, arg, 24);
1424 tcg_gen_andi_i64(t1, t1, 0x00ff0000);
1425 tcg_gen_or_i64(t0, t0, t1);
1427 tcg_gen_shri_i64(t1, arg, 40);
1428 tcg_gen_andi_i64(t1, t1, 0x0000ff00);
1429 tcg_gen_or_i64(t0, t0, t1);
1431 tcg_gen_shri_i64(t1, arg, 56);
1432 tcg_gen_or_i64(ret, t0, t1);
1433 tcg_temp_free_i32(t0);
1434 tcg_temp_free_i32(t1);
1440 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
1442 #ifdef TCG_TARGET_HAS_neg_i32
1443 tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
1445 TCGv_i32 t0 = tcg_const_i32(0);
1446 tcg_gen_sub_i32(ret, t0, arg);
1447 tcg_temp_free_i32(t0);
1451 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
1453 #ifdef TCG_TARGET_HAS_neg_i64
1454 tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
1456 TCGv_i64 t0 = tcg_const_i64(0);
1457 tcg_gen_sub_i64(ret, t0, arg);
1458 tcg_temp_free_i64(t0);
1462 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
1464 #ifdef TCG_TARGET_HAS_not_i32
1465 tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
1467 tcg_gen_xori_i32(ret, arg, -1);
1471 static inline void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg)
1473 #ifdef TCG_TARGET_HAS_not_i64
1474 tcg_gen_op2_i64(INDEX_op_not_i64, ret, arg);
1476 tcg_gen_xori_i64(ret, arg, -1);
1480 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
1482 tcg_gen_op1_i32(INDEX_op_discard, arg);
1485 #if TCG_TARGET_REG_BITS == 32
1486 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
1488 tcg_gen_discard_i32(TCGV_LOW(arg));
1489 tcg_gen_discard_i32(TCGV_HIGH(arg));
1492 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
1494 tcg_gen_op1_i64(INDEX_op_discard, arg);
1498 static inline void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high)
1500 #if TCG_TARGET_REG_BITS == 32
1501 tcg_gen_mov_i32(TCGV_LOW(dest), low);
1502 tcg_gen_mov_i32(TCGV_HIGH(dest), high);
1504 TCGv_i64 tmp = tcg_temp_new_i64();
1505 /* This extension is only needed for type correctness.
1506 We may be able to do better given target specific information. */
1507 tcg_gen_extu_i32_i64(tmp, high);
1508 tcg_gen_shli_i64(tmp, tmp, 32);
1509 tcg_gen_extu_i32_i64(dest, low);
1510 tcg_gen_or_i64(dest, dest, tmp);
1511 tcg_temp_free_i64(tmp);
1515 static inline void tcg_gen_concat32_i64(TCGv_i64 dest, TCGv_i64 low, TCGv_i64 high)
1517 #if TCG_TARGET_REG_BITS == 32
1518 tcg_gen_concat_i32_i64(dest, TCGV_LOW(low), TCGV_LOW(high));
1520 TCGv_i64 tmp = tcg_temp_new_i64();
1521 tcg_gen_ext32u_i64(dest, low);
1522 tcg_gen_shli_i64(tmp, high, 32);
1523 tcg_gen_or_i64(dest, dest, tmp);
1524 tcg_temp_free_i64(tmp);
1528 static inline void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1531 t0 = tcg_temp_new_i32();
1532 tcg_gen_not_i32(t0, arg2);
1533 tcg_gen_and_i32(ret, arg1, t0);
1534 tcg_temp_free_i32(t0);
1537 static inline void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1540 t0 = tcg_temp_new_i64();
1541 tcg_gen_not_i64(t0, arg2);
1542 tcg_gen_and_i64(ret, arg1, t0);
1543 tcg_temp_free_i64(t0);
1546 static inline void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1548 tcg_gen_xor_i32(ret, arg1, arg2);
1549 tcg_gen_not_i32(ret, ret);
1552 static inline void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1554 tcg_gen_xor_i64(ret, arg1, arg2);
1555 tcg_gen_not_i64(ret, ret);
1558 static inline void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1560 tcg_gen_and_i32(ret, arg1, arg2);
1561 tcg_gen_not_i32(ret, ret);
1564 static inline void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1566 tcg_gen_and_i64(ret, arg1, arg2);
1567 tcg_gen_not_i64(ret, ret);
1570 static inline void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1572 tcg_gen_or_i32(ret, arg1, arg2);
1573 tcg_gen_not_i32(ret, ret);
1576 static inline void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1578 tcg_gen_or_i64(ret, arg1, arg2);
1579 tcg_gen_not_i64(ret, ret);
1582 static inline void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1585 t0 = tcg_temp_new_i32();
1586 tcg_gen_not_i32(t0, arg2);
1587 tcg_gen_or_i32(ret, arg1, t0);
1588 tcg_temp_free_i32(t0);
1591 static inline void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1594 t0 = tcg_temp_new_i64();
1595 tcg_gen_not_i64(t0, arg2);
1596 tcg_gen_or_i64(ret, arg1, t0);
1597 tcg_temp_free_i64(t0);
1600 static inline void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1602 #ifdef TCG_TARGET_HAS_rot_i32
1603 tcg_gen_op3_i32(INDEX_op_rotl_i32, ret, arg1, arg2);
1607 t0 = tcg_temp_new_i32();
1608 t1 = tcg_temp_new_i32();
1609 tcg_gen_shl_i32(t0, arg1, arg2);
1610 tcg_gen_subfi_i32(t1, 32, arg2);
1611 tcg_gen_shr_i32(t1, arg1, t1);
1612 tcg_gen_or_i32(ret, t0, t1);
1613 tcg_temp_free_i32(t0);
1614 tcg_temp_free_i32(t1);
1618 static inline void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1620 #ifdef TCG_TARGET_HAS_rot_i64
1621 tcg_gen_op3_i64(INDEX_op_rotl_i64, ret, arg1, arg2);
1625 t0 = tcg_temp_new_i64();
1626 t1 = tcg_temp_new_i64();
1627 tcg_gen_shl_i64(t0, arg1, arg2);
1628 tcg_gen_subfi_i64(t1, 64, arg2);
1629 tcg_gen_shr_i64(t1, arg1, t1);
1630 tcg_gen_or_i64(ret, t0, t1);
1631 tcg_temp_free_i64(t0);
1632 tcg_temp_free_i64(t1);
1636 static inline void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
1638 /* some cases can be optimized here */
1640 tcg_gen_mov_i32(ret, arg1);
1642 #ifdef TCG_TARGET_HAS_rot_i32
1643 TCGv_i32 t0 = tcg_const_i32(arg2);
1644 tcg_gen_rotl_i32(ret, arg1, t0);
1645 tcg_temp_free_i32(t0);
1648 t0 = tcg_temp_new_i32();
1649 t1 = tcg_temp_new_i32();
1650 tcg_gen_shli_i32(t0, arg1, arg2);
1651 tcg_gen_shri_i32(t1, arg1, 32 - arg2);
1652 tcg_gen_or_i32(ret, t0, t1);
1653 tcg_temp_free_i32(t0);
1654 tcg_temp_free_i32(t1);
1659 static inline void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1661 /* some cases can be optimized here */
1663 tcg_gen_mov_i64(ret, arg1);
1665 #ifdef TCG_TARGET_HAS_rot_i64
1666 TCGv_i64 t0 = tcg_const_i64(arg2);
1667 tcg_gen_rotl_i64(ret, arg1, t0);
1668 tcg_temp_free_i64(t0);
1671 t0 = tcg_temp_new_i64();
1672 t1 = tcg_temp_new_i64();
1673 tcg_gen_shli_i64(t0, arg1, arg2);
1674 tcg_gen_shri_i64(t1, arg1, 64 - arg2);
1675 tcg_gen_or_i64(ret, t0, t1);
1676 tcg_temp_free_i64(t0);
1677 tcg_temp_free_i64(t1);
1682 static inline void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
1684 #ifdef TCG_TARGET_HAS_rot_i32
1685 tcg_gen_op3_i32(INDEX_op_rotr_i32, ret, arg1, arg2);
1689 t0 = tcg_temp_new_i32();
1690 t1 = tcg_temp_new_i32();
1691 tcg_gen_shr_i32(t0, arg1, arg2);
1692 tcg_gen_subfi_i32(t1, 32, arg2);
1693 tcg_gen_shl_i32(t1, arg1, t1);
1694 tcg_gen_or_i32(ret, t0, t1);
1695 tcg_temp_free_i32(t0);
1696 tcg_temp_free_i32(t1);
1700 static inline void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
1702 #ifdef TCG_TARGET_HAS_rot_i64
1703 tcg_gen_op3_i64(INDEX_op_rotr_i64, ret, arg1, arg2);
1707 t0 = tcg_temp_new_i64();
1708 t1 = tcg_temp_new_i64();
1709 tcg_gen_shl_i64(t0, arg1, arg2);
1710 tcg_gen_subfi_i64(t1, 64, arg2);
1711 tcg_gen_shl_i64(t1, arg1, t1);
1712 tcg_gen_or_i64(ret, t0, t1);
1713 tcg_temp_free_i64(t0);
1714 tcg_temp_free_i64(t1);
1718 static inline void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
1720 /* some cases can be optimized here */
1722 tcg_gen_mov_i32(ret, arg1);
1724 tcg_gen_rotli_i32(ret, arg1, 32 - arg2);
1728 static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
1730 /* some cases can be optimized here */
1732 tcg_gen_mov_i64(ret, arg1);
1734 tcg_gen_rotli_i64(ret, arg1, 64 - arg2);
1738 /***************************************/
1739 /* QEMU specific operations. Their type depend on the QEMU CPU
1741 #ifndef TARGET_LONG_BITS
1742 #error must include QEMU headers
1745 #if TARGET_LONG_BITS == 32
1746 #define TCGv TCGv_i32
1747 #define tcg_temp_new() tcg_temp_new_i32()
1748 #define tcg_global_reg_new tcg_global_reg_new_i32
1749 #define tcg_global_mem_new tcg_global_mem_new_i32
1750 #define tcg_temp_local_new() tcg_temp_local_new_i32()
1751 #define tcg_temp_free tcg_temp_free_i32
1752 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32
1753 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32
1754 #define TCGV_UNUSED(x) TCGV_UNUSED_I32(x)
1755 #define TCGV_EQUAL(a, b) TCGV_EQUAL_I32(a, b)
1757 #define TCGv TCGv_i64
1758 #define tcg_temp_new() tcg_temp_new_i64()
1759 #define tcg_global_reg_new tcg_global_reg_new_i64
1760 #define tcg_global_mem_new tcg_global_mem_new_i64
1761 #define tcg_temp_local_new() tcg_temp_local_new_i64()
1762 #define tcg_temp_free tcg_temp_free_i64
1763 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64
1764 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64
1765 #define TCGV_UNUSED(x) TCGV_UNUSED_I64(x)
1766 #define TCGV_EQUAL(a, b) TCGV_EQUAL_I64(a, b)
1769 /* debug info: write the PC of the corresponding QEMU CPU instruction */
1770 static inline void tcg_gen_debug_insn_start(uint64_t pc)
1772 /* XXX: must really use a 32 bit size for TCGArg in all cases */
1773 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
1774 tcg_gen_op2ii(INDEX_op_debug_insn_start,
1775 (uint32_t)(pc), (uint32_t)(pc >> 32));
1777 tcg_gen_op1i(INDEX_op_debug_insn_start, pc);
1781 static inline void tcg_gen_exit_tb(tcg_target_long val)
1783 tcg_gen_op1i(INDEX_op_exit_tb, val);
1786 static inline void tcg_gen_goto_tb(int idx)
1788 tcg_gen_op1i(INDEX_op_goto_tb, idx);
1791 #if TCG_TARGET_REG_BITS == 32
1792 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
1794 #if TARGET_LONG_BITS == 32
1795 tcg_gen_op3i_i32(INDEX_op_qemu_ld8u, ret, addr, mem_index);
1797 tcg_gen_op4i_i32(INDEX_op_qemu_ld8u, TCGV_LOW(ret), TCGV_LOW(addr),
1798 TCGV_HIGH(addr), mem_index);
1799 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1803 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
1805 #if TARGET_LONG_BITS == 32
1806 tcg_gen_op3i_i32(INDEX_op_qemu_ld8s, ret, addr, mem_index);
1808 tcg_gen_op4i_i32(INDEX_op_qemu_ld8s, TCGV_LOW(ret), TCGV_LOW(addr),
1809 TCGV_HIGH(addr), mem_index);
1810 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1814 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
1816 #if TARGET_LONG_BITS == 32
1817 tcg_gen_op3i_i32(INDEX_op_qemu_ld16u, ret, addr, mem_index);
1819 tcg_gen_op4i_i32(INDEX_op_qemu_ld16u, TCGV_LOW(ret), TCGV_LOW(addr),
1820 TCGV_HIGH(addr), mem_index);
1821 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1825 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
1827 #if TARGET_LONG_BITS == 32
1828 tcg_gen_op3i_i32(INDEX_op_qemu_ld16s, ret, addr, mem_index);
1830 tcg_gen_op4i_i32(INDEX_op_qemu_ld16s, TCGV_LOW(ret), TCGV_LOW(addr),
1831 TCGV_HIGH(addr), mem_index);
1832 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1836 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
1838 #if TARGET_LONG_BITS == 32
1839 tcg_gen_op3i_i32(INDEX_op_qemu_ld32u, ret, addr, mem_index);
1841 tcg_gen_op4i_i32(INDEX_op_qemu_ld32u, TCGV_LOW(ret), TCGV_LOW(addr),
1842 TCGV_HIGH(addr), mem_index);
1843 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
1847 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
1849 #if TARGET_LONG_BITS == 32
1850 tcg_gen_op3i_i32(INDEX_op_qemu_ld32u, ret, addr, mem_index);
1852 tcg_gen_op4i_i32(INDEX_op_qemu_ld32u, TCGV_LOW(ret), TCGV_LOW(addr),
1853 TCGV_HIGH(addr), mem_index);
1854 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
1858 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
1860 #if TARGET_LONG_BITS == 32
1861 tcg_gen_op4i_i32(INDEX_op_qemu_ld64, TCGV_LOW(ret), TCGV_HIGH(ret), addr, mem_index);
1863 tcg_gen_op5i_i32(INDEX_op_qemu_ld64, TCGV_LOW(ret), TCGV_HIGH(ret),
1864 TCGV_LOW(addr), TCGV_HIGH(addr), mem_index);
1868 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
1870 #if TARGET_LONG_BITS == 32
1871 tcg_gen_op3i_i32(INDEX_op_qemu_st8, arg, addr, mem_index);
1873 tcg_gen_op4i_i32(INDEX_op_qemu_st8, TCGV_LOW(arg), TCGV_LOW(addr),
1874 TCGV_HIGH(addr), mem_index);
1878 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
1880 #if TARGET_LONG_BITS == 32
1881 tcg_gen_op3i_i32(INDEX_op_qemu_st16, arg, addr, mem_index);
1883 tcg_gen_op4i_i32(INDEX_op_qemu_st16, TCGV_LOW(arg), TCGV_LOW(addr),
1884 TCGV_HIGH(addr), mem_index);
1888 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
1890 #if TARGET_LONG_BITS == 32
1891 tcg_gen_op3i_i32(INDEX_op_qemu_st32, arg, addr, mem_index);
1893 tcg_gen_op4i_i32(INDEX_op_qemu_st32, TCGV_LOW(arg), TCGV_LOW(addr),
1894 TCGV_HIGH(addr), mem_index);
1898 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
1900 #if TARGET_LONG_BITS == 32
1901 tcg_gen_op4i_i32(INDEX_op_qemu_st64, TCGV_LOW(arg), TCGV_HIGH(arg), addr,
1904 tcg_gen_op5i_i32(INDEX_op_qemu_st64, TCGV_LOW(arg), TCGV_HIGH(arg),
1905 TCGV_LOW(addr), TCGV_HIGH(addr), mem_index);
1909 #define tcg_gen_ld_ptr tcg_gen_ld_i32
1910 #define tcg_gen_discard_ptr tcg_gen_discard_i32
1912 #else /* TCG_TARGET_REG_BITS == 32 */
1914 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
1916 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8u, ret, addr, mem_index);
1919 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
1921 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8s, ret, addr, mem_index);
1924 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
1926 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16u, ret, addr, mem_index);
1929 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
1931 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16s, ret, addr, mem_index);
1934 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
1936 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32u, ret, addr, mem_index);
1939 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
1941 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32s, ret, addr, mem_index);
1944 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
1946 tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_ld64, ret, addr, mem_index);
1949 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
1951 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st8, arg, addr, mem_index);
1954 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
1956 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st16, arg, addr, mem_index);
1959 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
1961 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st32, arg, addr, mem_index);
1964 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
1966 tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_st64, arg, addr, mem_index);
1969 #define tcg_gen_ld_ptr tcg_gen_ld_i64
1970 #define tcg_gen_discard_ptr tcg_gen_discard_i64
1972 #endif /* TCG_TARGET_REG_BITS != 32 */
1974 #if TARGET_LONG_BITS == 64
1975 #define TCG_TYPE_TL TCG_TYPE_I64
1976 #define tcg_gen_movi_tl tcg_gen_movi_i64
1977 #define tcg_gen_mov_tl tcg_gen_mov_i64
1978 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
1979 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
1980 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
1981 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
1982 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
1983 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
1984 #define tcg_gen_ld_tl tcg_gen_ld_i64
1985 #define tcg_gen_st8_tl tcg_gen_st8_i64
1986 #define tcg_gen_st16_tl tcg_gen_st16_i64
1987 #define tcg_gen_st32_tl tcg_gen_st32_i64
1988 #define tcg_gen_st_tl tcg_gen_st_i64
1989 #define tcg_gen_add_tl tcg_gen_add_i64
1990 #define tcg_gen_addi_tl tcg_gen_addi_i64
1991 #define tcg_gen_sub_tl tcg_gen_sub_i64
1992 #define tcg_gen_neg_tl tcg_gen_neg_i64
1993 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
1994 #define tcg_gen_subi_tl tcg_gen_subi_i64
1995 #define tcg_gen_and_tl tcg_gen_and_i64
1996 #define tcg_gen_andi_tl tcg_gen_andi_i64
1997 #define tcg_gen_or_tl tcg_gen_or_i64
1998 #define tcg_gen_ori_tl tcg_gen_ori_i64
1999 #define tcg_gen_xor_tl tcg_gen_xor_i64
2000 #define tcg_gen_xori_tl tcg_gen_xori_i64
2001 #define tcg_gen_not_tl tcg_gen_not_i64
2002 #define tcg_gen_shl_tl tcg_gen_shl_i64
2003 #define tcg_gen_shli_tl tcg_gen_shli_i64
2004 #define tcg_gen_shr_tl tcg_gen_shr_i64
2005 #define tcg_gen_shri_tl tcg_gen_shri_i64
2006 #define tcg_gen_sar_tl tcg_gen_sar_i64
2007 #define tcg_gen_sari_tl tcg_gen_sari_i64
2008 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
2009 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
2010 #define tcg_gen_mul_tl tcg_gen_mul_i64
2011 #define tcg_gen_muli_tl tcg_gen_muli_i64
2012 #define tcg_gen_discard_tl tcg_gen_discard_i64
2013 #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
2014 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
2015 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
2016 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
2017 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
2018 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
2019 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
2020 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
2021 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
2022 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
2023 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
2024 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
2025 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
2026 #define tcg_gen_andc_tl tcg_gen_andc_i64
2027 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
2028 #define tcg_gen_nand_tl tcg_gen_nand_i64
2029 #define tcg_gen_nor_tl tcg_gen_nor_i64
2030 #define tcg_gen_orc_tl tcg_gen_orc_i64
2031 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
2032 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
2033 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
2034 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
2035 #define tcg_const_tl tcg_const_i64
2036 #define tcg_const_local_tl tcg_const_local_i64
2038 #define TCG_TYPE_TL TCG_TYPE_I32
2039 #define tcg_gen_movi_tl tcg_gen_movi_i32
2040 #define tcg_gen_mov_tl tcg_gen_mov_i32
2041 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
2042 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
2043 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
2044 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
2045 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
2046 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
2047 #define tcg_gen_ld_tl tcg_gen_ld_i32
2048 #define tcg_gen_st8_tl tcg_gen_st8_i32
2049 #define tcg_gen_st16_tl tcg_gen_st16_i32
2050 #define tcg_gen_st32_tl tcg_gen_st_i32
2051 #define tcg_gen_st_tl tcg_gen_st_i32
2052 #define tcg_gen_add_tl tcg_gen_add_i32
2053 #define tcg_gen_addi_tl tcg_gen_addi_i32
2054 #define tcg_gen_sub_tl tcg_gen_sub_i32
2055 #define tcg_gen_neg_tl tcg_gen_neg_i32
2056 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
2057 #define tcg_gen_subi_tl tcg_gen_subi_i32
2058 #define tcg_gen_and_tl tcg_gen_and_i32
2059 #define tcg_gen_andi_tl tcg_gen_andi_i32
2060 #define tcg_gen_or_tl tcg_gen_or_i32
2061 #define tcg_gen_ori_tl tcg_gen_ori_i32
2062 #define tcg_gen_xor_tl tcg_gen_xor_i32
2063 #define tcg_gen_xori_tl tcg_gen_xori_i32
2064 #define tcg_gen_not_tl tcg_gen_not_i32
2065 #define tcg_gen_shl_tl tcg_gen_shl_i32
2066 #define tcg_gen_shli_tl tcg_gen_shli_i32
2067 #define tcg_gen_shr_tl tcg_gen_shr_i32
2068 #define tcg_gen_shri_tl tcg_gen_shri_i32
2069 #define tcg_gen_sar_tl tcg_gen_sar_i32
2070 #define tcg_gen_sari_tl tcg_gen_sari_i32
2071 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
2072 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
2073 #define tcg_gen_mul_tl tcg_gen_mul_i32
2074 #define tcg_gen_muli_tl tcg_gen_muli_i32
2075 #define tcg_gen_discard_tl tcg_gen_discard_i32
2076 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
2077 #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
2078 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
2079 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
2080 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
2081 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
2082 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
2083 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
2084 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
2085 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
2086 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
2087 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
2088 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
2089 #define tcg_gen_andc_tl tcg_gen_andc_i32
2090 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
2091 #define tcg_gen_nand_tl tcg_gen_nand_i32
2092 #define tcg_gen_nor_tl tcg_gen_nor_i32
2093 #define tcg_gen_orc_tl tcg_gen_orc_i32
2094 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
2095 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
2096 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
2097 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
2098 #define tcg_const_tl tcg_const_i32
2099 #define tcg_const_local_tl tcg_const_local_i32
2102 #if TCG_TARGET_REG_BITS == 32
2103 #define tcg_gen_add_ptr tcg_gen_add_i32
2104 #define tcg_gen_addi_ptr tcg_gen_addi_i32
2105 #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
2106 #else /* TCG_TARGET_REG_BITS == 32 */
2107 #define tcg_gen_add_ptr tcg_gen_add_i64
2108 #define tcg_gen_addi_ptr tcg_gen_addi_i64
2109 #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
2110 #endif /* TCG_TARGET_REG_BITS != 32 */