2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to suppress various consistency checks (faster) */
28 /* define it to use liveness analysis (better code) */
29 #define USE_LIVENESS_ANALYSIS
42 #include "qemu-common.h"
44 /* Note: the long term plan is to reduce the dependancies on the QEMU
45 CPU definitions. Currently they are used for qemu_ld/st
47 #define NO_CPU_IO_DEFS
55 static void patch_reloc(uint8_t *code_ptr, int type,
56 tcg_target_long value, tcg_target_long addend);
58 TCGOpDef tcg_op_defs[] = {
59 #define DEF(s, n, copy_size) { #s, 0, 0, n, n, 0, copy_size },
60 #define DEF2(s, iargs, oargs, cargs, flags) { #s, iargs, oargs, cargs, iargs + oargs + cargs, flags, 0 },
66 TCGRegSet tcg_target_available_regs[2];
67 TCGRegSet tcg_target_call_clobber_regs;
69 /* XXX: move that inside the context */
70 uint16_t *gen_opc_ptr;
71 TCGArg *gen_opparam_ptr;
73 static inline void tcg_out8(TCGContext *s, uint8_t v)
78 static inline void tcg_out16(TCGContext *s, uint16_t v)
80 *(uint16_t *)s->code_ptr = v;
84 static inline void tcg_out32(TCGContext *s, uint32_t v)
86 *(uint32_t *)s->code_ptr = v;
90 /* label relocation processing */
92 void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
93 int label_index, long addend)
98 l = &s->labels[label_index];
100 /* FIXME: This may break relocations on RISC targets that
101 modify instruction fields in place. The caller may not have
102 written the initial value. */
103 patch_reloc(code_ptr, type, l->u.value, addend);
105 /* add a new relocation entry */
106 r = tcg_malloc(sizeof(TCGRelocation));
110 r->next = l->u.first_reloc;
111 l->u.first_reloc = r;
115 static void tcg_out_label(TCGContext *s, int label_index,
116 tcg_target_long value)
121 l = &s->labels[label_index];
124 r = l->u.first_reloc;
126 patch_reloc(r->ptr, r->type, value, r->addend);
133 int gen_new_label(void)
135 TCGContext *s = &tcg_ctx;
139 if (s->nb_labels >= TCG_MAX_LABELS)
141 idx = s->nb_labels++;
144 l->u.first_reloc = NULL;
148 #include "tcg-target.c"
150 /* pool based memory allocation */
151 void *tcg_malloc_internal(TCGContext *s, int size)
156 if (size > TCG_POOL_CHUNK_SIZE) {
157 /* big malloc: insert a new pool (XXX: could optimize) */
158 p = qemu_malloc(sizeof(TCGPool) + size);
161 s->pool_current->next = p;
164 p->next = s->pool_current;
174 pool_size = TCG_POOL_CHUNK_SIZE;
175 p = qemu_malloc(sizeof(TCGPool) + pool_size);
179 s->pool_current->next = p;
188 s->pool_cur = p->data + size;
189 s->pool_end = p->data + p->size;
193 void tcg_pool_reset(TCGContext *s)
195 s->pool_cur = s->pool_end = NULL;
196 s->pool_current = NULL;
199 /* free all the pool */
200 void tcg_pool_free(TCGContext *s)
204 for(p = s->pool_first; p != NULL; p = p1) {
208 s->pool_first = NULL;
209 s->pool_cur = s->pool_end = NULL;
212 void tcg_context_init(TCGContext *s)
214 int op, total_args, n;
216 TCGArgConstraint *args_ct;
219 memset(s, 0, sizeof(*s));
220 s->temps = s->static_temps;
223 /* Count total number of arguments and allocate the corresponding
226 for(op = 0; op < NB_OPS; op++) {
227 def = &tcg_op_defs[op];
228 n = def->nb_iargs + def->nb_oargs;
232 args_ct = qemu_malloc(sizeof(TCGArgConstraint) * total_args);
233 sorted_args = qemu_malloc(sizeof(int) * total_args);
235 for(op = 0; op < NB_OPS; op++) {
236 def = &tcg_op_defs[op];
237 def->args_ct = args_ct;
238 def->sorted_args = sorted_args;
239 n = def->nb_iargs + def->nb_oargs;
246 /* init global prologue and epilogue */
247 s->code_buf = code_gen_prologue;
248 s->code_ptr = s->code_buf;
249 tcg_target_qemu_prologue(s);
250 flush_icache_range((unsigned long)s->code_buf,
251 (unsigned long)s->code_ptr);
254 void tcg_set_frame(TCGContext *s, int reg,
255 tcg_target_long start, tcg_target_long size)
257 s->frame_start = start;
258 s->frame_end = start + size;
262 void tcg_set_macro_func(TCGContext *s, TCGMacroFunc *func)
264 s->macro_func = func;
267 void tcg_func_start(TCGContext *s)
270 s->nb_temps = s->nb_globals;
271 s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS);
273 s->current_frame_offset = s->frame_start;
275 gen_opc_ptr = gen_opc_buf;
276 gen_opparam_ptr = gen_opparam_buf;
279 static inline void tcg_temp_alloc(TCGContext *s, int n)
281 if (n > TCG_MAX_TEMPS)
285 TCGv tcg_global_reg_new(TCGType type, int reg, const char *name)
287 TCGContext *s = &tcg_ctx;
291 #if TCG_TARGET_REG_BITS == 32
292 if (type != TCG_TYPE_I32)
295 if (tcg_regset_test_reg(s->reserved_regs, reg))
298 tcg_temp_alloc(s, s->nb_globals + 1);
299 ts = &s->temps[s->nb_globals];
300 ts->base_type = type;
304 ts->val_type = TEMP_VAL_REG;
307 tcg_regset_set_reg(s->reserved_regs, reg);
308 return MAKE_TCGV(idx);
311 #if TCG_TARGET_REG_BITS == 32
312 /* temporary hack to avoid register shortage for tcg_qemu_st64() */
313 TCGv tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2,
316 TCGContext *s = &tcg_ctx;
321 if (type != TCG_TYPE_I64)
324 tcg_temp_alloc(s, s->nb_globals + 2);
325 ts = &s->temps[s->nb_globals];
326 ts->base_type = type;
327 ts->type = TCG_TYPE_I32;
330 ts->val_type = TEMP_VAL_REG;
331 pstrcpy(buf, sizeof(buf), name);
332 pstrcat(buf, sizeof(buf), "_0");
333 ts->name = strdup(buf);
336 ts->base_type = type;
337 ts->type = TCG_TYPE_I32;
340 ts->val_type = TEMP_VAL_REG;
341 pstrcpy(buf, sizeof(buf), name);
342 pstrcat(buf, sizeof(buf), "_1");
343 ts->name = strdup(buf);
346 return MAKE_TCGV(idx);
350 TCGv tcg_global_mem_new(TCGType type, int reg, tcg_target_long offset,
353 TCGContext *s = &tcg_ctx;
358 #if TCG_TARGET_REG_BITS == 32
359 if (type == TCG_TYPE_I64) {
361 tcg_temp_alloc(s, s->nb_globals + 1);
362 ts = &s->temps[s->nb_globals];
363 ts->base_type = type;
364 ts->type = TCG_TYPE_I32;
366 ts->mem_allocated = 1;
368 #ifdef TCG_TARGET_WORDS_BIGENDIAN
369 ts->mem_offset = offset + 4;
371 ts->mem_offset = offset;
373 ts->val_type = TEMP_VAL_MEM;
374 pstrcpy(buf, sizeof(buf), name);
375 pstrcat(buf, sizeof(buf), "_0");
376 ts->name = strdup(buf);
379 ts->base_type = type;
380 ts->type = TCG_TYPE_I32;
382 ts->mem_allocated = 1;
384 #ifdef TCG_TARGET_WORDS_BIGENDIAN
385 ts->mem_offset = offset;
387 ts->mem_offset = offset + 4;
389 ts->val_type = TEMP_VAL_MEM;
390 pstrcpy(buf, sizeof(buf), name);
391 pstrcat(buf, sizeof(buf), "_1");
392 ts->name = strdup(buf);
398 tcg_temp_alloc(s, s->nb_globals + 1);
399 ts = &s->temps[s->nb_globals];
400 ts->base_type = type;
403 ts->mem_allocated = 1;
405 ts->mem_offset = offset;
406 ts->val_type = TEMP_VAL_MEM;
410 return MAKE_TCGV(idx);
413 TCGv tcg_temp_new(TCGType type)
415 TCGContext *s = &tcg_ctx;
420 #if TCG_TARGET_REG_BITS == 32
421 if (type == TCG_TYPE_I64) {
422 tcg_temp_alloc(s, s->nb_temps + 1);
423 ts = &s->temps[s->nb_temps];
424 ts->base_type = type;
425 ts->type = TCG_TYPE_I32;
427 ts->val_type = TEMP_VAL_DEAD;
428 ts->mem_allocated = 0;
431 ts->base_type = TCG_TYPE_I32;
432 ts->type = TCG_TYPE_I32;
433 ts->val_type = TEMP_VAL_DEAD;
435 ts->mem_allocated = 0;
441 tcg_temp_alloc(s, s->nb_temps + 1);
442 ts = &s->temps[s->nb_temps];
443 ts->base_type = type;
446 ts->val_type = TEMP_VAL_DEAD;
447 ts->mem_allocated = 0;
451 return MAKE_TCGV(idx);
454 TCGv tcg_const_i32(int32_t val)
456 TCGContext *s = &tcg_ctx;
461 tcg_temp_alloc(s, idx + 1);
463 ts->base_type = ts->type = TCG_TYPE_I32;
464 ts->val_type = TEMP_VAL_CONST;
468 return MAKE_TCGV(idx);
471 TCGv tcg_const_i64(int64_t val)
473 TCGContext *s = &tcg_ctx;
478 #if TCG_TARGET_REG_BITS == 32
479 tcg_temp_alloc(s, idx + 2);
481 ts->base_type = TCG_TYPE_I64;
482 ts->type = TCG_TYPE_I32;
483 ts->val_type = TEMP_VAL_CONST;
487 ts->base_type = TCG_TYPE_I32;
488 ts->type = TCG_TYPE_I32;
489 ts->val_type = TEMP_VAL_CONST;
494 tcg_temp_alloc(s, idx + 1);
496 ts->base_type = ts->type = TCG_TYPE_I64;
497 ts->val_type = TEMP_VAL_CONST;
502 return MAKE_TCGV(idx);
505 void tcg_register_helper(void *func, const char *name)
507 TCGContext *s = &tcg_ctx;
509 if ((s->nb_helpers + 1) > s->allocated_helpers) {
510 n = s->allocated_helpers;
516 s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo));
517 s->allocated_helpers = n;
519 s->helpers[s->nb_helpers].func = func;
520 s->helpers[s->nb_helpers].name = name;
524 const char *tcg_helper_get_name(TCGContext *s, void *func)
528 for(i = 0; i < s->nb_helpers; i++) {
529 if (s->helpers[i].func == func)
530 return s->helpers[i].name;
535 static inline TCGType tcg_get_base_type(TCGContext *s, TCGv arg)
537 return s->temps[GET_TCGV(arg)].base_type;
540 static void tcg_gen_call_internal(TCGContext *s, TCGv func,
542 unsigned int nb_rets, const TCGv *rets,
543 unsigned int nb_params, const TCGv *params)
546 *gen_opc_ptr++ = INDEX_op_call;
547 *gen_opparam_ptr++ = (nb_rets << 16) | (nb_params + 1);
548 for(i = 0; i < nb_rets; i++) {
549 *gen_opparam_ptr++ = GET_TCGV(rets[i]);
551 for(i = 0; i < nb_params; i++) {
552 *gen_opparam_ptr++ = GET_TCGV(params[i]);
554 *gen_opparam_ptr++ = GET_TCGV(func);
556 *gen_opparam_ptr++ = flags;
557 /* total parameters, needed to go backward in the instruction stream */
558 *gen_opparam_ptr++ = 1 + nb_rets + nb_params + 3;
562 #if TCG_TARGET_REG_BITS < 64
563 /* Note: we convert the 64 bit args to 32 bit */
564 void tcg_gen_call(TCGContext *s, TCGv func, unsigned int flags,
565 unsigned int nb_rets, const TCGv *rets,
566 unsigned int nb_params, const TCGv *args1)
568 TCGv ret, *args2, rets_2[2], arg;
573 if (tcg_get_base_type(s, ret) == TCG_TYPE_I64) {
576 rets_2[1] = TCGV_HIGH(ret);
580 args2 = alloca((nb_params * 2) * sizeof(TCGv));
582 call_type = (flags & TCG_CALL_TYPE_MASK);
583 for(i = 0; i < nb_params; i++) {
585 if (tcg_get_base_type(s, arg) == TCG_TYPE_I64) {
586 #ifdef TCG_TARGET_I386
587 /* REGPARM case: if the third parameter is 64 bit, it is
588 allocated on the stack */
589 if (j == 2 && call_type == TCG_CALL_TYPE_REGPARM) {
590 call_type = TCG_CALL_TYPE_REGPARM_2;
591 flags = (flags & ~TCG_CALL_TYPE_MASK) | call_type;
594 args2[j++] = TCGV_HIGH(arg);
596 #ifdef TCG_TARGET_WORDS_BIGENDIAN
597 args2[j++] = TCGV_HIGH(arg);
601 args2[j++] = TCGV_HIGH(arg);
608 tcg_gen_call_internal(s, func, flags,
609 nb_rets, rets, j, args2);
612 void tcg_gen_call(TCGContext *s, TCGv func, unsigned int flags,
613 unsigned int nb_rets, const TCGv *rets,
614 unsigned int nb_params, const TCGv *args1)
616 tcg_gen_call_internal(s, func, flags,
617 nb_rets, rets, nb_params, args1);
621 #if TCG_TARGET_REG_BITS == 32
622 void tcg_gen_shifti_i64(TCGv ret, TCGv arg1,
623 int c, int right, int arith)
631 tcg_gen_sari_i32(ret, TCGV_HIGH(arg1), c);
632 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31);
634 tcg_gen_shri_i32(ret, TCGV_HIGH(arg1), c);
635 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
638 tcg_gen_shli_i32(TCGV_HIGH(ret), arg1, c);
639 tcg_gen_movi_i32(ret, 0);
644 t0 = tcg_temp_new(TCG_TYPE_I32);
645 t1 = tcg_temp_new(TCG_TYPE_I32);
647 tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c);
649 tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c);
651 tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c);
652 tcg_gen_shri_i32(ret, arg1, c);
653 tcg_gen_or_i32(ret, ret, t0);
654 tcg_gen_mov_i32(TCGV_HIGH(ret), t1);
656 tcg_gen_shri_i32(t0, arg1, 32 - c);
657 /* Note: ret can be the same as arg1, so we use t1 */
658 tcg_gen_shli_i32(t1, arg1, c);
659 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c);
660 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0);
661 tcg_gen_mov_i32(ret, t1);
667 void tcg_reg_alloc_start(TCGContext *s)
671 for(i = 0; i < s->nb_globals; i++) {
674 ts->val_type = TEMP_VAL_REG;
676 ts->val_type = TEMP_VAL_MEM;
679 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
680 s->reg_to_temp[i] = -1;
684 static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size,
690 if (idx < s->nb_globals) {
691 pstrcpy(buf, buf_size, ts->name);
693 if (ts->val_type == TEMP_VAL_CONST) {
694 snprintf(buf, buf_size, "$0x%" TCG_PRIlx , ts->val);
696 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
702 char *tcg_get_arg_str(TCGContext *s, char *buf, int buf_size, TCGv arg)
704 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV(arg));
707 void tcg_dump_ops(TCGContext *s, FILE *outfile)
709 const uint16_t *opc_ptr;
712 int c, i, k, nb_oargs, nb_iargs, nb_cargs;
716 opc_ptr = gen_opc_buf;
717 args = gen_opparam_buf;
718 while (opc_ptr < gen_opc_ptr) {
720 def = &tcg_op_defs[c];
721 fprintf(outfile, " %s ", def->name);
722 if (c == INDEX_op_call) {
724 /* variable number of arguments */
726 nb_oargs = arg >> 16;
727 nb_iargs = arg & 0xffff;
728 nb_cargs = def->nb_cargs;
731 /* XXX: dump helper name for call */
732 fprintf(outfile, "%s",
733 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[nb_oargs + nb_iargs - 1]));
735 fprintf(outfile, ",$0x%" TCG_PRIlx,
736 args[nb_oargs + nb_iargs]);
738 fprintf(outfile, ",$%d", nb_oargs);
739 for(i = 0; i < nb_oargs; i++) {
740 fprintf(outfile, ",");
741 fprintf(outfile, "%s",
742 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[i]));
744 for(i = 0; i < (nb_iargs - 1); i++) {
745 fprintf(outfile, ",");
746 fprintf(outfile, "%s",
747 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[nb_oargs + i]));
750 if (c == INDEX_op_nopn) {
751 /* variable number of arguments */
756 nb_oargs = def->nb_oargs;
757 nb_iargs = def->nb_iargs;
758 nb_cargs = def->nb_cargs;
762 for(i = 0; i < nb_oargs; i++) {
764 fprintf(outfile, ",");
765 fprintf(outfile, "%s",
766 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++]));
768 for(i = 0; i < nb_iargs; i++) {
770 fprintf(outfile, ",");
771 fprintf(outfile, "%s",
772 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++]));
774 for(i = 0; i < nb_cargs; i++) {
776 fprintf(outfile, ",");
778 fprintf(outfile, "$0x%" TCG_PRIlx, arg);
781 fprintf(outfile, "\n");
782 args += nb_iargs + nb_oargs + nb_cargs;
786 /* we give more priority to constraints with less registers */
787 static int get_constraint_priority(const TCGOpDef *def, int k)
789 const TCGArgConstraint *arg_ct;
792 arg_ct = &def->args_ct[k];
793 if (arg_ct->ct & TCG_CT_ALIAS) {
794 /* an alias is equivalent to a single register */
797 if (!(arg_ct->ct & TCG_CT_REG))
800 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
801 if (tcg_regset_test_reg(arg_ct->u.regs, i))
805 return TCG_TARGET_NB_REGS - n + 1;
808 /* sort from highest priority to lowest */
809 static void sort_constraints(TCGOpDef *def, int start, int n)
811 int i, j, p1, p2, tmp;
813 for(i = 0; i < n; i++)
814 def->sorted_args[start + i] = start + i;
817 for(i = 0; i < n - 1; i++) {
818 for(j = i + 1; j < n; j++) {
819 p1 = get_constraint_priority(def, def->sorted_args[start + i]);
820 p2 = get_constraint_priority(def, def->sorted_args[start + j]);
822 tmp = def->sorted_args[start + i];
823 def->sorted_args[start + i] = def->sorted_args[start + j];
824 def->sorted_args[start + j] = tmp;
830 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
841 assert(op >= 0 && op < NB_OPS);
842 def = &tcg_op_defs[op];
843 nb_args = def->nb_iargs + def->nb_oargs;
844 for(i = 0; i < nb_args; i++) {
845 ct_str = tdefs->args_ct_str[i];
846 tcg_regset_clear(def->args_ct[i].u.regs);
847 def->args_ct[i].ct = 0;
848 if (ct_str[0] >= '0' && ct_str[0] <= '9') {
850 oarg = ct_str[0] - '0';
851 assert(oarg < def->nb_oargs);
852 assert(def->args_ct[oarg].ct & TCG_CT_REG);
853 /* TCG_CT_ALIAS is for the output arguments. The input
854 argument is tagged with TCG_CT_IALIAS. */
855 def->args_ct[i] = def->args_ct[oarg];
856 def->args_ct[oarg].ct = TCG_CT_ALIAS;
857 def->args_ct[oarg].alias_index = i;
858 def->args_ct[i].ct |= TCG_CT_IALIAS;
859 def->args_ct[i].alias_index = oarg;
866 def->args_ct[i].ct |= TCG_CT_CONST;
870 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) {
871 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n",
872 ct_str, i, def->name);
880 /* sort the constraints (XXX: this is just an heuristic) */
881 sort_constraints(def, 0, def->nb_oargs);
882 sort_constraints(def, def->nb_oargs, def->nb_iargs);
888 printf("%s: sorted=", def->name);
889 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++)
890 printf(" %d", def->sorted_args[i]);
899 #ifdef USE_LIVENESS_ANALYSIS
901 /* set a nop for an operation using 'nb_args' */
902 static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr,
903 TCGArg *args, int nb_args)
906 *opc_ptr = INDEX_op_nop;
908 *opc_ptr = INDEX_op_nopn;
910 args[nb_args - 1] = nb_args;
914 /* liveness analysis: end of basic block: globals are live, temps are dead */
915 static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps)
917 memset(dead_temps, 0, s->nb_globals);
918 memset(dead_temps + s->nb_globals, 1, s->nb_temps - s->nb_globals);
921 /* Liveness analysis : update the opc_dead_iargs array to tell if a
922 given input arguments is dead. Instructions updating dead
923 temporaries are removed. */
924 void tcg_liveness_analysis(TCGContext *s)
926 int i, op_index, op, nb_args, nb_iargs, nb_oargs, arg, nb_ops;
930 unsigned int dead_iargs;
932 gen_opc_ptr++; /* skip end */
934 nb_ops = gen_opc_ptr - gen_opc_buf;
936 /* XXX: make it really dynamic */
937 s->op_dead_iargs = tcg_malloc(OPC_BUF_SIZE * sizeof(uint16_t));
939 dead_temps = tcg_malloc(s->nb_temps);
940 memset(dead_temps, 1, s->nb_temps);
942 args = gen_opparam_ptr;
943 op_index = nb_ops - 1;
944 while (op_index >= 0) {
945 op = gen_opc_buf[op_index];
946 def = &tcg_op_defs[op];
951 nb_iargs = args[0] & 0xffff;
952 nb_oargs = args[0] >> 16;
955 /* output args are dead */
956 for(i = 0; i < nb_oargs; i++) {
961 /* globals are live (they may be used by the call) */
962 memset(dead_temps, 0, s->nb_globals);
964 /* input args are live */
966 for(i = 0; i < nb_iargs; i++) {
967 arg = args[i + nb_oargs];
968 if (dead_temps[arg]) {
969 dead_iargs |= (1 << i);
973 s->op_dead_iargs[op_index] = dead_iargs;
976 case INDEX_op_set_label:
978 /* mark end of basic block */
979 tcg_la_bb_end(s, dead_temps);
985 case INDEX_op_discard:
987 /* mark the temporary as dead */
988 dead_temps[args[0]] = 1;
990 case INDEX_op_macro_2:
992 int dead_args[2], macro_id;
993 int saved_op_index, saved_arg_index;
994 int macro_op_index, macro_arg_index;
995 int macro_end_op_index, macro_end_arg_index;
1000 dead_args[0] = dead_temps[args[0]];
1001 dead_args[1] = dead_temps[args[1]];
1004 /* call the macro function which generate code
1005 depending on the live outputs */
1006 saved_op_index = op_index;
1007 saved_arg_index = args - gen_opparam_buf;
1009 /* add a macro start instruction */
1010 *gen_opc_ptr++ = INDEX_op_macro_start;
1011 *gen_opparam_ptr++ = saved_op_index;
1012 *gen_opparam_ptr++ = saved_arg_index;
1014 macro_op_index = gen_opc_ptr - gen_opc_buf;
1015 macro_arg_index = gen_opparam_ptr - gen_opparam_buf;
1017 last_nb_temps = s->nb_temps;
1019 s->macro_func(s, macro_id, dead_args);
1021 /* realloc temp info (XXX: make it faster) */
1022 if (s->nb_temps > last_nb_temps) {
1023 uint8_t *new_dead_temps;
1025 new_dead_temps = tcg_malloc(s->nb_temps);
1026 memcpy(new_dead_temps, dead_temps, last_nb_temps);
1027 memset(new_dead_temps + last_nb_temps, 1,
1028 s->nb_temps - last_nb_temps);
1029 dead_temps = new_dead_temps;
1032 macro_end_op_index = gen_opc_ptr - gen_opc_buf;
1033 macro_end_arg_index = gen_opparam_ptr - gen_opparam_buf;
1035 /* end of macro: add a goto to the next instruction */
1036 *gen_opc_ptr++ = INDEX_op_macro_end;
1037 *gen_opparam_ptr++ = op_index + 1;
1038 *gen_opparam_ptr++ = saved_arg_index + nb_args;
1040 /* modify the macro operation to be a macro_goto */
1041 gen_opc_buf[op_index] = INDEX_op_macro_goto;
1042 args[0] = macro_op_index;
1043 args[1] = macro_arg_index;
1044 args[2] = 0; /* dummy third arg to match the
1047 /* set the next instruction to the end of the macro */
1048 op_index = macro_end_op_index;
1049 args = macro_end_arg_index + gen_opparam_buf;
1052 case INDEX_op_macro_start:
1055 args = gen_opparam_buf + args[1];
1057 case INDEX_op_macro_goto:
1058 case INDEX_op_macro_end:
1059 tcg_abort(); /* should never happen in liveness analysis */
1062 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1064 if (op > INDEX_op_end) {
1065 args -= def->nb_args;
1066 nb_iargs = def->nb_iargs;
1067 nb_oargs = def->nb_oargs;
1069 /* Test if the operation can be removed because all
1070 its outputs are dead. We assume that nb_oargs == 0
1071 implies side effects */
1072 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) {
1073 for(i = 0; i < nb_oargs; i++) {
1075 if (!dead_temps[arg])
1078 tcg_set_nop(s, gen_opc_buf + op_index, args, def->nb_args);
1079 #ifdef CONFIG_PROFILER
1081 extern int64_t dyngen_tcg_del_op_count;
1082 dyngen_tcg_del_op_count++;
1088 /* output args are dead */
1089 for(i = 0; i < nb_oargs; i++) {
1091 dead_temps[arg] = 1;
1094 /* if end of basic block, update */
1095 if (def->flags & TCG_OPF_BB_END) {
1096 tcg_la_bb_end(s, dead_temps);
1097 } else if (def->flags & TCG_OPF_CALL_CLOBBER) {
1098 /* globals are live */
1099 memset(dead_temps, 0, s->nb_globals);
1102 /* input args are live */
1104 for(i = 0; i < nb_iargs; i++) {
1105 arg = args[i + nb_oargs];
1106 if (dead_temps[arg]) {
1107 dead_iargs |= (1 << i);
1109 dead_temps[arg] = 0;
1111 s->op_dead_iargs[op_index] = dead_iargs;
1114 /* legacy dyngen operations */
1115 args -= def->nb_args;
1116 /* mark end of basic block */
1117 tcg_la_bb_end(s, dead_temps);
1124 if (args != gen_opparam_buf)
1128 /* dummy liveness analysis */
1129 void tcg_liveness_analysis(TCGContext *s)
1132 nb_ops = gen_opc_ptr - gen_opc_buf;
1134 s->op_dead_iargs = tcg_malloc(nb_ops * sizeof(uint16_t));
1135 memset(s->op_dead_iargs, 0, nb_ops * sizeof(uint16_t));
1140 static void dump_regs(TCGContext *s)
1146 for(i = 0; i < s->nb_temps; i++) {
1148 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i));
1149 switch(ts->val_type) {
1151 printf("%s", tcg_target_reg_names[ts->reg]);
1154 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]);
1156 case TEMP_VAL_CONST:
1157 printf("$0x%" TCG_PRIlx, ts->val);
1169 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1170 if (s->reg_to_temp[i] >= 0) {
1172 tcg_target_reg_names[i],
1173 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i]));
1178 static void check_regs(TCGContext *s)
1184 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1185 k = s->reg_to_temp[reg];
1188 if (ts->val_type != TEMP_VAL_REG ||
1190 printf("Inconsistency for register %s:\n",
1191 tcg_target_reg_names[reg]);
1196 for(k = 0; k < s->nb_temps; k++) {
1198 if (ts->val_type == TEMP_VAL_REG &&
1200 s->reg_to_temp[ts->reg] != k) {
1201 printf("Inconsistency for temp %s:\n",
1202 tcg_get_arg_str_idx(s, buf, sizeof(buf), k));
1204 printf("reg state:\n");
1208 if (ts->val_type == TEMP_VAL_CONST && k < s->nb_globals) {
1209 printf("constant forbidden in global %s\n",
1210 tcg_get_arg_str_idx(s, buf, sizeof(buf), k));
1217 static void temp_allocate_frame(TCGContext *s, int temp)
1220 ts = &s->temps[temp];
1221 s->current_frame_offset = (s->current_frame_offset + sizeof(tcg_target_long) - 1) & ~(sizeof(tcg_target_long) - 1);
1222 if (s->current_frame_offset + sizeof(tcg_target_long) > s->frame_end)
1224 ts->mem_offset = s->current_frame_offset;
1225 ts->mem_reg = s->frame_reg;
1226 ts->mem_allocated = 1;
1227 s->current_frame_offset += sizeof(tcg_target_long);
1230 /* free register 'reg' by spilling the corresponding temporary if necessary */
1231 static void tcg_reg_free(TCGContext *s, int reg)
1236 temp = s->reg_to_temp[reg];
1238 ts = &s->temps[temp];
1239 assert(ts->val_type == TEMP_VAL_REG);
1240 if (!ts->mem_coherent) {
1241 if (!ts->mem_allocated)
1242 temp_allocate_frame(s, temp);
1243 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1245 ts->val_type = TEMP_VAL_MEM;
1246 s->reg_to_temp[reg] = -1;
1250 /* Allocate a register belonging to reg1 & ~reg2 */
1251 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
1256 tcg_regset_andnot(reg_ct, reg1, reg2);
1258 /* first try free registers */
1259 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
1260 reg = tcg_target_reg_alloc_order[i];
1261 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1)
1265 /* XXX: do better spill choice */
1266 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
1267 reg = tcg_target_reg_alloc_order[i];
1268 if (tcg_regset_test_reg(reg_ct, reg)) {
1269 tcg_reg_free(s, reg);
1277 /* at the end of a basic block, we assume all temporaries are dead and
1278 all globals are stored at their canonical location */
1279 /* XXX: optimize by handling constants in another array ? */
1280 void tcg_reg_alloc_bb_end(TCGContext *s)
1285 for(i = 0; i < s->nb_globals; i++) {
1287 if (!ts->fixed_reg) {
1288 if (ts->val_type == TEMP_VAL_REG) {
1289 tcg_reg_free(s, ts->reg);
1294 for(i = s->nb_globals; i < s->nb_temps; i++) {
1296 if (ts->val_type != TEMP_VAL_CONST) {
1297 if (ts->val_type == TEMP_VAL_REG) {
1298 s->reg_to_temp[ts->reg] = -1;
1300 ts->val_type = TEMP_VAL_DEAD;
1305 #define IS_DEAD_IARG(n) ((dead_iargs >> (n)) & 1)
1307 static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
1309 unsigned int dead_iargs)
1313 const TCGArgConstraint *arg_ct;
1315 ots = &s->temps[args[0]];
1316 ts = &s->temps[args[1]];
1317 arg_ct = &def->args_ct[0];
1319 if (ts->val_type == TEMP_VAL_REG) {
1320 if (IS_DEAD_IARG(0) && !ts->fixed_reg && !ots->fixed_reg) {
1321 /* the mov can be suppressed */
1322 if (ots->val_type == TEMP_VAL_REG)
1323 s->reg_to_temp[ots->reg] = -1;
1325 s->reg_to_temp[reg] = -1;
1326 ts->val_type = TEMP_VAL_DEAD;
1328 if (ots->val_type == TEMP_VAL_REG) {
1331 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1333 if (ts->reg != reg) {
1334 tcg_out_mov(s, reg, ts->reg);
1337 } else if (ts->val_type == TEMP_VAL_MEM) {
1338 if (ots->val_type == TEMP_VAL_REG) {
1341 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1343 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1344 } else if (ts->val_type == TEMP_VAL_CONST) {
1345 if (ots->val_type == TEMP_VAL_REG) {
1348 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1350 tcg_out_movi(s, ots->type, reg, ts->val);
1354 s->reg_to_temp[reg] = args[0];
1356 ots->val_type = TEMP_VAL_REG;
1357 ots->mem_coherent = 0;
1360 static void tcg_reg_alloc_op(TCGContext *s,
1361 const TCGOpDef *def, int opc,
1363 unsigned int dead_iargs)
1365 TCGRegSet allocated_regs;
1366 int i, k, nb_iargs, nb_oargs, reg;
1368 const TCGArgConstraint *arg_ct;
1370 TCGArg new_args[TCG_MAX_OP_ARGS];
1371 int const_args[TCG_MAX_OP_ARGS];
1373 nb_oargs = def->nb_oargs;
1374 nb_iargs = def->nb_iargs;
1376 /* copy constants */
1377 memcpy(new_args + nb_oargs + nb_iargs,
1378 args + nb_oargs + nb_iargs,
1379 sizeof(TCGArg) * def->nb_cargs);
1381 /* satisfy input constraints */
1382 tcg_regset_set(allocated_regs, s->reserved_regs);
1383 for(k = 0; k < nb_iargs; k++) {
1384 i = def->sorted_args[nb_oargs + k];
1386 arg_ct = &def->args_ct[i];
1387 ts = &s->temps[arg];
1388 if (ts->val_type == TEMP_VAL_MEM) {
1389 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1390 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1391 ts->val_type = TEMP_VAL_REG;
1393 ts->mem_coherent = 1;
1394 s->reg_to_temp[reg] = arg;
1395 } else if (ts->val_type == TEMP_VAL_CONST) {
1396 if (tcg_target_const_match(ts->val, arg_ct)) {
1397 /* constant is OK for instruction */
1399 new_args[i] = ts->val;
1402 /* need to move to a register*/
1403 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1404 tcg_out_movi(s, ts->type, reg, ts->val);
1408 assert(ts->val_type == TEMP_VAL_REG);
1409 if (arg_ct->ct & TCG_CT_IALIAS) {
1410 if (ts->fixed_reg) {
1411 /* if fixed register, we must allocate a new register
1412 if the alias is not the same register */
1413 if (arg != args[arg_ct->alias_index])
1414 goto allocate_in_reg;
1416 /* if the input is aliased to an output and if it is
1417 not dead after the instruction, we must allocate
1418 a new register and move it */
1419 if (!IS_DEAD_IARG(i - nb_oargs))
1420 goto allocate_in_reg;
1424 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1425 /* nothing to do : the constraint is satisfied */
1428 /* allocate a new register matching the constraint
1429 and move the temporary register into it */
1430 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1431 tcg_out_mov(s, reg, ts->reg);
1436 tcg_regset_set_reg(allocated_regs, reg);
1440 /* mark dead temporaries and free the associated registers */
1441 for(i = 0; i < nb_iargs; i++) {
1442 arg = args[nb_oargs + i];
1443 if (IS_DEAD_IARG(i)) {
1444 ts = &s->temps[arg];
1445 if (ts->val_type != TEMP_VAL_CONST && !ts->fixed_reg) {
1446 if (ts->val_type == TEMP_VAL_REG)
1447 s->reg_to_temp[ts->reg] = -1;
1448 ts->val_type = TEMP_VAL_DEAD;
1453 if (def->flags & TCG_OPF_CALL_CLOBBER) {
1454 /* XXX: permit generic clobber register list ? */
1455 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1456 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1457 tcg_reg_free(s, reg);
1460 /* XXX: for load/store we could do that only for the slow path
1461 (i.e. when a memory callback is called) */
1463 /* store globals and free associated registers (we assume the insn
1464 can modify any global. */
1465 for(i = 0; i < s->nb_globals; i++) {
1467 if (!ts->fixed_reg) {
1468 if (ts->val_type == TEMP_VAL_REG) {
1469 tcg_reg_free(s, ts->reg);
1475 /* satisfy the output constraints */
1476 tcg_regset_set(allocated_regs, s->reserved_regs);
1477 for(k = 0; k < nb_oargs; k++) {
1478 i = def->sorted_args[k];
1480 arg_ct = &def->args_ct[i];
1481 ts = &s->temps[arg];
1482 if (arg_ct->ct & TCG_CT_ALIAS) {
1483 reg = new_args[arg_ct->alias_index];
1485 /* if fixed register, we try to use it */
1487 if (ts->fixed_reg &&
1488 tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1491 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1493 tcg_regset_set_reg(allocated_regs, reg);
1494 /* if a fixed register is used, then a move will be done afterwards */
1495 if (!ts->fixed_reg) {
1496 if (ts->val_type == TEMP_VAL_REG)
1497 s->reg_to_temp[ts->reg] = -1;
1498 ts->val_type = TEMP_VAL_REG;
1500 /* temp value is modified, so the value kept in memory is
1501 potentially not the same */
1502 ts->mem_coherent = 0;
1503 s->reg_to_temp[reg] = arg;
1509 if (def->flags & TCG_OPF_BB_END)
1510 tcg_reg_alloc_bb_end(s);
1512 /* emit instruction */
1513 tcg_out_op(s, opc, new_args, const_args);
1515 /* move the outputs in the correct register if needed */
1516 for(i = 0; i < nb_oargs; i++) {
1517 ts = &s->temps[args[i]];
1519 if (ts->fixed_reg && ts->reg != reg) {
1520 tcg_out_mov(s, ts->reg, reg);
1525 #ifdef TCG_TARGET_STACK_GROWSUP
1526 #define STACK_DIR(x) (-(x))
1528 #define STACK_DIR(x) (x)
1531 static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
1532 int opc, const TCGArg *args,
1533 unsigned int dead_iargs)
1535 int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params;
1536 TCGArg arg, func_arg;
1538 tcg_target_long stack_offset, call_stack_size, func_addr;
1539 int const_func_arg, allocate_args;
1540 TCGRegSet allocated_regs;
1541 const TCGArgConstraint *arg_ct;
1545 nb_oargs = arg >> 16;
1546 nb_iargs = arg & 0xffff;
1547 nb_params = nb_iargs - 1;
1549 flags = args[nb_oargs + nb_iargs];
1551 nb_regs = tcg_target_get_call_iarg_regs_count(flags);
1552 if (nb_regs > nb_params)
1553 nb_regs = nb_params;
1555 /* assign stack slots first */
1556 /* XXX: preallocate call stack */
1557 call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long);
1558 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) &
1559 ~(TCG_TARGET_STACK_ALIGN - 1);
1560 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE);
1561 if (allocate_args) {
1562 tcg_out_addi(s, TCG_REG_CALL_STACK, -STACK_DIR(call_stack_size));
1564 /* XXX: on some architectures it does not start at zero */
1566 for(i = nb_regs; i < nb_params; i++) {
1567 arg = args[nb_oargs + i];
1568 ts = &s->temps[arg];
1569 if (ts->val_type == TEMP_VAL_REG) {
1570 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset);
1571 } else if (ts->val_type == TEMP_VAL_MEM) {
1572 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1574 /* XXX: not correct if reading values from the stack */
1575 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1576 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
1577 } else if (ts->val_type == TEMP_VAL_CONST) {
1578 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1580 /* XXX: sign extend may be needed on some targets */
1581 tcg_out_movi(s, ts->type, reg, ts->val);
1582 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
1586 /* XXX: not necessarily in the same order */
1587 stack_offset += STACK_DIR(sizeof(tcg_target_long));
1590 /* assign input registers */
1591 tcg_regset_set(allocated_regs, s->reserved_regs);
1592 for(i = 0; i < nb_regs; i++) {
1593 arg = args[nb_oargs + i];
1594 ts = &s->temps[arg];
1595 reg = tcg_target_call_iarg_regs[i];
1596 tcg_reg_free(s, reg);
1597 if (ts->val_type == TEMP_VAL_REG) {
1598 if (ts->reg != reg) {
1599 tcg_out_mov(s, reg, ts->reg);
1601 } else if (ts->val_type == TEMP_VAL_MEM) {
1602 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1603 } else if (ts->val_type == TEMP_VAL_CONST) {
1604 /* XXX: sign extend ? */
1605 tcg_out_movi(s, ts->type, reg, ts->val);
1609 tcg_regset_set_reg(allocated_regs, reg);
1612 /* assign function address */
1613 func_arg = args[nb_oargs + nb_iargs - 1];
1614 arg_ct = &def->args_ct[0];
1615 ts = &s->temps[func_arg];
1616 func_addr = ts->val;
1618 if (ts->val_type == TEMP_VAL_MEM) {
1619 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1620 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1622 } else if (ts->val_type == TEMP_VAL_REG) {
1624 if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1625 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1626 tcg_out_mov(s, reg, ts->reg);
1629 } else if (ts->val_type == TEMP_VAL_CONST) {
1630 if (tcg_target_const_match(func_addr, arg_ct)) {
1632 func_arg = func_addr;
1634 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1635 tcg_out_movi(s, ts->type, reg, func_addr);
1642 /* mark dead temporaries and free the associated registers */
1643 for(i = 0; i < nb_params; i++) {
1644 arg = args[nb_oargs + i];
1645 if (IS_DEAD_IARG(i)) {
1646 ts = &s->temps[arg];
1647 if (ts->val_type != TEMP_VAL_CONST && !ts->fixed_reg) {
1648 if (ts->val_type == TEMP_VAL_REG)
1649 s->reg_to_temp[ts->reg] = -1;
1650 ts->val_type = TEMP_VAL_DEAD;
1655 /* clobber call registers */
1656 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1657 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1658 tcg_reg_free(s, reg);
1662 /* store globals and free associated registers (we assume the call
1663 can modify any global. */
1664 for(i = 0; i < s->nb_globals; i++) {
1666 if (!ts->fixed_reg) {
1667 if (ts->val_type == TEMP_VAL_REG) {
1668 tcg_reg_free(s, ts->reg);
1673 tcg_out_op(s, opc, &func_arg, &const_func_arg);
1675 if (allocate_args) {
1676 tcg_out_addi(s, TCG_REG_CALL_STACK, STACK_DIR(call_stack_size));
1679 /* assign output registers and emit moves if needed */
1680 for(i = 0; i < nb_oargs; i++) {
1682 ts = &s->temps[arg];
1683 reg = tcg_target_call_oarg_regs[i];
1684 tcg_reg_free(s, reg);
1685 if (ts->fixed_reg) {
1686 if (ts->reg != reg) {
1687 tcg_out_mov(s, ts->reg, reg);
1690 if (ts->val_type == TEMP_VAL_REG)
1691 s->reg_to_temp[ts->reg] = -1;
1692 ts->val_type = TEMP_VAL_REG;
1694 ts->mem_coherent = 0;
1695 s->reg_to_temp[reg] = arg;
1699 return nb_iargs + nb_oargs + def->nb_cargs + 1;
1702 #ifdef CONFIG_PROFILER
1704 static int64_t dyngen_table_op_count[NB_OPS];
1706 void dump_op_count(void)
1710 f = fopen("/tmp/op1.log", "w");
1711 for(i = 0; i < INDEX_op_end; i++) {
1712 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, dyngen_table_op_count[i]);
1715 f = fopen("/tmp/op2.log", "w");
1716 for(i = INDEX_op_end; i < NB_OPS; i++) {
1717 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, dyngen_table_op_count[i]);
1724 static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
1727 int opc, op_index, macro_op_index;
1728 const TCGOpDef *def;
1729 unsigned int dead_iargs;
1733 if (unlikely(loglevel & CPU_LOG_TB_OP)) {
1734 fprintf(logfile, "OP:\n");
1735 tcg_dump_ops(s, logfile);
1736 fprintf(logfile, "\n");
1740 tcg_liveness_analysis(s);
1743 if (unlikely(loglevel & CPU_LOG_TB_OP_OPT)) {
1744 fprintf(logfile, "OP after la:\n");
1745 tcg_dump_ops(s, logfile);
1746 fprintf(logfile, "\n");
1750 tcg_reg_alloc_start(s);
1752 s->code_buf = gen_code_buf;
1753 s->code_ptr = gen_code_buf;
1755 macro_op_index = -1;
1756 args = gen_opparam_buf;
1760 opc = gen_opc_buf[op_index];
1761 #ifdef CONFIG_PROFILER
1762 dyngen_table_op_count[opc]++;
1764 def = &tcg_op_defs[opc];
1766 printf("%s: %d %d %d\n", def->name,
1767 def->nb_oargs, def->nb_iargs, def->nb_cargs);
1771 case INDEX_op_mov_i32:
1772 #if TCG_TARGET_REG_BITS == 64
1773 case INDEX_op_mov_i64:
1775 dead_iargs = s->op_dead_iargs[op_index];
1776 tcg_reg_alloc_mov(s, def, args, dead_iargs);
1786 case INDEX_op_discard:
1789 ts = &s->temps[args[0]];
1790 /* mark the temporary as dead */
1791 if (ts->val_type != TEMP_VAL_CONST && !ts->fixed_reg) {
1792 if (ts->val_type == TEMP_VAL_REG)
1793 s->reg_to_temp[ts->reg] = -1;
1794 ts->val_type = TEMP_VAL_DEAD;
1798 case INDEX_op_macro_goto:
1799 macro_op_index = op_index; /* only used for exceptions */
1800 op_index = args[0] - 1;
1801 args = gen_opparam_buf + args[1];
1803 case INDEX_op_macro_end:
1804 macro_op_index = -1; /* only used for exceptions */
1805 op_index = args[0] - 1;
1806 args = gen_opparam_buf + args[1];
1808 case INDEX_op_macro_start:
1809 /* must never happen here */
1811 case INDEX_op_set_label:
1812 tcg_reg_alloc_bb_end(s);
1813 tcg_out_label(s, args[0], (long)s->code_ptr);
1816 dead_iargs = s->op_dead_iargs[op_index];
1817 args += tcg_reg_alloc_call(s, def, opc, args, dead_iargs);
1822 #ifdef CONFIG_DYNGEN_OP
1823 case 0 ... INDEX_op_end - 1:
1824 /* legacy dyngen ops */
1825 #ifdef CONFIG_PROFILER
1827 extern int64_t dyngen_old_op_count;
1828 dyngen_old_op_count++;
1831 tcg_reg_alloc_bb_end(s);
1832 if (search_pc >= 0) {
1833 s->code_ptr += def->copy_size;
1834 args += def->nb_args;
1836 args = dyngen_op(s, opc, args);
1841 /* Note: in order to speed up the code, it would be much
1842 faster to have specialized register allocator functions for
1843 some common argument patterns */
1844 dead_iargs = s->op_dead_iargs[op_index];
1845 tcg_reg_alloc_op(s, def, opc, args, dead_iargs);
1848 args += def->nb_args;
1850 if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) {
1851 if (macro_op_index >= 0)
1852 return macro_op_index;
1865 int dyngen_code(TCGContext *s, uint8_t *gen_code_buf)
1867 #ifdef CONFIG_PROFILER
1869 extern int64_t dyngen_op_count;
1870 extern int dyngen_op_count_max;
1872 n = (gen_opc_ptr - gen_opc_buf);
1873 dyngen_op_count += n;
1874 if (n > dyngen_op_count_max)
1875 dyngen_op_count_max = n;
1879 tcg_gen_code_common(s, gen_code_buf, -1);
1881 /* flush instruction cache */
1882 flush_icache_range((unsigned long)gen_code_buf,
1883 (unsigned long)s->code_ptr);
1884 return s->code_ptr - gen_code_buf;
1887 /* Return the index of the micro operation such as the pc after is <
1888 offset bytes from the start of the TB. The contents of gen_code_buf must
1889 not be changed, though writing the same values is ok.
1890 Return -1 if not found. */
1891 int dyngen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset)
1893 return tcg_gen_code_common(s, gen_code_buf, offset);