2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to suppress various consistency checks (faster) */
28 /* define it to use liveness analysis (better code) */
29 #define USE_LIVENESS_ANALYSIS
45 #include "qemu-common.h"
46 #include "cache-utils.h"
48 /* Note: the long term plan is to reduce the dependancies on the QEMU
49 CPU definitions. Currently they are used for qemu_ld/st
51 #define NO_CPU_IO_DEFS
59 static void patch_reloc(uint8_t *code_ptr, int type,
60 tcg_target_long value, tcg_target_long addend);
62 static TCGOpDef tcg_op_defs[] = {
63 #define DEF(s, n, copy_size) { #s, 0, 0, n, n, 0, copy_size },
64 #define DEF2(s, iargs, oargs, cargs, flags) { #s, iargs, oargs, cargs, iargs + oargs + cargs, flags, 0 },
70 static TCGRegSet tcg_target_available_regs[2];
71 static TCGRegSet tcg_target_call_clobber_regs;
73 /* XXX: move that inside the context */
74 uint16_t *gen_opc_ptr;
75 TCGArg *gen_opparam_ptr;
77 static inline void tcg_out8(TCGContext *s, uint8_t v)
82 static inline void tcg_out16(TCGContext *s, uint16_t v)
84 *(uint16_t *)s->code_ptr = v;
88 static inline void tcg_out32(TCGContext *s, uint32_t v)
90 *(uint32_t *)s->code_ptr = v;
94 /* label relocation processing */
96 void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
97 int label_index, long addend)
102 l = &s->labels[label_index];
104 /* FIXME: This may break relocations on RISC targets that
105 modify instruction fields in place. The caller may not have
106 written the initial value. */
107 patch_reloc(code_ptr, type, l->u.value, addend);
109 /* add a new relocation entry */
110 r = tcg_malloc(sizeof(TCGRelocation));
114 r->next = l->u.first_reloc;
115 l->u.first_reloc = r;
119 static void tcg_out_label(TCGContext *s, int label_index,
120 tcg_target_long value)
125 l = &s->labels[label_index];
128 r = l->u.first_reloc;
130 patch_reloc(r->ptr, r->type, value, r->addend);
137 int gen_new_label(void)
139 TCGContext *s = &tcg_ctx;
143 if (s->nb_labels >= TCG_MAX_LABELS)
145 idx = s->nb_labels++;
148 l->u.first_reloc = NULL;
152 #include "tcg-target.c"
154 /* pool based memory allocation */
155 void *tcg_malloc_internal(TCGContext *s, int size)
160 if (size > TCG_POOL_CHUNK_SIZE) {
161 /* big malloc: insert a new pool (XXX: could optimize) */
162 p = qemu_malloc(sizeof(TCGPool) + size);
165 s->pool_current->next = p;
168 p->next = s->pool_current;
178 pool_size = TCG_POOL_CHUNK_SIZE;
179 p = qemu_malloc(sizeof(TCGPool) + pool_size);
183 s->pool_current->next = p;
192 s->pool_cur = p->data + size;
193 s->pool_end = p->data + p->size;
197 void tcg_pool_reset(TCGContext *s)
199 s->pool_cur = s->pool_end = NULL;
200 s->pool_current = NULL;
203 void tcg_context_init(TCGContext *s)
205 int op, total_args, n;
207 TCGArgConstraint *args_ct;
210 memset(s, 0, sizeof(*s));
211 s->temps = s->static_temps;
214 /* Count total number of arguments and allocate the corresponding
217 for(op = 0; op < NB_OPS; op++) {
218 def = &tcg_op_defs[op];
219 n = def->nb_iargs + def->nb_oargs;
223 args_ct = qemu_malloc(sizeof(TCGArgConstraint) * total_args);
224 sorted_args = qemu_malloc(sizeof(int) * total_args);
226 for(op = 0; op < NB_OPS; op++) {
227 def = &tcg_op_defs[op];
228 def->args_ct = args_ct;
229 def->sorted_args = sorted_args;
230 n = def->nb_iargs + def->nb_oargs;
237 /* init global prologue and epilogue */
238 s->code_buf = code_gen_prologue;
239 s->code_ptr = s->code_buf;
240 tcg_target_qemu_prologue(s);
241 flush_icache_range((unsigned long)s->code_buf,
242 (unsigned long)s->code_ptr);
245 void tcg_set_frame(TCGContext *s, int reg,
246 tcg_target_long start, tcg_target_long size)
248 s->frame_start = start;
249 s->frame_end = start + size;
253 void tcg_func_start(TCGContext *s)
257 s->nb_temps = s->nb_globals;
258 for(i = 0; i < (TCG_TYPE_COUNT * 2); i++)
259 s->first_free_temp[i] = -1;
260 s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS);
262 s->current_frame_offset = s->frame_start;
264 gen_opc_ptr = gen_opc_buf;
265 gen_opparam_ptr = gen_opparam_buf;
268 static inline void tcg_temp_alloc(TCGContext *s, int n)
270 if (n > TCG_MAX_TEMPS)
274 static inline int tcg_global_reg_new_internal(TCGType type, int reg,
277 TCGContext *s = &tcg_ctx;
281 #if TCG_TARGET_REG_BITS == 32
282 if (type != TCG_TYPE_I32)
285 if (tcg_regset_test_reg(s->reserved_regs, reg))
288 tcg_temp_alloc(s, s->nb_globals + 1);
289 ts = &s->temps[s->nb_globals];
290 ts->base_type = type;
296 tcg_regset_set_reg(s->reserved_regs, reg);
300 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
304 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
305 return MAKE_TCGV_I32(idx);
308 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
312 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name);
313 return MAKE_TCGV_I64(idx);
316 static inline int tcg_global_mem_new_internal(TCGType type, int reg,
317 tcg_target_long offset,
320 TCGContext *s = &tcg_ctx;
325 #if TCG_TARGET_REG_BITS == 32
326 if (type == TCG_TYPE_I64) {
328 tcg_temp_alloc(s, s->nb_globals + 2);
329 ts = &s->temps[s->nb_globals];
330 ts->base_type = type;
331 ts->type = TCG_TYPE_I32;
333 ts->mem_allocated = 1;
335 #ifdef TCG_TARGET_WORDS_BIGENDIAN
336 ts->mem_offset = offset + 4;
338 ts->mem_offset = offset;
340 pstrcpy(buf, sizeof(buf), name);
341 pstrcat(buf, sizeof(buf), "_0");
342 ts->name = strdup(buf);
345 ts->base_type = type;
346 ts->type = TCG_TYPE_I32;
348 ts->mem_allocated = 1;
350 #ifdef TCG_TARGET_WORDS_BIGENDIAN
351 ts->mem_offset = offset;
353 ts->mem_offset = offset + 4;
355 pstrcpy(buf, sizeof(buf), name);
356 pstrcat(buf, sizeof(buf), "_1");
357 ts->name = strdup(buf);
363 tcg_temp_alloc(s, s->nb_globals + 1);
364 ts = &s->temps[s->nb_globals];
365 ts->base_type = type;
368 ts->mem_allocated = 1;
370 ts->mem_offset = offset;
377 TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
382 idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
383 return MAKE_TCGV_I32(idx);
386 TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
391 idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
392 return MAKE_TCGV_I64(idx);
395 static inline int tcg_temp_new_internal(TCGType type, int temp_local)
397 TCGContext *s = &tcg_ctx;
404 idx = s->first_free_temp[k];
406 /* There is already an available temp with the
409 s->first_free_temp[k] = ts->next_free_temp;
410 ts->temp_allocated = 1;
411 assert(ts->temp_local == temp_local);
414 #if TCG_TARGET_REG_BITS == 32
415 if (type == TCG_TYPE_I64) {
416 tcg_temp_alloc(s, s->nb_temps + 2);
417 ts = &s->temps[s->nb_temps];
418 ts->base_type = type;
419 ts->type = TCG_TYPE_I32;
420 ts->temp_allocated = 1;
421 ts->temp_local = temp_local;
424 ts->base_type = TCG_TYPE_I32;
425 ts->type = TCG_TYPE_I32;
426 ts->temp_allocated = 1;
427 ts->temp_local = temp_local;
433 tcg_temp_alloc(s, s->nb_temps + 1);
434 ts = &s->temps[s->nb_temps];
435 ts->base_type = type;
437 ts->temp_allocated = 1;
438 ts->temp_local = temp_local;
446 TCGv_i32 tcg_temp_new_internal_i32(int temp_local)
450 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local);
451 return MAKE_TCGV_I32(idx);
454 TCGv_i64 tcg_temp_new_internal_i64(int temp_local)
458 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local);
459 return MAKE_TCGV_I64(idx);
462 static inline void tcg_temp_free_internal(int idx)
464 TCGContext *s = &tcg_ctx;
468 assert(idx >= s->nb_globals && idx < s->nb_temps);
470 assert(ts->temp_allocated != 0);
471 ts->temp_allocated = 0;
475 ts->next_free_temp = s->first_free_temp[k];
476 s->first_free_temp[k] = idx;
479 void tcg_temp_free_i32(TCGv_i32 arg)
481 tcg_temp_free_internal(GET_TCGV_I32(arg));
484 void tcg_temp_free_i64(TCGv_i64 arg)
486 tcg_temp_free_internal(GET_TCGV_I64(arg));
489 TCGv_i32 tcg_const_i32(int32_t val)
492 t0 = tcg_temp_new_i32();
493 tcg_gen_movi_i32(t0, val);
497 TCGv_i64 tcg_const_i64(int64_t val)
500 t0 = tcg_temp_new_i64();
501 tcg_gen_movi_i64(t0, val);
505 TCGv_i32 tcg_const_local_i32(int32_t val)
508 t0 = tcg_temp_local_new_i32();
509 tcg_gen_movi_i32(t0, val);
513 TCGv_i64 tcg_const_local_i64(int64_t val)
516 t0 = tcg_temp_local_new_i64();
517 tcg_gen_movi_i64(t0, val);
521 void tcg_register_helper(void *func, const char *name)
523 TCGContext *s = &tcg_ctx;
525 if ((s->nb_helpers + 1) > s->allocated_helpers) {
526 n = s->allocated_helpers;
532 s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo));
533 s->allocated_helpers = n;
535 s->helpers[s->nb_helpers].func = (tcg_target_ulong)func;
536 s->helpers[s->nb_helpers].name = name;
540 /* Note: we convert the 64 bit args to 32 bit and do some alignment
541 and endian swap. Maybe it would be better to do the alignment
542 and endian swap in tcg_reg_alloc_call(). */
543 void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
544 int sizemask, TCGArg ret, int nargs, TCGArg *args)
551 *gen_opc_ptr++ = INDEX_op_call;
552 nparam = gen_opparam_ptr++;
553 call_type = (flags & TCG_CALL_TYPE_MASK);
554 if (ret != TCG_CALL_DUMMY_ARG) {
555 #if TCG_TARGET_REG_BITS < 64
557 #ifdef TCG_TARGET_WORDS_BIGENDIAN
558 *gen_opparam_ptr++ = ret + 1;
559 *gen_opparam_ptr++ = ret;
561 *gen_opparam_ptr++ = ret;
562 *gen_opparam_ptr++ = ret + 1;
568 *gen_opparam_ptr++ = ret;
575 for (i = 0; i < nargs; i++) {
576 #if TCG_TARGET_REG_BITS < 64
577 if (sizemask & (2 << i)) {
578 #ifdef TCG_TARGET_I386
579 /* REGPARM case: if the third parameter is 64 bit, it is
580 allocated on the stack */
581 if (i == 2 && call_type == TCG_CALL_TYPE_REGPARM) {
582 call_type = TCG_CALL_TYPE_REGPARM_2;
583 flags = (flags & ~TCG_CALL_TYPE_MASK) | call_type;
586 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
587 /* some targets want aligned 64 bit args */
589 *gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG;
593 #ifdef TCG_TARGET_WORDS_BIGENDIAN
594 *gen_opparam_ptr++ = args[i] + 1;
595 *gen_opparam_ptr++ = args[i];
597 *gen_opparam_ptr++ = args[i];
598 *gen_opparam_ptr++ = args[i] + 1;
604 *gen_opparam_ptr++ = args[i];
608 *gen_opparam_ptr++ = GET_TCGV_PTR(func);
610 *gen_opparam_ptr++ = flags;
612 *nparam = (nb_rets << 16) | (real_args + 1);
614 /* total parameters, needed to go backward in the instruction stream */
615 *gen_opparam_ptr++ = 1 + nb_rets + real_args + 3;
618 #if TCG_TARGET_REG_BITS == 32
619 void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
620 int c, int right, int arith)
623 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1));
624 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1));
625 } else if (c >= 32) {
629 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
630 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31);
632 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
633 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
636 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c);
637 tcg_gen_movi_i32(TCGV_LOW(ret), 0);
642 t0 = tcg_temp_new_i32();
643 t1 = tcg_temp_new_i32();
645 tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c);
647 tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c);
649 tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c);
650 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c);
651 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0);
652 tcg_gen_mov_i32(TCGV_HIGH(ret), t1);
654 tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c);
655 /* Note: ret can be the same as arg1, so we use t1 */
656 tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c);
657 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c);
658 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0);
659 tcg_gen_mov_i32(TCGV_LOW(ret), t1);
661 tcg_temp_free_i32(t0);
662 tcg_temp_free_i32(t1);
667 static void tcg_reg_alloc_start(TCGContext *s)
671 for(i = 0; i < s->nb_globals; i++) {
674 ts->val_type = TEMP_VAL_REG;
676 ts->val_type = TEMP_VAL_MEM;
679 for(i = s->nb_globals; i < s->nb_temps; i++) {
681 ts->val_type = TEMP_VAL_DEAD;
682 ts->mem_allocated = 0;
685 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
686 s->reg_to_temp[i] = -1;
690 static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size,
696 if (idx < s->nb_globals) {
697 pstrcpy(buf, buf_size, ts->name);
700 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals);
702 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
707 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg)
709 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg));
712 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg)
714 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg));
717 static int helper_cmp(const void *p1, const void *p2)
719 const TCGHelperInfo *th1 = p1;
720 const TCGHelperInfo *th2 = p2;
721 if (th1->func < th2->func)
723 else if (th1->func == th2->func)
729 /* find helper definition (Note: A hash table would be better) */
730 static TCGHelperInfo *tcg_find_helper(TCGContext *s, tcg_target_ulong val)
736 if (unlikely(!s->helpers_sorted)) {
737 qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo),
739 s->helpers_sorted = 1;
744 m_max = s->nb_helpers - 1;
745 while (m_min <= m_max) {
746 m = (m_min + m_max) >> 1;
760 static const char * const cond_name[] =
762 [TCG_COND_EQ] = "eq",
763 [TCG_COND_NE] = "ne",
764 [TCG_COND_LT] = "lt",
765 [TCG_COND_GE] = "ge",
766 [TCG_COND_LE] = "le",
767 [TCG_COND_GT] = "gt",
768 [TCG_COND_LTU] = "ltu",
769 [TCG_COND_GEU] = "geu",
770 [TCG_COND_LEU] = "leu",
771 [TCG_COND_GTU] = "gtu"
774 void tcg_dump_ops(TCGContext *s, FILE *outfile)
776 const uint16_t *opc_ptr;
779 int c, i, k, nb_oargs, nb_iargs, nb_cargs, first_insn;
784 opc_ptr = gen_opc_buf;
785 args = gen_opparam_buf;
786 while (opc_ptr < gen_opc_ptr) {
788 def = &tcg_op_defs[c];
789 if (c == INDEX_op_debug_insn_start) {
791 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
792 pc = ((uint64_t)args[1] << 32) | args[0];
797 fprintf(outfile, "\n");
798 fprintf(outfile, " ---- 0x%" PRIx64, pc);
800 nb_oargs = def->nb_oargs;
801 nb_iargs = def->nb_iargs;
802 nb_cargs = def->nb_cargs;
803 } else if (c == INDEX_op_call) {
806 /* variable number of arguments */
808 nb_oargs = arg >> 16;
809 nb_iargs = arg & 0xffff;
810 nb_cargs = def->nb_cargs;
812 fprintf(outfile, " %s ", def->name);
815 fprintf(outfile, "%s",
816 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[nb_oargs + nb_iargs - 1]));
818 fprintf(outfile, ",$0x%" TCG_PRIlx,
819 args[nb_oargs + nb_iargs]);
821 fprintf(outfile, ",$%d", nb_oargs);
822 for(i = 0; i < nb_oargs; i++) {
823 fprintf(outfile, ",");
824 fprintf(outfile, "%s",
825 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[i]));
827 for(i = 0; i < (nb_iargs - 1); i++) {
828 fprintf(outfile, ",");
829 if (args[nb_oargs + i] == TCG_CALL_DUMMY_ARG) {
830 fprintf(outfile, "<dummy>");
832 fprintf(outfile, "%s",
833 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[nb_oargs + i]));
836 } else if (c == INDEX_op_movi_i32
837 #if TCG_TARGET_REG_BITS == 64
838 || c == INDEX_op_movi_i64
841 tcg_target_ulong val;
844 nb_oargs = def->nb_oargs;
845 nb_iargs = def->nb_iargs;
846 nb_cargs = def->nb_cargs;
847 fprintf(outfile, " %s %s,$", def->name,
848 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0]));
850 th = tcg_find_helper(s, val);
852 fprintf(outfile, "%s", th->name);
854 if (c == INDEX_op_movi_i32)
855 fprintf(outfile, "0x%x", (uint32_t)val);
857 fprintf(outfile, "0x%" PRIx64 , (uint64_t)val);
860 fprintf(outfile, " %s ", def->name);
861 if (c == INDEX_op_nopn) {
862 /* variable number of arguments */
867 nb_oargs = def->nb_oargs;
868 nb_iargs = def->nb_iargs;
869 nb_cargs = def->nb_cargs;
873 for(i = 0; i < nb_oargs; i++) {
875 fprintf(outfile, ",");
876 fprintf(outfile, "%s",
877 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++]));
879 for(i = 0; i < nb_iargs; i++) {
881 fprintf(outfile, ",");
882 fprintf(outfile, "%s",
883 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++]));
885 if (c == INDEX_op_brcond_i32
886 #if TCG_TARGET_REG_BITS == 32
887 || c == INDEX_op_brcond2_i32
888 #elif TCG_TARGET_REG_BITS == 64
889 || c == INDEX_op_brcond_i64
892 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]])
893 fprintf(outfile, ",%s", cond_name[args[k++]]);
895 fprintf(outfile, ",$0x%" TCG_PRIlx, args[k++]);
900 for(; i < nb_cargs; i++) {
902 fprintf(outfile, ",");
904 fprintf(outfile, "$0x%" TCG_PRIlx, arg);
907 fprintf(outfile, "\n");
908 args += nb_iargs + nb_oargs + nb_cargs;
912 /* we give more priority to constraints with less registers */
913 static int get_constraint_priority(const TCGOpDef *def, int k)
915 const TCGArgConstraint *arg_ct;
918 arg_ct = &def->args_ct[k];
919 if (arg_ct->ct & TCG_CT_ALIAS) {
920 /* an alias is equivalent to a single register */
923 if (!(arg_ct->ct & TCG_CT_REG))
926 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
927 if (tcg_regset_test_reg(arg_ct->u.regs, i))
931 return TCG_TARGET_NB_REGS - n + 1;
934 /* sort from highest priority to lowest */
935 static void sort_constraints(TCGOpDef *def, int start, int n)
937 int i, j, p1, p2, tmp;
939 for(i = 0; i < n; i++)
940 def->sorted_args[start + i] = start + i;
943 for(i = 0; i < n - 1; i++) {
944 for(j = i + 1; j < n; j++) {
945 p1 = get_constraint_priority(def, def->sorted_args[start + i]);
946 p2 = get_constraint_priority(def, def->sorted_args[start + j]);
948 tmp = def->sorted_args[start + i];
949 def->sorted_args[start + i] = def->sorted_args[start + j];
950 def->sorted_args[start + j] = tmp;
956 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
967 assert(op >= 0 && op < NB_OPS);
968 def = &tcg_op_defs[op];
969 nb_args = def->nb_iargs + def->nb_oargs;
970 for(i = 0; i < nb_args; i++) {
971 ct_str = tdefs->args_ct_str[i];
972 tcg_regset_clear(def->args_ct[i].u.regs);
973 def->args_ct[i].ct = 0;
974 if (ct_str[0] >= '0' && ct_str[0] <= '9') {
976 oarg = ct_str[0] - '0';
977 assert(oarg < def->nb_oargs);
978 assert(def->args_ct[oarg].ct & TCG_CT_REG);
979 /* TCG_CT_ALIAS is for the output arguments. The input
980 argument is tagged with TCG_CT_IALIAS. */
981 def->args_ct[i] = def->args_ct[oarg];
982 def->args_ct[oarg].ct = TCG_CT_ALIAS;
983 def->args_ct[oarg].alias_index = i;
984 def->args_ct[i].ct |= TCG_CT_IALIAS;
985 def->args_ct[i].alias_index = oarg;
992 def->args_ct[i].ct |= TCG_CT_CONST;
996 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) {
997 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n",
998 ct_str, i, def->name);
1006 /* sort the constraints (XXX: this is just an heuristic) */
1007 sort_constraints(def, 0, def->nb_oargs);
1008 sort_constraints(def, def->nb_oargs, def->nb_iargs);
1014 printf("%s: sorted=", def->name);
1015 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++)
1016 printf(" %d", def->sorted_args[i]);
1025 #ifdef USE_LIVENESS_ANALYSIS
1027 /* set a nop for an operation using 'nb_args' */
1028 static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr,
1029 TCGArg *args, int nb_args)
1032 *opc_ptr = INDEX_op_nop;
1034 *opc_ptr = INDEX_op_nopn;
1036 args[nb_args - 1] = nb_args;
1040 /* liveness analysis: end of function: globals are live, temps are
1042 /* XXX: at this stage, not used as there would be little gains because
1043 most TBs end with a conditional jump. */
1044 static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps)
1046 memset(dead_temps, 0, s->nb_globals);
1047 memset(dead_temps + s->nb_globals, 1, s->nb_temps - s->nb_globals);
1050 /* liveness analysis: end of basic block: globals are live, temps are
1051 dead, local temps are live. */
1052 static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps)
1057 memset(dead_temps, 0, s->nb_globals);
1058 ts = &s->temps[s->nb_globals];
1059 for(i = s->nb_globals; i < s->nb_temps; i++) {
1068 /* Liveness analysis : update the opc_dead_iargs array to tell if a
1069 given input arguments is dead. Instructions updating dead
1070 temporaries are removed. */
1071 static void tcg_liveness_analysis(TCGContext *s)
1073 int i, op_index, op, nb_args, nb_iargs, nb_oargs, arg, nb_ops;
1075 const TCGOpDef *def;
1076 uint8_t *dead_temps;
1077 unsigned int dead_iargs;
1079 gen_opc_ptr++; /* skip end */
1081 nb_ops = gen_opc_ptr - gen_opc_buf;
1083 /* XXX: make it really dynamic */
1084 s->op_dead_iargs = tcg_malloc(OPC_BUF_SIZE * sizeof(uint16_t));
1086 dead_temps = tcg_malloc(s->nb_temps);
1087 memset(dead_temps, 1, s->nb_temps);
1089 args = gen_opparam_ptr;
1090 op_index = nb_ops - 1;
1091 while (op_index >= 0) {
1092 op = gen_opc_buf[op_index];
1093 def = &tcg_op_defs[op];
1101 nb_iargs = args[0] & 0xffff;
1102 nb_oargs = args[0] >> 16;
1104 call_flags = args[nb_oargs + nb_iargs];
1106 /* pure functions can be removed if their result is not
1108 if (call_flags & TCG_CALL_PURE) {
1109 for(i = 0; i < nb_oargs; i++) {
1111 if (!dead_temps[arg])
1112 goto do_not_remove_call;
1114 tcg_set_nop(s, gen_opc_buf + op_index,
1119 /* output args are dead */
1120 for(i = 0; i < nb_oargs; i++) {
1122 dead_temps[arg] = 1;
1125 if (!(call_flags & TCG_CALL_CONST)) {
1126 /* globals are live (they may be used by the call) */
1127 memset(dead_temps, 0, s->nb_globals);
1130 /* input args are live */
1132 for(i = 0; i < nb_iargs; i++) {
1133 arg = args[i + nb_oargs];
1134 if (arg != TCG_CALL_DUMMY_ARG) {
1135 if (dead_temps[arg]) {
1136 dead_iargs |= (1 << i);
1138 dead_temps[arg] = 0;
1141 s->op_dead_iargs[op_index] = dead_iargs;
1146 case INDEX_op_set_label:
1148 /* mark end of basic block */
1149 tcg_la_bb_end(s, dead_temps);
1151 case INDEX_op_debug_insn_start:
1152 args -= def->nb_args;
1158 case INDEX_op_discard:
1160 /* mark the temporary as dead */
1161 dead_temps[args[0]] = 1;
1165 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1167 args -= def->nb_args;
1168 nb_iargs = def->nb_iargs;
1169 nb_oargs = def->nb_oargs;
1171 /* Test if the operation can be removed because all
1172 its outputs are dead. We assume that nb_oargs == 0
1173 implies side effects */
1174 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) {
1175 for(i = 0; i < nb_oargs; i++) {
1177 if (!dead_temps[arg])
1180 tcg_set_nop(s, gen_opc_buf + op_index, args, def->nb_args);
1181 #ifdef CONFIG_PROFILER
1187 /* output args are dead */
1188 for(i = 0; i < nb_oargs; i++) {
1190 dead_temps[arg] = 1;
1193 /* if end of basic block, update */
1194 if (def->flags & TCG_OPF_BB_END) {
1195 tcg_la_bb_end(s, dead_temps);
1196 } else if (def->flags & TCG_OPF_CALL_CLOBBER) {
1197 /* globals are live */
1198 memset(dead_temps, 0, s->nb_globals);
1201 /* input args are live */
1203 for(i = 0; i < nb_iargs; i++) {
1204 arg = args[i + nb_oargs];
1205 if (dead_temps[arg]) {
1206 dead_iargs |= (1 << i);
1208 dead_temps[arg] = 0;
1210 s->op_dead_iargs[op_index] = dead_iargs;
1217 if (args != gen_opparam_buf)
1221 /* dummy liveness analysis */
1222 void tcg_liveness_analysis(TCGContext *s)
1225 nb_ops = gen_opc_ptr - gen_opc_buf;
1227 s->op_dead_iargs = tcg_malloc(nb_ops * sizeof(uint16_t));
1228 memset(s->op_dead_iargs, 0, nb_ops * sizeof(uint16_t));
1233 static void dump_regs(TCGContext *s)
1239 for(i = 0; i < s->nb_temps; i++) {
1241 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i));
1242 switch(ts->val_type) {
1244 printf("%s", tcg_target_reg_names[ts->reg]);
1247 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]);
1249 case TEMP_VAL_CONST:
1250 printf("$0x%" TCG_PRIlx, ts->val);
1262 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1263 if (s->reg_to_temp[i] >= 0) {
1265 tcg_target_reg_names[i],
1266 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i]));
1271 static void check_regs(TCGContext *s)
1277 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1278 k = s->reg_to_temp[reg];
1281 if (ts->val_type != TEMP_VAL_REG ||
1283 printf("Inconsistency for register %s:\n",
1284 tcg_target_reg_names[reg]);
1289 for(k = 0; k < s->nb_temps; k++) {
1291 if (ts->val_type == TEMP_VAL_REG &&
1293 s->reg_to_temp[ts->reg] != k) {
1294 printf("Inconsistency for temp %s:\n",
1295 tcg_get_arg_str_idx(s, buf, sizeof(buf), k));
1297 printf("reg state:\n");
1305 static void temp_allocate_frame(TCGContext *s, int temp)
1308 ts = &s->temps[temp];
1309 s->current_frame_offset = (s->current_frame_offset + sizeof(tcg_target_long) - 1) & ~(sizeof(tcg_target_long) - 1);
1310 if (s->current_frame_offset + sizeof(tcg_target_long) > s->frame_end)
1312 ts->mem_offset = s->current_frame_offset;
1313 ts->mem_reg = s->frame_reg;
1314 ts->mem_allocated = 1;
1315 s->current_frame_offset += sizeof(tcg_target_long);
1318 /* free register 'reg' by spilling the corresponding temporary if necessary */
1319 static void tcg_reg_free(TCGContext *s, int reg)
1324 temp = s->reg_to_temp[reg];
1326 ts = &s->temps[temp];
1327 assert(ts->val_type == TEMP_VAL_REG);
1328 if (!ts->mem_coherent) {
1329 if (!ts->mem_allocated)
1330 temp_allocate_frame(s, temp);
1331 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1333 ts->val_type = TEMP_VAL_MEM;
1334 s->reg_to_temp[reg] = -1;
1338 /* Allocate a register belonging to reg1 & ~reg2 */
1339 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
1344 tcg_regset_andnot(reg_ct, reg1, reg2);
1346 /* first try free registers */
1347 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
1348 reg = tcg_target_reg_alloc_order[i];
1349 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1)
1353 /* XXX: do better spill choice */
1354 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
1355 reg = tcg_target_reg_alloc_order[i];
1356 if (tcg_regset_test_reg(reg_ct, reg)) {
1357 tcg_reg_free(s, reg);
1365 /* save a temporary to memory. 'allocated_regs' is used in case a
1366 temporary registers needs to be allocated to store a constant. */
1367 static void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs)
1372 ts = &s->temps[temp];
1373 if (!ts->fixed_reg) {
1374 switch(ts->val_type) {
1376 tcg_reg_free(s, ts->reg);
1379 ts->val_type = TEMP_VAL_MEM;
1381 case TEMP_VAL_CONST:
1382 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1384 if (!ts->mem_allocated)
1385 temp_allocate_frame(s, temp);
1386 tcg_out_movi(s, ts->type, reg, ts->val);
1387 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1388 ts->val_type = TEMP_VAL_MEM;
1398 /* save globals to their cannonical location and assume they can be
1399 modified be the following code. 'allocated_regs' is used in case a
1400 temporary registers needs to be allocated to store a constant. */
1401 static void save_globals(TCGContext *s, TCGRegSet allocated_regs)
1405 for(i = 0; i < s->nb_globals; i++) {
1406 temp_save(s, i, allocated_regs);
1410 /* at the end of a basic block, we assume all temporaries are dead and
1411 all globals are stored at their canonical location. */
1412 static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
1417 for(i = s->nb_globals; i < s->nb_temps; i++) {
1419 if (ts->temp_local) {
1420 temp_save(s, i, allocated_regs);
1422 if (ts->val_type == TEMP_VAL_REG) {
1423 s->reg_to_temp[ts->reg] = -1;
1425 ts->val_type = TEMP_VAL_DEAD;
1429 save_globals(s, allocated_regs);
1432 #define IS_DEAD_IARG(n) ((dead_iargs >> (n)) & 1)
1434 static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args)
1437 tcg_target_ulong val;
1439 ots = &s->temps[args[0]];
1442 if (ots->fixed_reg) {
1443 /* for fixed registers, we do not do any constant
1445 tcg_out_movi(s, ots->type, ots->reg, val);
1447 /* The movi is not explicitly generated here */
1448 if (ots->val_type == TEMP_VAL_REG)
1449 s->reg_to_temp[ots->reg] = -1;
1450 ots->val_type = TEMP_VAL_CONST;
1455 static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
1457 unsigned int dead_iargs)
1461 const TCGArgConstraint *arg_ct;
1463 ots = &s->temps[args[0]];
1464 ts = &s->temps[args[1]];
1465 arg_ct = &def->args_ct[0];
1467 /* XXX: always mark arg dead if IS_DEAD_IARG(0) */
1468 if (ts->val_type == TEMP_VAL_REG) {
1469 if (IS_DEAD_IARG(0) && !ts->fixed_reg && !ots->fixed_reg) {
1470 /* the mov can be suppressed */
1471 if (ots->val_type == TEMP_VAL_REG)
1472 s->reg_to_temp[ots->reg] = -1;
1474 s->reg_to_temp[reg] = -1;
1475 ts->val_type = TEMP_VAL_DEAD;
1477 if (ots->val_type == TEMP_VAL_REG) {
1480 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1482 if (ts->reg != reg) {
1483 tcg_out_mov(s, reg, ts->reg);
1486 } else if (ts->val_type == TEMP_VAL_MEM) {
1487 if (ots->val_type == TEMP_VAL_REG) {
1490 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1492 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1493 } else if (ts->val_type == TEMP_VAL_CONST) {
1494 if (ots->fixed_reg) {
1496 tcg_out_movi(s, ots->type, reg, ts->val);
1498 /* propagate constant */
1499 if (ots->val_type == TEMP_VAL_REG)
1500 s->reg_to_temp[ots->reg] = -1;
1501 ots->val_type = TEMP_VAL_CONST;
1508 s->reg_to_temp[reg] = args[0];
1510 ots->val_type = TEMP_VAL_REG;
1511 ots->mem_coherent = 0;
1514 static void tcg_reg_alloc_op(TCGContext *s,
1515 const TCGOpDef *def, int opc,
1517 unsigned int dead_iargs)
1519 TCGRegSet allocated_regs;
1520 int i, k, nb_iargs, nb_oargs, reg;
1522 const TCGArgConstraint *arg_ct;
1524 TCGArg new_args[TCG_MAX_OP_ARGS];
1525 int const_args[TCG_MAX_OP_ARGS];
1527 nb_oargs = def->nb_oargs;
1528 nb_iargs = def->nb_iargs;
1530 /* copy constants */
1531 memcpy(new_args + nb_oargs + nb_iargs,
1532 args + nb_oargs + nb_iargs,
1533 sizeof(TCGArg) * def->nb_cargs);
1535 /* satisfy input constraints */
1536 tcg_regset_set(allocated_regs, s->reserved_regs);
1537 for(k = 0; k < nb_iargs; k++) {
1538 i = def->sorted_args[nb_oargs + k];
1540 arg_ct = &def->args_ct[i];
1541 ts = &s->temps[arg];
1542 if (ts->val_type == TEMP_VAL_MEM) {
1543 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1544 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1545 ts->val_type = TEMP_VAL_REG;
1547 ts->mem_coherent = 1;
1548 s->reg_to_temp[reg] = arg;
1549 } else if (ts->val_type == TEMP_VAL_CONST) {
1550 if (tcg_target_const_match(ts->val, arg_ct)) {
1551 /* constant is OK for instruction */
1553 new_args[i] = ts->val;
1556 /* need to move to a register */
1557 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1558 tcg_out_movi(s, ts->type, reg, ts->val);
1559 ts->val_type = TEMP_VAL_REG;
1561 ts->mem_coherent = 0;
1562 s->reg_to_temp[reg] = arg;
1565 assert(ts->val_type == TEMP_VAL_REG);
1566 if (arg_ct->ct & TCG_CT_IALIAS) {
1567 if (ts->fixed_reg) {
1568 /* if fixed register, we must allocate a new register
1569 if the alias is not the same register */
1570 if (arg != args[arg_ct->alias_index])
1571 goto allocate_in_reg;
1573 /* if the input is aliased to an output and if it is
1574 not dead after the instruction, we must allocate
1575 a new register and move it */
1576 if (!IS_DEAD_IARG(i - nb_oargs))
1577 goto allocate_in_reg;
1581 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1582 /* nothing to do : the constraint is satisfied */
1585 /* allocate a new register matching the constraint
1586 and move the temporary register into it */
1587 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1588 tcg_out_mov(s, reg, ts->reg);
1592 tcg_regset_set_reg(allocated_regs, reg);
1596 if (def->flags & TCG_OPF_BB_END) {
1597 tcg_reg_alloc_bb_end(s, allocated_regs);
1599 /* mark dead temporaries and free the associated registers */
1600 for(i = 0; i < nb_iargs; i++) {
1601 arg = args[nb_oargs + i];
1602 if (IS_DEAD_IARG(i)) {
1603 ts = &s->temps[arg];
1604 if (!ts->fixed_reg) {
1605 if (ts->val_type == TEMP_VAL_REG)
1606 s->reg_to_temp[ts->reg] = -1;
1607 ts->val_type = TEMP_VAL_DEAD;
1612 if (def->flags & TCG_OPF_CALL_CLOBBER) {
1613 /* XXX: permit generic clobber register list ? */
1614 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1615 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1616 tcg_reg_free(s, reg);
1619 /* XXX: for load/store we could do that only for the slow path
1620 (i.e. when a memory callback is called) */
1622 /* store globals and free associated registers (we assume the insn
1623 can modify any global. */
1624 save_globals(s, allocated_regs);
1627 /* satisfy the output constraints */
1628 tcg_regset_set(allocated_regs, s->reserved_regs);
1629 for(k = 0; k < nb_oargs; k++) {
1630 i = def->sorted_args[k];
1632 arg_ct = &def->args_ct[i];
1633 ts = &s->temps[arg];
1634 if (arg_ct->ct & TCG_CT_ALIAS) {
1635 reg = new_args[arg_ct->alias_index];
1637 /* if fixed register, we try to use it */
1639 if (ts->fixed_reg &&
1640 tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1643 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1645 tcg_regset_set_reg(allocated_regs, reg);
1646 /* if a fixed register is used, then a move will be done afterwards */
1647 if (!ts->fixed_reg) {
1648 if (ts->val_type == TEMP_VAL_REG)
1649 s->reg_to_temp[ts->reg] = -1;
1650 ts->val_type = TEMP_VAL_REG;
1652 /* temp value is modified, so the value kept in memory is
1653 potentially not the same */
1654 ts->mem_coherent = 0;
1655 s->reg_to_temp[reg] = arg;
1662 /* emit instruction */
1663 tcg_out_op(s, opc, new_args, const_args);
1665 /* move the outputs in the correct register if needed */
1666 for(i = 0; i < nb_oargs; i++) {
1667 ts = &s->temps[args[i]];
1669 if (ts->fixed_reg && ts->reg != reg) {
1670 tcg_out_mov(s, ts->reg, reg);
1675 #ifdef TCG_TARGET_STACK_GROWSUP
1676 #define STACK_DIR(x) (-(x))
1678 #define STACK_DIR(x) (x)
1681 static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
1682 int opc, const TCGArg *args,
1683 unsigned int dead_iargs)
1685 int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params;
1686 TCGArg arg, func_arg;
1688 tcg_target_long stack_offset, call_stack_size, func_addr;
1689 int const_func_arg, allocate_args;
1690 TCGRegSet allocated_regs;
1691 const TCGArgConstraint *arg_ct;
1695 nb_oargs = arg >> 16;
1696 nb_iargs = arg & 0xffff;
1697 nb_params = nb_iargs - 1;
1699 flags = args[nb_oargs + nb_iargs];
1701 nb_regs = tcg_target_get_call_iarg_regs_count(flags);
1702 if (nb_regs > nb_params)
1703 nb_regs = nb_params;
1705 /* assign stack slots first */
1706 /* XXX: preallocate call stack */
1707 call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long);
1708 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) &
1709 ~(TCG_TARGET_STACK_ALIGN - 1);
1710 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE);
1711 if (allocate_args) {
1712 tcg_out_addi(s, TCG_REG_CALL_STACK, -STACK_DIR(call_stack_size));
1715 stack_offset = TCG_TARGET_CALL_STACK_OFFSET;
1716 for(i = nb_regs; i < nb_params; i++) {
1717 arg = args[nb_oargs + i];
1718 #ifdef TCG_TARGET_STACK_GROWSUP
1719 stack_offset -= sizeof(tcg_target_long);
1721 if (arg != TCG_CALL_DUMMY_ARG) {
1722 ts = &s->temps[arg];
1723 if (ts->val_type == TEMP_VAL_REG) {
1724 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset);
1725 } else if (ts->val_type == TEMP_VAL_MEM) {
1726 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1728 /* XXX: not correct if reading values from the stack */
1729 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1730 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
1731 } else if (ts->val_type == TEMP_VAL_CONST) {
1732 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1734 /* XXX: sign extend may be needed on some targets */
1735 tcg_out_movi(s, ts->type, reg, ts->val);
1736 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
1741 #ifndef TCG_TARGET_STACK_GROWSUP
1742 stack_offset += sizeof(tcg_target_long);
1746 /* assign input registers */
1747 tcg_regset_set(allocated_regs, s->reserved_regs);
1748 for(i = 0; i < nb_regs; i++) {
1749 arg = args[nb_oargs + i];
1750 if (arg != TCG_CALL_DUMMY_ARG) {
1751 ts = &s->temps[arg];
1752 reg = tcg_target_call_iarg_regs[i];
1753 tcg_reg_free(s, reg);
1754 if (ts->val_type == TEMP_VAL_REG) {
1755 if (ts->reg != reg) {
1756 tcg_out_mov(s, reg, ts->reg);
1758 } else if (ts->val_type == TEMP_VAL_MEM) {
1759 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1760 } else if (ts->val_type == TEMP_VAL_CONST) {
1761 /* XXX: sign extend ? */
1762 tcg_out_movi(s, ts->type, reg, ts->val);
1766 tcg_regset_set_reg(allocated_regs, reg);
1770 /* assign function address */
1771 func_arg = args[nb_oargs + nb_iargs - 1];
1772 arg_ct = &def->args_ct[0];
1773 ts = &s->temps[func_arg];
1774 func_addr = ts->val;
1776 if (ts->val_type == TEMP_VAL_MEM) {
1777 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1778 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1780 tcg_regset_set_reg(allocated_regs, reg);
1781 } else if (ts->val_type == TEMP_VAL_REG) {
1783 if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1784 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1785 tcg_out_mov(s, reg, ts->reg);
1788 tcg_regset_set_reg(allocated_regs, reg);
1789 } else if (ts->val_type == TEMP_VAL_CONST) {
1790 if (tcg_target_const_match(func_addr, arg_ct)) {
1792 func_arg = func_addr;
1794 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1795 tcg_out_movi(s, ts->type, reg, func_addr);
1797 tcg_regset_set_reg(allocated_regs, reg);
1804 /* mark dead temporaries and free the associated registers */
1805 for(i = 0; i < nb_iargs; i++) {
1806 arg = args[nb_oargs + i];
1807 if (IS_DEAD_IARG(i)) {
1808 ts = &s->temps[arg];
1809 if (!ts->fixed_reg) {
1810 if (ts->val_type == TEMP_VAL_REG)
1811 s->reg_to_temp[ts->reg] = -1;
1812 ts->val_type = TEMP_VAL_DEAD;
1817 /* clobber call registers */
1818 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1819 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1820 tcg_reg_free(s, reg);
1824 /* store globals and free associated registers (we assume the call
1825 can modify any global. */
1826 if (!(flags & TCG_CALL_CONST)) {
1827 save_globals(s, allocated_regs);
1830 tcg_out_op(s, opc, &func_arg, &const_func_arg);
1832 if (allocate_args) {
1833 tcg_out_addi(s, TCG_REG_CALL_STACK, STACK_DIR(call_stack_size));
1836 /* assign output registers and emit moves if needed */
1837 for(i = 0; i < nb_oargs; i++) {
1839 ts = &s->temps[arg];
1840 reg = tcg_target_call_oarg_regs[i];
1841 assert(s->reg_to_temp[reg] == -1);
1842 if (ts->fixed_reg) {
1843 if (ts->reg != reg) {
1844 tcg_out_mov(s, ts->reg, reg);
1847 if (ts->val_type == TEMP_VAL_REG)
1848 s->reg_to_temp[ts->reg] = -1;
1849 ts->val_type = TEMP_VAL_REG;
1851 ts->mem_coherent = 0;
1852 s->reg_to_temp[reg] = arg;
1856 return nb_iargs + nb_oargs + def->nb_cargs + 1;
1859 #ifdef CONFIG_PROFILER
1861 static int64_t tcg_table_op_count[NB_OPS];
1863 void dump_op_count(void)
1867 f = fopen("/tmp/op.log", "w");
1868 for(i = INDEX_op_end; i < NB_OPS; i++) {
1869 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]);
1876 static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
1880 const TCGOpDef *def;
1881 unsigned int dead_iargs;
1885 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
1887 tcg_dump_ops(s, logfile);
1892 #ifdef CONFIG_PROFILER
1893 s->la_time -= profile_getclock();
1895 tcg_liveness_analysis(s);
1896 #ifdef CONFIG_PROFILER
1897 s->la_time += profile_getclock();
1901 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {
1902 qemu_log("OP after la:\n");
1903 tcg_dump_ops(s, logfile);
1908 tcg_reg_alloc_start(s);
1910 s->code_buf = gen_code_buf;
1911 s->code_ptr = gen_code_buf;
1913 args = gen_opparam_buf;
1917 opc = gen_opc_buf[op_index];
1918 #ifdef CONFIG_PROFILER
1919 tcg_table_op_count[opc]++;
1921 def = &tcg_op_defs[opc];
1923 printf("%s: %d %d %d\n", def->name,
1924 def->nb_oargs, def->nb_iargs, def->nb_cargs);
1928 case INDEX_op_mov_i32:
1929 #if TCG_TARGET_REG_BITS == 64
1930 case INDEX_op_mov_i64:
1932 dead_iargs = s->op_dead_iargs[op_index];
1933 tcg_reg_alloc_mov(s, def, args, dead_iargs);
1935 case INDEX_op_movi_i32:
1936 #if TCG_TARGET_REG_BITS == 64
1937 case INDEX_op_movi_i64:
1939 tcg_reg_alloc_movi(s, args);
1941 case INDEX_op_debug_insn_start:
1942 /* debug instruction */
1952 case INDEX_op_discard:
1955 ts = &s->temps[args[0]];
1956 /* mark the temporary as dead */
1957 if (!ts->fixed_reg) {
1958 if (ts->val_type == TEMP_VAL_REG)
1959 s->reg_to_temp[ts->reg] = -1;
1960 ts->val_type = TEMP_VAL_DEAD;
1964 case INDEX_op_set_label:
1965 tcg_reg_alloc_bb_end(s, s->reserved_regs);
1966 tcg_out_label(s, args[0], (long)s->code_ptr);
1969 dead_iargs = s->op_dead_iargs[op_index];
1970 args += tcg_reg_alloc_call(s, def, opc, args, dead_iargs);
1975 /* Note: in order to speed up the code, it would be much
1976 faster to have specialized register allocator functions for
1977 some common argument patterns */
1978 dead_iargs = s->op_dead_iargs[op_index];
1979 tcg_reg_alloc_op(s, def, opc, args, dead_iargs);
1982 args += def->nb_args;
1984 if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) {
1996 int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf)
1998 #ifdef CONFIG_PROFILER
2001 n = (gen_opc_ptr - gen_opc_buf);
2003 if (n > s->op_count_max)
2004 s->op_count_max = n;
2006 s->temp_count += s->nb_temps;
2007 if (s->nb_temps > s->temp_count_max)
2008 s->temp_count_max = s->nb_temps;
2012 tcg_gen_code_common(s, gen_code_buf, -1);
2014 /* flush instruction cache */
2015 flush_icache_range((unsigned long)gen_code_buf,
2016 (unsigned long)s->code_ptr);
2017 return s->code_ptr - gen_code_buf;
2020 /* Return the index of the micro operation such as the pc after is <
2021 offset bytes from the start of the TB. The contents of gen_code_buf must
2022 not be changed, though writing the same values is ok.
2023 Return -1 if not found. */
2024 int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset)
2026 return tcg_gen_code_common(s, gen_code_buf, offset);
2029 #ifdef CONFIG_PROFILER
2030 void tcg_dump_info(FILE *f,
2031 int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
2033 TCGContext *s = &tcg_ctx;
2036 tot = s->interm_time + s->code_time;
2037 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n",
2039 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n",
2041 s->tb_count1 - s->tb_count,
2042 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0);
2043 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n",
2044 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max);
2045 cpu_fprintf(f, "deleted ops/TB %0.2f\n",
2047 (double)s->del_op_count / s->tb_count : 0);
2048 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n",
2050 (double)s->temp_count / s->tb_count : 0,
2053 cpu_fprintf(f, "cycles/op %0.1f\n",
2054 s->op_count ? (double)tot / s->op_count : 0);
2055 cpu_fprintf(f, "cycles/in byte %0.1f\n",
2056 s->code_in_len ? (double)tot / s->code_in_len : 0);
2057 cpu_fprintf(f, "cycles/out byte %0.1f\n",
2058 s->code_out_len ? (double)tot / s->code_out_len : 0);
2061 cpu_fprintf(f, " gen_interm time %0.1f%%\n",
2062 (double)s->interm_time / tot * 100.0);
2063 cpu_fprintf(f, " gen_code time %0.1f%%\n",
2064 (double)s->code_time / tot * 100.0);
2065 cpu_fprintf(f, "liveness/code time %0.1f%%\n",
2066 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0);
2067 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n",
2069 cpu_fprintf(f, " avg cycles %0.1f\n",
2070 s->restore_count ? (double)s->restore_time / s->restore_count : 0);
2072 extern void dump_op_count(void);
2077 void tcg_dump_info(FILE *f,
2078 int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
2080 cpu_fprintf(f, "[TCG profiler not compiled]\n");