4 * Copyright (c) 2003 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
30 #include <sys/ucontext.h>
33 #if !defined(__x86_64__)
37 //#define LINUX_VM86_IOPL_FIX
38 //#define TEST_P4_FLAGS
49 #if defined(__x86_64__)
50 #define FMT64X "%016lx"
51 #define FMTLX "%016lx"
52 #define X86_64_ONLY(x) x
54 #define FMT64X "%016" PRIx64
56 #define X86_64_ONLY(x)
63 #define xglue(x, y) x ## y
64 #define glue(x, y) xglue(x, y)
65 #define stringify(s) tostring(s)
66 #define tostring(s) #s
75 #define __init_call __attribute__ ((unused,__section__ ("initcall")))
77 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
79 #if defined(__x86_64__)
80 static inline long i2l(long v)
82 return v | ((v ^ 0xabcd) << 32);
85 static inline long i2l(long v)
92 #include "test-i386.h"
95 #include "test-i386.h"
98 #include "test-i386.h"
101 #include "test-i386.h"
104 #include "test-i386.h"
107 #include "test-i386.h"
111 #include "test-i386.h"
115 #include "test-i386.h"
120 #include "test-i386.h"
125 #include "test-i386.h"
130 #include "test-i386.h"
135 #include "test-i386.h"
138 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
141 #include "test-i386-shift.h"
144 #include "test-i386-shift.h"
147 #include "test-i386-shift.h"
150 #include "test-i386-shift.h"
153 #include "test-i386-shift.h"
157 #include "test-i386-shift.h"
161 #include "test-i386-shift.h"
166 #include "test-i386-shift.h"
171 #include "test-i386-shift.h"
173 /* XXX: should be more precise ? */
175 #define CC_MASK (CC_C)
179 #include "test-i386-shift.h"
183 #include "test-i386-shift.h"
187 #include "test-i386-shift.h"
191 #include "test-i386-shift.h"
193 /* lea test (modrm support) */
194 #define TEST_LEAQ(STR)\
196 asm("lea " STR ", %0"\
198 : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
199 printf("lea %s = " FMTLX "\n", STR, res);\
202 #define TEST_LEA(STR)\
204 asm("lea " STR ", %0"\
206 : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
207 printf("lea %s = " FMTLX "\n", STR, res);\
210 #define TEST_LEA16(STR)\
212 asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
214 : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
215 printf("lea %s = %08lx\n", STR, res);\
221 long eax, ebx, ecx, edx, esi, edi, res;
238 TEST_LEA("0x40(%%eax)");
239 TEST_LEA("0x40(%%ebx)");
240 TEST_LEA("0x40(%%ecx)");
241 TEST_LEA("0x40(%%edx)");
242 TEST_LEA("0x40(%%esi)");
243 TEST_LEA("0x40(%%edi)");
245 TEST_LEA("0x4000(%%eax)");
246 TEST_LEA("0x4000(%%ebx)");
247 TEST_LEA("0x4000(%%ecx)");
248 TEST_LEA("0x4000(%%edx)");
249 TEST_LEA("0x4000(%%esi)");
250 TEST_LEA("0x4000(%%edi)");
252 TEST_LEA("(%%eax, %%ecx)");
253 TEST_LEA("(%%ebx, %%edx)");
254 TEST_LEA("(%%ecx, %%ecx)");
255 TEST_LEA("(%%edx, %%ecx)");
256 TEST_LEA("(%%esi, %%ecx)");
257 TEST_LEA("(%%edi, %%ecx)");
259 TEST_LEA("0x40(%%eax, %%ecx)");
260 TEST_LEA("0x4000(%%ebx, %%edx)");
262 TEST_LEA("(%%ecx, %%ecx, 2)");
263 TEST_LEA("(%%edx, %%ecx, 4)");
264 TEST_LEA("(%%esi, %%ecx, 8)");
266 TEST_LEA("(,%%eax, 2)");
267 TEST_LEA("(,%%ebx, 4)");
268 TEST_LEA("(,%%ecx, 8)");
270 TEST_LEA("0x40(,%%eax, 2)");
271 TEST_LEA("0x40(,%%ebx, 4)");
272 TEST_LEA("0x40(,%%ecx, 8)");
275 TEST_LEA("-10(%%ecx, %%ecx, 2)");
276 TEST_LEA("-10(%%edx, %%ecx, 4)");
277 TEST_LEA("-10(%%esi, %%ecx, 8)");
279 TEST_LEA("0x4000(%%ecx, %%ecx, 2)");
280 TEST_LEA("0x4000(%%edx, %%ecx, 4)");
281 TEST_LEA("0x4000(%%esi, %%ecx, 8)");
283 #if defined(__x86_64__)
285 TEST_LEAQ("0x4000(%%rip)");
287 TEST_LEAQ("(%%rax)");
288 TEST_LEAQ("(%%rbx)");
289 TEST_LEAQ("(%%rcx)");
290 TEST_LEAQ("(%%rdx)");
291 TEST_LEAQ("(%%rsi)");
292 TEST_LEAQ("(%%rdi)");
294 TEST_LEAQ("0x40(%%rax)");
295 TEST_LEAQ("0x40(%%rbx)");
296 TEST_LEAQ("0x40(%%rcx)");
297 TEST_LEAQ("0x40(%%rdx)");
298 TEST_LEAQ("0x40(%%rsi)");
299 TEST_LEAQ("0x40(%%rdi)");
301 TEST_LEAQ("0x4000(%%rax)");
302 TEST_LEAQ("0x4000(%%rbx)");
303 TEST_LEAQ("0x4000(%%rcx)");
304 TEST_LEAQ("0x4000(%%rdx)");
305 TEST_LEAQ("0x4000(%%rsi)");
306 TEST_LEAQ("0x4000(%%rdi)");
308 TEST_LEAQ("(%%rax, %%rcx)");
309 TEST_LEAQ("(%%rbx, %%rdx)");
310 TEST_LEAQ("(%%rcx, %%rcx)");
311 TEST_LEAQ("(%%rdx, %%rcx)");
312 TEST_LEAQ("(%%rsi, %%rcx)");
313 TEST_LEAQ("(%%rdi, %%rcx)");
315 TEST_LEAQ("0x40(%%rax, %%rcx)");
316 TEST_LEAQ("0x4000(%%rbx, %%rdx)");
318 TEST_LEAQ("(%%rcx, %%rcx, 2)");
319 TEST_LEAQ("(%%rdx, %%rcx, 4)");
320 TEST_LEAQ("(%%rsi, %%rcx, 8)");
322 TEST_LEAQ("(,%%rax, 2)");
323 TEST_LEAQ("(,%%rbx, 4)");
324 TEST_LEAQ("(,%%rcx, 8)");
326 TEST_LEAQ("0x40(,%%rax, 2)");
327 TEST_LEAQ("0x40(,%%rbx, 4)");
328 TEST_LEAQ("0x40(,%%rcx, 8)");
331 TEST_LEAQ("-10(%%rcx, %%rcx, 2)");
332 TEST_LEAQ("-10(%%rdx, %%rcx, 4)");
333 TEST_LEAQ("-10(%%rsi, %%rcx, 8)");
335 TEST_LEAQ("0x4000(%%rcx, %%rcx, 2)");
336 TEST_LEAQ("0x4000(%%rdx, %%rcx, 4)");
337 TEST_LEAQ("0x4000(%%rsi, %%rcx, 8)");
339 /* limited 16 bit addressing test */
340 TEST_LEA16("0x4000");
341 TEST_LEA16("(%%bx)");
342 TEST_LEA16("(%%si)");
343 TEST_LEA16("(%%di)");
344 TEST_LEA16("0x40(%%bx)");
345 TEST_LEA16("0x40(%%si)");
346 TEST_LEA16("0x40(%%di)");
347 TEST_LEA16("0x4000(%%bx)");
348 TEST_LEA16("0x4000(%%si)");
349 TEST_LEA16("(%%bx,%%si)");
350 TEST_LEA16("(%%bx,%%di)");
351 TEST_LEA16("0x40(%%bx,%%si)");
352 TEST_LEA16("0x40(%%bx,%%di)");
353 TEST_LEA16("0x4000(%%bx,%%si)");
354 TEST_LEA16("0x4000(%%bx,%%di)");
358 #define TEST_JCC(JCC, v1, v2)\
361 asm("movl $1, %0\n\t"\
367 : "r" (v1), "r" (v2));\
368 printf("%-10s %d\n", "j" JCC, res);\
370 asm("movl $0, %0\n\t"\
372 "set" JCC " %b0\n\t"\
374 : "r" (v1), "r" (v2));\
375 printf("%-10s %d\n", "set" JCC, res);\
378 long res = i2l(0x12345678);\
380 asm("cmpl %2, %1\n\t"\
381 "cmov" JCC "q %3, %0\n\t"\
383 : "r" (v1), "r" (v2), "m" (val), "0" (res));\
384 printf("%-10s R=" FMTLX "\n", "cmov" JCC "q", res);)\
385 asm("cmpl %2, %1\n\t"\
386 "cmov" JCC "l %k3, %k0\n\t"\
388 : "r" (v1), "r" (v2), "m" (val), "0" (res));\
389 printf("%-10s R=" FMTLX "\n", "cmov" JCC "l", res);\
390 asm("cmpl %2, %1\n\t"\
391 "cmov" JCC "w %w3, %w0\n\t"\
393 : "r" (v1), "r" (v2), "r" (1), "0" (res));\
394 printf("%-10s R=" FMTLX "\n", "cmov" JCC "w", res);\
398 /* various jump tests */
401 TEST_JCC("ne", 1, 1);
402 TEST_JCC("ne", 1, 0);
409 TEST_JCC("l", 1, -1);
411 TEST_JCC("le", 1, 1);
412 TEST_JCC("le", 1, 0);
413 TEST_JCC("le", 1, -1);
415 TEST_JCC("ge", 1, 1);
416 TEST_JCC("ge", 1, 0);
417 TEST_JCC("ge", -1, 1);
421 TEST_JCC("g", 1, -1);
425 TEST_JCC("b", 1, -1);
427 TEST_JCC("be", 1, 1);
428 TEST_JCC("be", 1, 0);
429 TEST_JCC("be", 1, -1);
431 TEST_JCC("ae", 1, 1);
432 TEST_JCC("ae", 1, 0);
433 TEST_JCC("ae", 1, -1);
437 TEST_JCC("a", 1, -1);
443 TEST_JCC("np", 1, 1);
444 TEST_JCC("np", 1, 0);
446 TEST_JCC("o", 0x7fffffff, 0);
447 TEST_JCC("o", 0x7fffffff, -1);
449 TEST_JCC("no", 0x7fffffff, 0);
450 TEST_JCC("no", 0x7fffffff, -1);
453 TEST_JCC("s", 0, -1);
456 TEST_JCC("ns", 0, 1);
457 TEST_JCC("ns", 0, -1);
458 TEST_JCC("ns", 0, 0);
461 #define TEST_LOOP(insn) \
463 for(i = 0; i < sizeof(ecx_vals) / sizeof(long); i++) {\
465 for(zf = 0; zf < 2; zf++) {\
466 asm("test %2, %2\n\t"\
472 : "c" (ecx), "b" (!zf)); \
473 printf("%-10s ECX=" FMTLX " ZF=%ld r=%d\n", insn, ecx, zf, res); \
481 const long ecx_vals[] = {
486 #if defined(__x86_64__)
493 #if !defined(__x86_64__)
497 TEST_LOOP("loopnzw");
503 TEST_LOOP("loopnzl");
508 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
510 #define CC_MASK (CC_O | CC_C)
514 #include "test-i386-muldiv.h"
517 #include "test-i386-muldiv.h"
519 void test_imulw2(long op0, long op1)
521 long res, s1, s0, flags;
526 asm volatile ("push %4\n\t"
531 : "=q" (res), "=g" (flags)
532 : "q" (s1), "0" (res), "1" (flags));
533 printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
534 "imulw", s0, s1, res, flags & CC_MASK);
537 void test_imull2(long op0, long op1)
539 long res, s1, s0, flags;
544 asm volatile ("push %4\n\t"
549 : "=q" (res), "=g" (flags)
550 : "q" (s1), "0" (res), "1" (flags));
551 printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
552 "imull", s0, s1, res, flags & CC_MASK);
555 #if defined(__x86_64__)
556 void test_imulq2(long op0, long op1)
558 long res, s1, s0, flags;
563 asm volatile ("push %4\n\t"
568 : "=q" (res), "=g" (flags)
569 : "q" (s1), "0" (res), "1" (flags));
570 printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
571 "imulq", s0, s1, res, flags & CC_MASK);
575 #define TEST_IMUL_IM(size, rsize, op0, op1)\
577 long res, flags, s1;\
581 asm volatile ("push %3\n\t"\
583 "imul" size " $" #op0 ", %" rsize "2, %" rsize "0\n\t" \
586 : "=r" (res), "=g" (flags)\
587 : "r" (s1), "1" (flags), "0" (res));\
588 printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",\
589 "imul" size " im", (long)op0, (long)op1, res, flags & CC_MASK);\
597 #include "test-i386-muldiv.h"
600 #include "test-i386-muldiv.h"
604 test_imulb(0x1234561d, 4);
606 test_imulb(0x80, 0x80);
607 test_imulb(0x10, 0x10);
609 test_imulw(0, 0x1234001d, 45);
610 test_imulw(0, 23, -45);
611 test_imulw(0, 0x8000, 0x8000);
612 test_imulw(0, 0x100, 0x100);
614 test_imull(0, 0x1234001d, 45);
615 test_imull(0, 23, -45);
616 test_imull(0, 0x80000000, 0x80000000);
617 test_imull(0, 0x10000, 0x10000);
619 test_mulb(0x1234561d, 4);
621 test_mulb(0x80, 0x80);
622 test_mulb(0x10, 0x10);
624 test_mulw(0, 0x1234001d, 45);
625 test_mulw(0, 23, -45);
626 test_mulw(0, 0x8000, 0x8000);
627 test_mulw(0, 0x100, 0x100);
629 test_mull(0, 0x1234001d, 45);
630 test_mull(0, 23, -45);
631 test_mull(0, 0x80000000, 0x80000000);
632 test_mull(0, 0x10000, 0x10000);
634 test_imulw2(0x1234001d, 45);
635 test_imulw2(23, -45);
636 test_imulw2(0x8000, 0x8000);
637 test_imulw2(0x100, 0x100);
639 test_imull2(0x1234001d, 45);
640 test_imull2(23, -45);
641 test_imull2(0x80000000, 0x80000000);
642 test_imull2(0x10000, 0x10000);
644 TEST_IMUL_IM("w", "w", 45, 0x1234);
645 TEST_IMUL_IM("w", "w", -45, 23);
646 TEST_IMUL_IM("w", "w", 0x8000, 0x80000000);
647 TEST_IMUL_IM("w", "w", 0x7fff, 0x1000);
649 TEST_IMUL_IM("l", "k", 45, 0x1234);
650 TEST_IMUL_IM("l", "k", -45, 23);
651 TEST_IMUL_IM("l", "k", 0x8000, 0x80000000);
652 TEST_IMUL_IM("l", "k", 0x7fff, 0x1000);
654 test_idivb(0x12341678, 0x127e);
655 test_idivb(0x43210123, -5);
656 test_idivb(0x12340004, -1);
658 test_idivw(0, 0x12345678, 12347);
659 test_idivw(0, -23223, -45);
660 test_idivw(0, 0x12348000, -1);
661 test_idivw(0x12343, 0x12345678, 0x81238567);
663 test_idivl(0, 0x12345678, 12347);
664 test_idivl(0, -233223, -45);
665 test_idivl(0, 0x80000000, -1);
666 test_idivl(0x12343, 0x12345678, 0x81234567);
668 test_divb(0x12341678, 0x127e);
669 test_divb(0x43210123, -5);
670 test_divb(0x12340004, -1);
672 test_divw(0, 0x12345678, 12347);
673 test_divw(0, -23223, -45);
674 test_divw(0, 0x12348000, -1);
675 test_divw(0x12343, 0x12345678, 0x81238567);
677 test_divl(0, 0x12345678, 12347);
678 test_divl(0, -233223, -45);
679 test_divl(0, 0x80000000, -1);
680 test_divl(0x12343, 0x12345678, 0x81234567);
682 #if defined(__x86_64__)
683 test_imulq(0, 0x1234001d1234001d, 45);
684 test_imulq(0, 23, -45);
685 test_imulq(0, 0x8000000000000000, 0x8000000000000000);
686 test_imulq(0, 0x100000000, 0x100000000);
688 test_mulq(0, 0x1234001d1234001d, 45);
689 test_mulq(0, 23, -45);
690 test_mulq(0, 0x8000000000000000, 0x8000000000000000);
691 test_mulq(0, 0x100000000, 0x100000000);
693 test_imulq2(0x1234001d1234001d, 45);
694 test_imulq2(23, -45);
695 test_imulq2(0x8000000000000000, 0x8000000000000000);
696 test_imulq2(0x100000000, 0x100000000);
698 TEST_IMUL_IM("q", "", 45, 0x12341234);
699 TEST_IMUL_IM("q", "", -45, 23);
700 TEST_IMUL_IM("q", "", 0x8000, 0x8000000000000000);
701 TEST_IMUL_IM("q", "", 0x7fff, 0x10000000);
703 test_idivq(0, 0x12345678abcdef, 12347);
704 test_idivq(0, -233223, -45);
705 test_idivq(0, 0x8000000000000000, -1);
706 test_idivq(0x12343, 0x12345678, 0x81234567);
708 test_divq(0, 0x12345678abcdef, 12347);
709 test_divq(0, -233223, -45);
710 test_divq(0, 0x8000000000000000, -1);
711 test_divq(0x12343, 0x12345678, 0x81234567);
715 #define TEST_BSX(op, size, op0)\
717 long res, val, resz;\
720 "mov $0x12345678, %0\n"\
721 #op " %" size "2, %" size "0 ; setz %b1" \
722 : "=&r" (res), "=&q" (resz)\
724 printf("%-10s A=" FMTLX " R=" FMTLX " %ld\n", #op, val, res, resz);\
729 TEST_BSX(bsrw, "w", 0);
730 TEST_BSX(bsrw, "w", 0x12340128);
731 TEST_BSX(bsfw, "w", 0);
732 TEST_BSX(bsfw, "w", 0x12340128);
733 TEST_BSX(bsrl, "k", 0);
734 TEST_BSX(bsrl, "k", 0x00340128);
735 TEST_BSX(bsfl, "k", 0);
736 TEST_BSX(bsfl, "k", 0x00340128);
737 #if defined(__x86_64__)
738 TEST_BSX(bsrq, "", 0);
739 TEST_BSX(bsrq, "", 0x003401281234);
740 TEST_BSX(bsfq, "", 0);
741 TEST_BSX(bsfq, "", 0x003401281234);
745 /**********************************************/
752 union float64u q_nan = { .l = 0xFFF8000000000000LL };
753 union float64u s_nan = { .l = 0xFFF0000000000000LL };
755 void test_fops(double a, double b)
757 printf("a=%f b=%f a+b=%f\n", a, b, a + b);
758 printf("a=%f b=%f a-b=%f\n", a, b, a - b);
759 printf("a=%f b=%f a*b=%f\n", a, b, a * b);
760 printf("a=%f b=%f a/b=%f\n", a, b, a / b);
761 printf("a=%f b=%f fmod(a, b)=%f\n", a, b, fmod(a, b));
762 printf("a=%f sqrt(a)=%f\n", a, sqrt(a));
763 printf("a=%f sin(a)=%f\n", a, sin(a));
764 printf("a=%f cos(a)=%f\n", a, cos(a));
765 printf("a=%f tan(a)=%f\n", a, tan(a));
766 printf("a=%f log(a)=%f\n", a, log(a));
767 printf("a=%f exp(a)=%f\n", a, exp(a));
768 printf("a=%f b=%f atan2(a, b)=%f\n", a, b, atan2(a, b));
769 /* just to test some op combining */
770 printf("a=%f asin(sin(a))=%f\n", a, asin(sin(a)));
771 printf("a=%f acos(cos(a))=%f\n", a, acos(cos(a)));
772 printf("a=%f atan(tan(a))=%f\n", a, atan(tan(a)));
776 void fpu_clear_exceptions(void)
778 struct __attribute__((packed)) {
786 long double fpregs[8];
789 asm volatile ("fnstenv %0\n" : : "m" (float_env32));
790 float_env32.fpus &= ~0x7f;
791 asm volatile ("fldenv %0\n" : : "m" (float_env32));
794 /* XXX: display exception bits when supported */
795 #define FPUS_EMASK 0x0000
796 //#define FPUS_EMASK 0x007f
798 void test_fcmp(double a, double b)
802 fpu_clear_exceptions();
807 printf("fcom(%f %f)=%04lx \n",
808 a, b, fpus & (0x4500 | FPUS_EMASK));
809 fpu_clear_exceptions();
814 printf("fucom(%f %f)=%04lx\n",
815 a, b, fpus & (0x4500 | FPUS_EMASK));
817 /* test f(u)comi instruction */
818 fpu_clear_exceptions();
823 : "=r" (eflags), "=a" (fpus)
825 printf("fcomi(%f %f)=%04lx %02lx\n",
826 a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
827 fpu_clear_exceptions();
828 asm("fucomi %3, %2\n"
832 : "=r" (eflags), "=a" (fpus)
834 printf("fucomi(%f %f)=%04lx %02lx\n",
835 a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
837 fpu_clear_exceptions();
838 asm volatile("fxam\n"
842 printf("fxam(%f)=%04lx\n", a, fpus & 0x4700);
843 fpu_clear_exceptions();
846 void test_fcvt(double a)
859 printf("(float)%f = %f\n", a, fa);
860 printf("(long double)%f = %Lf\n", a, la);
861 printf("a=" FMT64X "\n", *(uint64_t *)&a);
862 printf("la=" FMT64X " %04x\n", *(uint64_t *)&la,
863 *(unsigned short *)((char *)(&la) + 8));
865 /* test all roundings */
866 asm volatile ("fstcw %0" : "=m" (fpuc));
869 val16 = (fpuc & ~0x0c00) | (i << 10);
870 asm volatile ("fldcw %0" : : "m" (val16));
871 asm volatile ("fist %0" : "=m" (wa) : "t" (a));
872 asm volatile ("fistl %0" : "=m" (ia) : "t" (a));
873 asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st");
874 asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a));
875 asm volatile ("fldcw %0" : : "m" (fpuc));
876 printf("(short)a = %d\n", wa);
877 printf("(int)a = %d\n", ia);
878 printf("(int64_t)a = " FMT64X "\n", lla);
879 printf("rint(a) = %f\n", ra);
884 asm("fld" #N : "=t" (a)); \
885 printf("fld" #N "= %f\n", a);
887 void test_fconst(void)
899 void test_fbcd(double a)
901 unsigned short bcd[5];
904 asm("fbstp %0" : "=m" (bcd[0]) : "t" (a) : "st");
905 asm("fbld %1" : "=t" (b) : "m" (bcd[0]));
906 printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n",
907 a, bcd[4], bcd[3], bcd[2], bcd[1], bcd[0], b);
910 #define TEST_ENV(env, save, restore)\
912 memset((env), 0xaa, sizeof(*(env)));\
914 asm volatile ("fldl %0" : : "m" (dtab[i]));\
915 asm volatile (save " %0\n" : : "m" (*(env)));\
916 asm volatile (restore " %0\n": : "m" (*(env)));\
918 asm volatile ("fstpl %0" : "=m" (rtab[i]));\
920 printf("res[%d]=%f\n", i, rtab[i]);\
921 printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
923 (env)->fpus & 0xff00,\
929 struct __attribute__((packed)) {
937 long double fpregs[8];
939 struct __attribute__((packed)) {
944 long double fpregs[8];
953 TEST_ENV(&float_env16, "data16 fnstenv", "data16 fldenv");
954 TEST_ENV(&float_env16, "data16 fnsave", "data16 frstor");
955 TEST_ENV(&float_env32, "fnstenv", "fldenv");
956 TEST_ENV(&float_env32, "fnsave", "frstor");
960 asm volatile ("fldl %0" : : "m" (dtab[i]));
961 asm volatile("ffree %st(2)");
962 asm volatile ("fnstenv %0\n" : : "m" (float_env32));
963 asm volatile ("fninit");
964 printf("fptag=%04x\n", float_env32.fptag);
968 #define TEST_FCMOV(a, b, eflags, CC)\
973 "fcmov" CC " %2, %0\n"\
975 : "0" (a), "u" (b), "g" (eflags));\
976 printf("fcmov%s eflags=0x%04lx-> %f\n", \
977 CC, (long)eflags, res);\
980 void test_fcmov(void)
987 for(i = 0; i < 4; i++) {
993 TEST_FCMOV(a, b, eflags, "b");
994 TEST_FCMOV(a, b, eflags, "e");
995 TEST_FCMOV(a, b, eflags, "be");
996 TEST_FCMOV(a, b, eflags, "nb");
997 TEST_FCMOV(a, b, eflags, "ne");
998 TEST_FCMOV(a, b, eflags, "nbe");
1000 TEST_FCMOV(a, b, 0, "u");
1001 TEST_FCMOV(a, b, CC_P, "u");
1002 TEST_FCMOV(a, b, 0, "nu");
1003 TEST_FCMOV(a, b, CC_P, "nu");
1006 void test_floats(void)
1013 test_fcmp(2, q_nan.d);
1014 test_fcmp(q_nan.d, -1);
1015 test_fcmp(-1.0/0.0, -1);
1016 test_fcmp(1.0/0.0, -1);
1020 test_fcvt(-1.0/9.0);
1023 test_fcvt(-1.0/0.0);
1027 test_fbcd(1234567890123456.0);
1028 test_fbcd(-123451234567890.0);
1035 /**********************************************/
1036 #if !defined(__x86_64__)
1038 #define TEST_BCD(op, op0, cc_in, cc_mask)\
1048 : "=a" (res), "=g" (flags)\
1049 : "0" (res), "1" (flags));\
1050 printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",\
1051 #op, op0, res, cc_in, flags & cc_mask);\
1056 TEST_BCD(daa, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1057 TEST_BCD(daa, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1058 TEST_BCD(daa, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1059 TEST_BCD(daa, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1060 TEST_BCD(daa, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1061 TEST_BCD(daa, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1062 TEST_BCD(daa, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1063 TEST_BCD(daa, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1064 TEST_BCD(daa, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1065 TEST_BCD(daa, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1066 TEST_BCD(daa, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1067 TEST_BCD(daa, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1068 TEST_BCD(daa, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1070 TEST_BCD(das, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1071 TEST_BCD(das, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1072 TEST_BCD(das, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1073 TEST_BCD(das, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1074 TEST_BCD(das, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1075 TEST_BCD(das, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1076 TEST_BCD(das, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1077 TEST_BCD(das, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1078 TEST_BCD(das, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1079 TEST_BCD(das, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1080 TEST_BCD(das, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1081 TEST_BCD(das, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1082 TEST_BCD(das, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1084 TEST_BCD(aaa, 0x12340205, CC_A, (CC_C | CC_A));
1085 TEST_BCD(aaa, 0x12340306, CC_A, (CC_C | CC_A));
1086 TEST_BCD(aaa, 0x1234040a, CC_A, (CC_C | CC_A));
1087 TEST_BCD(aaa, 0x123405fa, CC_A, (CC_C | CC_A));
1088 TEST_BCD(aaa, 0x12340205, 0, (CC_C | CC_A));
1089 TEST_BCD(aaa, 0x12340306, 0, (CC_C | CC_A));
1090 TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A));
1091 TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A));
1093 TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
1094 TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
1095 TEST_BCD(aas, 0x1234040a, CC_A, (CC_C | CC_A));
1096 TEST_BCD(aas, 0x123405fa, CC_A, (CC_C | CC_A));
1097 TEST_BCD(aas, 0x12340205, 0, (CC_C | CC_A));
1098 TEST_BCD(aas, 0x12340306, 0, (CC_C | CC_A));
1099 TEST_BCD(aas, 0x1234040a, 0, (CC_C | CC_A));
1100 TEST_BCD(aas, 0x123405fa, 0, (CC_C | CC_A));
1102 TEST_BCD(aam, 0x12340547, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
1103 TEST_BCD(aad, 0x12340407, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
1107 #define TEST_XCHG(op, size, opconst)\
1110 op0 = i2l(0x12345678);\
1111 op1 = i2l(0xfbca7654);\
1112 asm(#op " %" size "0, %" size "1" \
1113 : "=q" (op0), opconst (op1) \
1115 printf("%-10s A=" FMTLX " B=" FMTLX "\n",\
1119 #define TEST_CMPXCHG(op, size, opconst, eax)\
1121 long op0, op1, op2;\
1122 op0 = i2l(0x12345678);\
1123 op1 = i2l(0xfbca7654);\
1125 asm(#op " %" size "0, %" size "1" \
1126 : "=q" (op0), opconst (op1) \
1127 : "0" (op0), "a" (op2));\
1128 printf("%-10s EAX=" FMTLX " A=" FMTLX " C=" FMTLX "\n",\
1129 #op, op2, op0, op1);\
1132 void test_xchg(void)
1134 #if defined(__x86_64__)
1135 TEST_XCHG(xchgq, "", "+q");
1137 TEST_XCHG(xchgl, "k", "+q");
1138 TEST_XCHG(xchgw, "w", "+q");
1139 TEST_XCHG(xchgb, "b", "+q");
1141 #if defined(__x86_64__)
1142 TEST_XCHG(xchgq, "", "=m");
1144 TEST_XCHG(xchgl, "k", "+m");
1145 TEST_XCHG(xchgw, "w", "+m");
1146 TEST_XCHG(xchgb, "b", "+m");
1148 #if defined(__x86_64__)
1149 TEST_XCHG(xaddq, "", "+q");
1151 TEST_XCHG(xaddl, "k", "+q");
1152 TEST_XCHG(xaddw, "w", "+q");
1153 TEST_XCHG(xaddb, "b", "+q");
1158 asm("xaddl %1, %0" : "=r" (res) : "0" (res));
1159 printf("xaddl same res=%08x\n", res);
1162 #if defined(__x86_64__)
1163 TEST_XCHG(xaddq, "", "+m");
1165 TEST_XCHG(xaddl, "k", "+m");
1166 TEST_XCHG(xaddw, "w", "+m");
1167 TEST_XCHG(xaddb, "b", "+m");
1169 #if defined(__x86_64__)
1170 TEST_CMPXCHG(cmpxchgq, "", "+q", 0xfbca7654);
1172 TEST_CMPXCHG(cmpxchgl, "k", "+q", 0xfbca7654);
1173 TEST_CMPXCHG(cmpxchgw, "w", "+q", 0xfbca7654);
1174 TEST_CMPXCHG(cmpxchgb, "b", "+q", 0xfbca7654);
1176 #if defined(__x86_64__)
1177 TEST_CMPXCHG(cmpxchgq, "", "+q", 0xfffefdfc);
1179 TEST_CMPXCHG(cmpxchgl, "k", "+q", 0xfffefdfc);
1180 TEST_CMPXCHG(cmpxchgw, "w", "+q", 0xfffefdfc);
1181 TEST_CMPXCHG(cmpxchgb, "b", "+q", 0xfffefdfc);
1183 #if defined(__x86_64__)
1184 TEST_CMPXCHG(cmpxchgq, "", "+m", 0xfbca7654);
1186 TEST_CMPXCHG(cmpxchgl, "k", "+m", 0xfbca7654);
1187 TEST_CMPXCHG(cmpxchgw, "w", "+m", 0xfbca7654);
1188 TEST_CMPXCHG(cmpxchgb, "b", "+m", 0xfbca7654);
1190 #if defined(__x86_64__)
1191 TEST_CMPXCHG(cmpxchgq, "", "+m", 0xfffefdfc);
1193 TEST_CMPXCHG(cmpxchgl, "k", "+m", 0xfffefdfc);
1194 TEST_CMPXCHG(cmpxchgw, "w", "+m", 0xfffefdfc);
1195 TEST_CMPXCHG(cmpxchgb, "b", "+m", 0xfffefdfc);
1198 uint64_t op0, op1, op2;
1202 for(i = 0; i < 2; i++) {
1203 op0 = 0x123456789abcdLL;
1204 eax = i2l(op0 & 0xffffffff);
1205 edx = i2l(op0 >> 32);
1207 op1 = 0xfbca765423456LL;
1210 op2 = 0x6532432432434LL;
1211 asm("cmpxchg8b %2\n"
1214 : "=a" (eax), "=d" (edx), "=m" (op1), "=g" (eflags)
1215 : "0" (eax), "1" (edx), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
1216 printf("cmpxchg8b: eax=" FMTLX " edx=" FMTLX " op1=" FMT64X " CC=%02lx\n",
1217 eax, edx, op1, eflags & CC_Z);
1223 /**********************************************/
1224 /* segmentation tests */
1226 #include <sys/syscall.h>
1228 #include <asm/ldt.h>
1229 #include <linux/version.h>
1231 static inline int modify_ldt(int func, void * ptr, unsigned long bytecount)
1233 return syscall(__NR_modify_ldt, func, ptr, bytecount);
1236 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 66)
1237 #define modify_ldt_ldt_s user_desc
1240 #define MK_SEL(n) (((n) << 3) | 7)
1242 uint8_t seg_data1[4096];
1243 uint8_t seg_data2[4096];
1245 #define TEST_LR(op, size, seg, mask)\
1248 uint16_t mseg = seg;\
1250 asm (op " %" size "2, %" size "0\n" \
1255 : "=r" (res), "=r" (res2) : "m" (mseg), "0" (res));\
1256 printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
1259 #define TEST_ARPL(op, size, op1, op2)\
1264 asm volatile(op " %" size "3, %" size "0\n"\
1269 : "=r" (a), "=r" (c) : "0" (a), "r" (b)); \
1270 printf(op size " A=" FMTLX " B=" FMTLX " R=" FMTLX " z=%ld\n",\
1271 (long)(op1), (long)(op2), a, c);\
1274 /* NOTE: we use Linux modify_ldt syscall */
1275 void test_segs(void)
1277 struct modify_ldt_ldt_s ldt;
1278 long long ldt_table[3];
1284 } __attribute__((packed)) segoff;
1286 ldt.entry_number = 1;
1287 ldt.base_addr = (unsigned long)&seg_data1;
1288 ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
1290 ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1291 ldt.read_exec_only = 0;
1292 ldt.limit_in_pages = 1;
1293 ldt.seg_not_present = 0;
1295 modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1297 ldt.entry_number = 2;
1298 ldt.base_addr = (unsigned long)&seg_data2;
1299 ldt.limit = (sizeof(seg_data2) + 0xfff) >> 12;
1301 ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1302 ldt.read_exec_only = 0;
1303 ldt.limit_in_pages = 1;
1304 ldt.seg_not_present = 0;
1306 modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1308 modify_ldt(0, &ldt_table, sizeof(ldt_table)); /* read ldt entries */
1313 printf("%d: %016Lx\n", i, ldt_table[i]);
1316 /* do some tests with fs or gs */
1317 asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
1319 seg_data1[1] = 0xaa;
1320 seg_data2[1] = 0x55;
1322 asm volatile ("fs movzbl 0x1, %0" : "=r" (res));
1323 printf("FS[1] = %02x\n", res);
1325 asm volatile ("pushl %%gs\n"
1327 "gs movzbl 0x1, %0\n"
1331 printf("GS[1] = %02x\n", res);
1333 /* tests with ds/ss (implicit segment case) */
1335 asm volatile ("pushl %%ebp\n\t"
1338 "movl %3, %%ebp\n\t"
1339 "movzbl 0x1, %0\n\t"
1340 "movzbl (%%ebp), %1\n\t"
1343 : "=r" (res), "=r" (res2)
1344 : "r" (MK_SEL(1)), "r" (&tmp));
1345 printf("DS[1] = %02x\n", res);
1346 printf("SS[tmp] = %02x\n", res2);
1348 segoff.seg = MK_SEL(2);
1349 segoff.offset = 0xabcdef12;
1350 asm volatile("lfs %2, %0\n\t"
1352 : "=r" (res), "=g" (res2)
1354 printf("FS:reg = %04x:%08x\n", res2, res);
1356 TEST_LR("larw", "w", MK_SEL(2), 0x0100);
1357 TEST_LR("larl", "", MK_SEL(2), 0x0100);
1358 TEST_LR("lslw", "w", MK_SEL(2), 0);
1359 TEST_LR("lsll", "", MK_SEL(2), 0);
1361 TEST_LR("larw", "w", 0xfff8, 0);
1362 TEST_LR("larl", "", 0xfff8, 0);
1363 TEST_LR("lslw", "w", 0xfff8, 0);
1364 TEST_LR("lsll", "", 0xfff8, 0);
1366 TEST_ARPL("arpl", "w", 0x12345678 | 3, 0x762123c | 1);
1367 TEST_ARPL("arpl", "w", 0x12345678 | 1, 0x762123c | 3);
1368 TEST_ARPL("arpl", "w", 0x12345678 | 1, 0x762123c | 1);
1371 /* 16 bit code test */
1372 extern char code16_start, code16_end;
1373 extern char code16_func1;
1374 extern char code16_func2;
1375 extern char code16_func3;
1377 void test_code16(void)
1379 struct modify_ldt_ldt_s ldt;
1382 /* build a code segment */
1383 ldt.entry_number = 1;
1384 ldt.base_addr = (unsigned long)&code16_start;
1385 ldt.limit = &code16_end - &code16_start;
1387 ldt.contents = MODIFY_LDT_CONTENTS_CODE;
1388 ldt.read_exec_only = 0;
1389 ldt.limit_in_pages = 0;
1390 ldt.seg_not_present = 0;
1392 modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1394 /* call the first function */
1395 asm volatile ("lcall %1, %2"
1397 : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc");
1398 printf("func1() = 0x%08x\n", res);
1399 asm volatile ("lcall %2, %3"
1400 : "=a" (res), "=c" (res2)
1401 : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc");
1402 printf("func2() = 0x%08x spdec=%d\n", res, res2);
1403 asm volatile ("lcall %1, %2"
1405 : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
1406 printf("func3() = 0x%08x\n", res);
1410 #if defined(__x86_64__)
1411 asm(".globl func_lret\n"
1413 "movl $0x87654641, %eax\n"
1416 asm(".globl func_lret\n"
1418 "movl $0x87654321, %eax\n"
1421 ".globl func_iret\n"
1423 "movl $0xabcd4321, %eax\n"
1427 extern char func_lret;
1428 extern char func_iret;
1430 void test_misc(void)
1435 for(i=0;i<256;i++) table[i] = 256 - i;
1437 asm ("xlat" : "=a" (res) : "b" (table), "0" (res));
1438 printf("xlat: EAX=" FMTLX "\n", res);
1440 #if defined(__x86_64__)
1443 /* XXX: see if Intel Core2 and AMD64 behavior really
1444 differ. Here we implemented the Intel way which is not
1445 compatible yet with QEMU. */
1446 static struct __attribute__((packed)) {
1452 asm volatile ("mov %%cs, %0" : "=r" (cs_sel));
1454 asm volatile ("push %1\n"
1457 : "r" (cs_sel) : "memory", "cc");
1458 printf("func_lret=" FMTLX "\n", res);
1460 desc.offset = (long)&func_lret;
1463 asm volatile ("xor %%rax, %%rax\n"
1464 "rex64 lcall *(%%rcx)\n"
1468 printf("func_lret2=" FMTLX "\n", res);
1470 asm volatile ("push %2\n"
1473 "rex64 ljmp *(%%rcx)\n"
1476 : "c" (&desc), "b" (cs_sel)
1478 printf("func_lret3=" FMTLX "\n", res);
1482 asm volatile ("push %%cs ; call %1"
1484 : "m" (func_lret): "memory", "cc");
1485 printf("func_lret=" FMTLX "\n", res);
1487 asm volatile ("pushf ; push %%cs ; call %1"
1489 : "m" (func_iret): "memory", "cc");
1490 printf("func_iret=" FMTLX "\n", res);
1493 #if defined(__x86_64__)
1494 /* specific popl test */
1495 asm volatile ("push $12345432 ; push $0x9abcdef ; pop (%%rsp) ; pop %0"
1497 printf("popl esp=" FMTLX "\n", res);
1499 /* specific popl test */
1500 asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popl (%%esp) ; popl %0"
1502 printf("popl esp=" FMTLX "\n", res);
1504 /* specific popw test */
1505 asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popw (%%esp) ; addl $2, %%esp ; popl %0"
1507 printf("popw esp=" FMTLX "\n", res);
1511 uint8_t str_buffer[4096];
1513 #define TEST_STRING1(OP, size, DF, REP)\
1515 long esi, edi, eax, ecx, eflags;\
1517 esi = (long)(str_buffer + sizeof(str_buffer) / 2);\
1518 edi = (long)(str_buffer + sizeof(str_buffer) / 2) + 16;\
1519 eax = i2l(0x12345678);\
1522 asm volatile ("push $0\n\t"\
1525 REP #OP size "\n\t"\
1529 : "=S" (esi), "=D" (edi), "=a" (eax), "=c" (ecx), "=g" (eflags)\
1530 : "0" (esi), "1" (edi), "2" (eax), "3" (ecx));\
1531 printf("%-10s ESI=" FMTLX " EDI=" FMTLX " EAX=" FMTLX " ECX=" FMTLX " EFL=%04x\n",\
1532 REP #OP size, esi, edi, eax, ecx,\
1533 (int)(eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)));\
1536 #define TEST_STRING(OP, REP)\
1537 TEST_STRING1(OP, "b", "", REP);\
1538 TEST_STRING1(OP, "w", "", REP);\
1539 TEST_STRING1(OP, "l", "", REP);\
1540 X86_64_ONLY(TEST_STRING1(OP, "q", "", REP));\
1541 TEST_STRING1(OP, "b", "std", REP);\
1542 TEST_STRING1(OP, "w", "std", REP);\
1543 TEST_STRING1(OP, "l", "std", REP);\
1544 X86_64_ONLY(TEST_STRING1(OP, "q", "std", REP))
1546 void test_string(void)
1549 for(i = 0;i < sizeof(str_buffer); i++)
1550 str_buffer[i] = i + 0x56;
1551 TEST_STRING(stos, "");
1552 TEST_STRING(stos, "rep ");
1553 TEST_STRING(lods, ""); /* to verify stos */
1554 TEST_STRING(lods, "rep ");
1555 TEST_STRING(movs, "");
1556 TEST_STRING(movs, "rep ");
1557 TEST_STRING(lods, ""); /* to verify stos */
1559 /* XXX: better tests */
1560 TEST_STRING(scas, "");
1561 TEST_STRING(scas, "repz ");
1562 TEST_STRING(scas, "repnz ");
1563 TEST_STRING(cmps, "");
1564 TEST_STRING(cmps, "repz ");
1565 TEST_STRING(cmps, "repnz ");
1571 static inline void set_bit(uint8_t *a, unsigned int bit)
1573 a[bit / 8] |= (1 << (bit % 8));
1576 static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg)
1578 return (uint8_t *)((seg << 4) + (reg & 0xffff));
1581 static inline void pushw(struct vm86_regs *r, int val)
1583 r->esp = (r->esp & ~0xffff) | ((r->esp - 2) & 0xffff);
1584 *(uint16_t *)seg_to_linear(r->ss, r->esp) = val;
1587 static inline int vm86(int func, struct vm86plus_struct *v86)
1589 return syscall(__NR_vm86, func, v86);
1592 extern char vm86_code_start;
1593 extern char vm86_code_end;
1595 #define VM86_CODE_CS 0x100
1596 #define VM86_CODE_IP 0x100
1598 void test_vm86(void)
1600 struct vm86plus_struct ctx;
1601 struct vm86_regs *r;
1605 vm86_mem = mmap((void *)0x00000000, 0x110000,
1606 PROT_WRITE | PROT_READ | PROT_EXEC,
1607 MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
1608 if (vm86_mem == MAP_FAILED) {
1609 printf("ERROR: could not map vm86 memory");
1612 memset(&ctx, 0, sizeof(ctx));
1614 /* init basic registers */
1616 r->eip = VM86_CODE_IP;
1625 r->eflags = VIF_MASK;
1627 /* move code to proper address. We use the same layout as a .com
1629 memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP,
1630 &vm86_code_start, &vm86_code_end - &vm86_code_start);
1632 /* mark int 0x21 as being emulated */
1633 set_bit((uint8_t *)&ctx.int_revectored, 0x21);
1636 ret = vm86(VM86_ENTER, &ctx);
1637 switch(VM86_TYPE(ret)) {
1642 int_num = VM86_ARG(ret);
1643 if (int_num != 0x21)
1645 ah = (r->eax >> 8) & 0xff;
1647 case 0x00: /* exit */
1649 case 0x02: /* write char */
1655 case 0x09: /* write string */
1658 ptr = seg_to_linear(r->ds, r->edx);
1665 r->eax = (r->eax & ~0xff) | '$';
1668 case 0xff: /* extension: write eflags number in edx */
1670 #ifndef LINUX_VM86_IOPL_FIX
1673 printf("%08x\n", v);
1677 printf("unsupported int 0x%02x\n", int_num);
1683 /* a signal came, we just ignore that */
1688 printf("ERROR: unhandled vm86 return code (0x%x)\n", ret);
1693 printf("VM86 end\n");
1694 munmap(vm86_mem, 0x110000);
1698 /* exception tests */
1699 #if defined(__i386__) && !defined(REG_EAX)
1710 #define REG_TRAPNO TRAPNO
1714 #if defined(__x86_64__)
1715 #define REG_EIP REG_RIP
1722 void sig_handler(int sig, siginfo_t *info, void *puc)
1724 struct ucontext *uc = puc;
1726 printf("si_signo=%d si_errno=%d si_code=%d",
1727 info->si_signo, info->si_errno, info->si_code);
1728 printf(" si_addr=0x%08lx",
1729 (unsigned long)info->si_addr);
1732 printf("trapno=" FMTLX " err=" FMTLX,
1733 (long)uc->uc_mcontext.gregs[REG_TRAPNO],
1734 (long)uc->uc_mcontext.gregs[REG_ERR]);
1735 printf(" EIP=" FMTLX, (long)uc->uc_mcontext.gregs[REG_EIP]);
1737 longjmp(jmp_env, 1);
1740 void test_exceptions(void)
1742 struct sigaction act;
1745 act.sa_sigaction = sig_handler;
1746 sigemptyset(&act.sa_mask);
1747 act.sa_flags = SA_SIGINFO | SA_NODEFER;
1748 sigaction(SIGFPE, &act, NULL);
1749 sigaction(SIGILL, &act, NULL);
1750 sigaction(SIGSEGV, &act, NULL);
1751 sigaction(SIGBUS, &act, NULL);
1752 sigaction(SIGTRAP, &act, NULL);
1754 /* test division by zero reporting */
1755 printf("DIVZ exception:\n");
1756 if (setjmp(jmp_env) == 0) {
1757 /* now divide by zero */
1762 #if !defined(__x86_64__)
1763 printf("BOUND exception:\n");
1764 if (setjmp(jmp_env) == 0) {
1765 /* bound exception */
1768 asm volatile ("bound %0, %1" : : "r" (11), "m" (tab[0]));
1773 printf("segment exceptions:\n");
1774 if (setjmp(jmp_env) == 0) {
1775 /* load an invalid segment */
1776 asm volatile ("movl %0, %%fs" : : "r" ((0x1234 << 3) | 1));
1778 if (setjmp(jmp_env) == 0) {
1779 /* null data segment is valid */
1780 asm volatile ("movl %0, %%fs" : : "r" (3));
1781 /* null stack segment */
1782 asm volatile ("movl %0, %%ss" : : "r" (3));
1786 struct modify_ldt_ldt_s ldt;
1787 ldt.entry_number = 1;
1788 ldt.base_addr = (unsigned long)&seg_data1;
1789 ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
1791 ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1792 ldt.read_exec_only = 0;
1793 ldt.limit_in_pages = 1;
1794 ldt.seg_not_present = 1;
1796 modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1798 if (setjmp(jmp_env) == 0) {
1799 /* segment not present */
1800 asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
1805 /* test SEGV reporting */
1806 printf("PF exception:\n");
1807 if (setjmp(jmp_env) == 0) {
1809 /* we add a nop to test a weird PC retrieval case */
1810 asm volatile ("nop");
1811 /* now store in an invalid address */
1812 *(char *)0x1234 = 1;
1815 /* test SEGV reporting */
1816 printf("PF exception:\n");
1817 if (setjmp(jmp_env) == 0) {
1819 /* read from an invalid address */
1820 v1 = *(char *)0x1234;
1823 /* test illegal instruction reporting */
1824 printf("UD2 exception:\n");
1825 if (setjmp(jmp_env) == 0) {
1826 /* now execute an invalid instruction */
1827 asm volatile("ud2");
1829 printf("lock nop exception:\n");
1830 if (setjmp(jmp_env) == 0) {
1831 /* now execute an invalid instruction */
1832 asm volatile("lock nop");
1835 printf("INT exception:\n");
1836 if (setjmp(jmp_env) == 0) {
1837 asm volatile ("int $0xfd");
1839 if (setjmp(jmp_env) == 0) {
1840 asm volatile ("int $0x01");
1842 if (setjmp(jmp_env) == 0) {
1843 asm volatile (".byte 0xcd, 0x03");
1845 if (setjmp(jmp_env) == 0) {
1846 asm volatile ("int $0x04");
1848 if (setjmp(jmp_env) == 0) {
1849 asm volatile ("int $0x05");
1852 printf("INT3 exception:\n");
1853 if (setjmp(jmp_env) == 0) {
1854 asm volatile ("int3");
1857 printf("CLI exception:\n");
1858 if (setjmp(jmp_env) == 0) {
1859 asm volatile ("cli");
1862 printf("STI exception:\n");
1863 if (setjmp(jmp_env) == 0) {
1864 asm volatile ("cli");
1867 #if !defined(__x86_64__)
1868 printf("INTO exception:\n");
1869 if (setjmp(jmp_env) == 0) {
1870 /* overflow exception */
1871 asm volatile ("addl $1, %0 ; into" : : "r" (0x7fffffff));
1875 printf("OUTB exception:\n");
1876 if (setjmp(jmp_env) == 0) {
1877 asm volatile ("outb %%al, %%dx" : : "d" (0x4321), "a" (0));
1880 printf("INB exception:\n");
1881 if (setjmp(jmp_env) == 0) {
1882 asm volatile ("inb %%dx, %%al" : "=a" (val) : "d" (0x4321));
1885 printf("REP OUTSB exception:\n");
1886 if (setjmp(jmp_env) == 0) {
1887 asm volatile ("rep outsb" : : "d" (0x4321), "S" (tab), "c" (1));
1890 printf("REP INSB exception:\n");
1891 if (setjmp(jmp_env) == 0) {
1892 asm volatile ("rep insb" : : "d" (0x4321), "D" (tab), "c" (1));
1895 printf("HLT exception:\n");
1896 if (setjmp(jmp_env) == 0) {
1897 asm volatile ("hlt");
1900 printf("single step exception:\n");
1902 if (setjmp(jmp_env) == 0) {
1903 asm volatile ("pushf\n"
1904 "orl $0x00100, (%%esp)\n"
1906 "movl $0xabcd, %0\n"
1907 "movl $0x0, %0\n" : "=m" (val) : : "cc", "memory");
1909 printf("val=0x%x\n", val);
1912 #if !defined(__x86_64__)
1913 /* specific precise single step test */
1914 void sig_trap_handler(int sig, siginfo_t *info, void *puc)
1916 struct ucontext *uc = puc;
1917 printf("EIP=" FMTLX "\n", (long)uc->uc_mcontext.gregs[REG_EIP]);
1920 const uint8_t sstep_buf1[4] = { 1, 2, 3, 4};
1921 uint8_t sstep_buf2[4];
1923 void test_single_step(void)
1925 struct sigaction act;
1930 act.sa_sigaction = sig_trap_handler;
1931 sigemptyset(&act.sa_mask);
1932 act.sa_flags = SA_SIGINFO;
1933 sigaction(SIGTRAP, &act, NULL);
1934 asm volatile ("pushf\n"
1935 "orl $0x00100, (%%esp)\n"
1937 "movl $0xabcd, %0\n"
1946 /* movsb: the single step should stop at each movsb iteration */
1947 "movl $sstep_buf1, %%esi\n"
1948 "movl $sstep_buf2, %%edi\n"
1956 /* cmpsb: the single step should stop at each cmpsb iteration */
1957 "movl $sstep_buf1, %%esi\n"
1958 "movl $sstep_buf2, %%edi\n"
1964 /* getpid() syscall: single step should skip one
1970 /* when modifying SS, trace is not done on the next
1972 "movl %%ss, %%ecx\n"
1973 "movl %%ecx, %%ss\n"
1976 "movl %%ecx, %%ss\n"
1987 "andl $~0x00100, (%%esp)\n"
1991 : "cc", "memory", "eax", "ecx", "esi", "edi");
1992 printf("val=%d\n", val);
1993 for(i = 0; i < 4; i++)
1994 printf("sstep_buf2[%d] = %d\n", i, sstep_buf2[i]);
1997 /* self modifying code test */
1999 0xb8, 0x1, 0x00, 0x00, 0x00, /* movl $1, %eax */
2003 asm(".section \".data\"\n"
2005 "movl 4(%esp), %eax\n"
2006 "movl %eax, smc_patch_addr2 + 1\n"
2015 "smc_patch_addr2:\n"
2021 typedef int FuncType(void);
2022 extern int smc_code2(int);
2023 void test_self_modifying_code(void)
2026 printf("self modifying code:\n");
2027 printf("func1 = 0x%x\n", ((FuncType *)code)());
2028 for(i = 2; i <= 4; i++) {
2030 printf("func%d = 0x%x\n", i, ((FuncType *)code)());
2033 /* more difficult test : the modified code is just after the
2034 modifying instruction. It is forbidden in Intel specs, but it
2035 is used by old DOS programs */
2036 for(i = 2; i <= 4; i++) {
2037 printf("smc_code2(%d) = %d\n", i, smc_code2(i));
2042 long enter_stack[4096];
2044 #if defined(__x86_64__)
2052 #define TEST_ENTER(size, stack_type, level)\
2054 long esp_save, esp_val, ebp_val, ebp_save, i;\
2055 stack_type *ptr, *stack_end, *stack_ptr;\
2056 memset(enter_stack, 0, sizeof(enter_stack));\
2057 stack_end = stack_ptr = (stack_type *)(enter_stack + 4096);\
2058 ebp_val = (long)stack_ptr;\
2061 esp_val = (long)stack_ptr;\
2062 asm("mov " RSP ", %[esp_save]\n"\
2063 "mov " RBP ", %[ebp_save]\n"\
2064 "mov %[esp_val], " RSP "\n"\
2065 "mov %[ebp_val], " RBP "\n"\
2066 "enter" size " $8, $" #level "\n"\
2067 "mov " RSP ", %[esp_val]\n"\
2068 "mov " RBP ", %[ebp_val]\n"\
2069 "mov %[esp_save], " RSP "\n"\
2070 "mov %[ebp_save], " RBP "\n"\
2071 : [esp_save] "=r" (esp_save),\
2072 [ebp_save] "=r" (ebp_save),\
2073 [esp_val] "=r" (esp_val),\
2074 [ebp_val] "=r" (ebp_val)\
2075 : "[esp_val]" (esp_val),\
2076 "[ebp_val]" (ebp_val));\
2077 printf("level=%d:\n", level);\
2078 printf("esp_val=" FMTLX "\n", esp_val - (long)stack_end);\
2079 printf("ebp_val=" FMTLX "\n", ebp_val - (long)stack_end);\
2080 for(ptr = (stack_type *)esp_val; ptr < stack_end; ptr++)\
2081 printf(FMTLX "\n", (long)ptr[0]);\
2084 static void test_enter(void)
2086 #if defined(__x86_64__)
2087 TEST_ENTER("q", uint64_t, 0);
2088 TEST_ENTER("q", uint64_t, 1);
2089 TEST_ENTER("q", uint64_t, 2);
2090 TEST_ENTER("q", uint64_t, 31);
2092 TEST_ENTER("l", uint32_t, 0);
2093 TEST_ENTER("l", uint32_t, 1);
2094 TEST_ENTER("l", uint32_t, 2);
2095 TEST_ENTER("l", uint32_t, 31);
2098 TEST_ENTER("w", uint16_t, 0);
2099 TEST_ENTER("w", uint16_t, 1);
2100 TEST_ENTER("w", uint16_t, 2);
2101 TEST_ENTER("w", uint16_t, 31);
2106 typedef int __m64 __attribute__ ((__mode__ (__V2SI__)));
2107 typedef float __m128 __attribute__ ((__mode__(__V4SF__)));
2117 static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
2118 { 0x456723c698694873, 0xdc515cff944a58ec },
2119 { 0x1f297ccd58bad7ab, 0x41f21efba9e3e146 },
2120 { 0x007c62c2085427f8, 0x231be9e8cde7438d },
2121 { 0x0f76255a085427f8, 0xc233e9e8c4c9439a },
2126 asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
2127 printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
2134 #define SSE_OP2(op)\
2138 a.q[0] = test_values[2*i][0];\
2139 a.q[1] = test_values[2*i][1];\
2140 b.q[0] = test_values[2*i+1][0];\
2141 b.q[1] = test_values[2*i+1][1];\
2146 #define MMX_OP2(op)\
2150 a.q[0] = test_values[2*i][0];\
2151 b.q[0] = test_values[2*i+1][0];\
2152 asm volatile (#op " %2, %0" : "=y" (r.q[0]) : "0" (a.q[0]), "y" (b.q[0]));\
2153 printf("%-9s: a=" FMT64X " b=" FMT64X " r=" FMT64X "\n",\
2162 #define SHUF_OP(op, ib)\
2164 a.q[0] = test_values[0][0];\
2165 a.q[1] = test_values[0][1];\
2166 b.q[0] = test_values[1][0];\
2167 b.q[1] = test_values[1][1];\
2168 asm volatile (#op " $" #ib ", %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
2169 printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
2177 #define PSHUF_OP(op, ib)\
2181 a.q[0] = test_values[2*i][0];\
2182 a.q[1] = test_values[2*i][1];\
2183 asm volatile (#op " $" #ib ", %1, %0" : "=x" (r.dq) : "x" (a.dq));\
2184 printf("%-9s: a=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
2192 #define SHIFT_IM(op, ib)\
2196 a.q[0] = test_values[2*i][0];\
2197 a.q[1] = test_values[2*i][1];\
2198 asm volatile (#op " $" #ib ", %0" : "=x" (r.dq) : "0" (a.dq));\
2199 printf("%-9s: a=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
2207 #define SHIFT_OP(op, ib)\
2212 a.q[0] = test_values[2*i][0];\
2213 a.q[1] = test_values[2*i][1];\
2216 asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
2217 printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
2229 a.q[0] = test_values[2*i][0];\
2230 a.q[1] = test_values[2*i][1];\
2231 asm volatile (#op " %1, %0" : "=r" (reg) : "x" (a.dq));\
2232 printf("%-9s: a=" FMT64X "" FMT64X " r=%08x\n",\
2239 #define SSE_OPS(a) \
2243 #define SSE_OPD(a) \
2247 #define SSE_COMI(op, field)\
2249 unsigned int eflags;\
2253 asm volatile (#op " %2, %1\n"\
2257 : "x" (a.dq), "x" (b.dq));\
2258 printf("%-9s: a=%f b=%f cc=%04x\n",\
2260 eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
2263 void test_sse_comi(double a1, double b1)
2265 SSE_COMI(ucomiss, s);
2266 SSE_COMI(ucomisd, d);
2267 SSE_COMI(comiss, s);
2268 SSE_COMI(comisd, d);
2271 #define CVT_OP_XMM(op)\
2273 asm volatile (#op " %1, %0" : "=x" (r.dq) : "x" (a.dq));\
2274 printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
2280 /* Force %xmm0 usage to avoid the case where both register index are 0
2281 to test intruction decoding more extensively */
2282 #define CVT_OP_XMM2MMX(op)\
2284 asm volatile (#op " %1, %0" : "=y" (r.q[0]) : "x" (a.dq) \
2286 asm volatile("emms\n"); \
2287 printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "\n",\
2293 #define CVT_OP_MMX2XMM(op)\
2295 asm volatile (#op " %1, %0" : "=x" (r.dq) : "y" (a.q[0]));\
2296 asm volatile("emms\n"); \
2297 printf("%-9s: a=" FMT64X " r=" FMT64X "" FMT64X "\n",\
2303 #define CVT_OP_REG2XMM(op)\
2305 asm volatile (#op " %1, %0" : "=x" (r.dq) : "r" (a.l[0]));\
2306 printf("%-9s: a=%08x r=" FMT64X "" FMT64X "\n",\
2312 #define CVT_OP_XMM2REG(op)\
2314 asm volatile (#op " %1, %0" : "=r" (r.l[0]) : "x" (a.dq));\
2315 printf("%-9s: a=" FMT64X "" FMT64X " r=%08x\n",\
2333 uint32_t mxcsr_mask;
2334 uint8_t fpregs1[8 * 16];
2335 uint8_t xmm_regs[8 * 16];
2336 uint8_t dummy2[224];
2339 static struct fpxstate fpx_state __attribute__((aligned(16)));
2340 static struct fpxstate fpx_state2 __attribute__((aligned(16)));
2342 void test_fxsave(void)
2344 struct fpxstate *fp = &fpx_state;
2345 struct fpxstate *fp2 = &fpx_state2;
2348 a.q[0] = test_values[0][0];
2349 a.q[1] = test_values[0][1];
2350 b.q[0] = test_values[1][0];
2351 b.q[1] = test_values[1][1];
2353 asm("movdqa %2, %%xmm0\n"
2354 "movdqa %3, %%xmm7\n"
2355 #if defined(__x86_64__)
2356 "movdqa %2, %%xmm15\n"
2365 : "=m" (*(uint32_t *)fp2), "=m" (*(uint32_t *)fp)
2366 : "m" (a), "m" (b));
2367 printf("fpuc=%04x\n", fp->fpuc);
2368 printf("fpus=%04x\n", fp->fpus);
2369 printf("fptag=%04x\n", fp->fptag);
2370 for(i = 0; i < 3; i++) {
2371 printf("ST%d: " FMT64X " %04x\n",
2373 *(uint64_t *)&fp->fpregs1[i * 16],
2374 *(uint16_t *)&fp->fpregs1[i * 16 + 8]);
2376 printf("mxcsr=%08x\n", fp->mxcsr & 0x1f80);
2377 #if defined(__x86_64__)
2382 for(i = 0; i < nb_xmm; i++) {
2383 printf("xmm%d: " FMT64X "" FMT64X "\n",
2385 *(uint64_t *)&fp->xmm_regs[i * 16],
2386 *(uint64_t *)&fp->xmm_regs[i * 16 + 8]);
2447 asm volatile ("pinsrw $1, %1, %0" : "=y" (r.q[0]) : "r" (0x12345678));
2448 printf("%-9s: r=" FMT64X "\n", "pinsrw", r.q[0]);
2450 asm volatile ("pinsrw $5, %1, %0" : "=x" (r.dq) : "r" (0x12345678));
2451 printf("%-9s: r=" FMT64X "" FMT64X "\n", "pinsrw", r.q[1], r.q[0]);
2453 a.q[0] = test_values[0][0];
2454 a.q[1] = test_values[0][1];
2455 asm volatile ("pextrw $1, %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
2456 printf("%-9s: r=%08x\n", "pextrw", r.l[0]);
2458 asm volatile ("pextrw $5, %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
2459 printf("%-9s: r=%08x\n", "pextrw", r.l[0]);
2461 asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
2462 printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
2464 asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
2465 printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
2471 a.q[0] = test_values[0][0];
2472 a.q[1] = test_values[0][1];
2473 b.q[0] = test_values[1][0];
2474 b.q[1] = test_values[1][1];
2475 asm volatile("maskmovq %1, %0" :
2476 : "y" (a.q[0]), "y" (b.q[0]), "D" (&r)
2478 printf("%-9s: r=" FMT64X " a=" FMT64X " b=" FMT64X "\n",
2483 asm volatile("maskmovdqu %1, %0" :
2484 : "x" (a.dq), "x" (b.dq), "D" (&r)
2486 printf("%-9s: r=" FMT64X "" FMT64X " a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X "\n",
2493 asm volatile ("emms");
2495 SSE_OP2(punpcklqdq);
2496 SSE_OP2(punpckhqdq);
2511 SHUF_OP(shufps, 0x78);
2512 SHUF_OP(shufpd, 0x02);
2514 PSHUF_OP(pshufd, 0x78);
2515 PSHUF_OP(pshuflw, 0x78);
2516 PSHUF_OP(pshufhw, 0x78);
2519 SHIFT_OP(psrlw, 16);
2521 SHIFT_OP(psraw, 16);
2523 SHIFT_OP(psllw, 16);
2526 SHIFT_OP(psrld, 32);
2528 SHIFT_OP(psrad, 32);
2530 SHIFT_OP(pslld, 32);
2533 SHIFT_OP(psrlq, 32);
2535 SHIFT_OP(psllq, 32);
2537 SHIFT_IM(psrldq, 16);
2538 SHIFT_IM(psrldq, 7);
2539 SHIFT_IM(pslldq, 16);
2540 SHIFT_IM(pslldq, 7);
2545 /* FPU specific ops */
2549 asm volatile("stmxcsr %0" : "=m" (mxcsr));
2550 printf("mxcsr=%08x\n", mxcsr & 0x1f80);
2551 asm volatile("ldmxcsr %0" : : "m" (mxcsr));
2554 test_sse_comi(2, -1);
2555 test_sse_comi(2, 2);
2556 test_sse_comi(2, 3);
2557 test_sse_comi(2, q_nan.d);
2558 test_sse_comi(q_nan.d, -1);
2560 for(i = 0; i < 2; i++) {
2616 /* float to float/int */
2621 CVT_OP_XMM(cvtps2pd);
2622 CVT_OP_XMM(cvtss2sd);
2623 CVT_OP_XMM2MMX(cvtps2pi);
2624 CVT_OP_XMM2MMX(cvttps2pi);
2625 CVT_OP_XMM2REG(cvtss2si);
2626 CVT_OP_XMM2REG(cvttss2si);
2627 CVT_OP_XMM(cvtps2dq);
2628 CVT_OP_XMM(cvttps2dq);
2632 CVT_OP_XMM(cvtpd2ps);
2633 CVT_OP_XMM(cvtsd2ss);
2634 CVT_OP_XMM2MMX(cvtpd2pi);
2635 CVT_OP_XMM2MMX(cvttpd2pi);
2636 CVT_OP_XMM2REG(cvtsd2si);
2637 CVT_OP_XMM2REG(cvttsd2si);
2638 CVT_OP_XMM(cvtpd2dq);
2639 CVT_OP_XMM(cvttpd2dq);
2642 CVT_OP_XMM2MMX(movdq2q);
2643 CVT_OP_MMX2XMM(movq2dq);
2650 CVT_OP_MMX2XMM(cvtpi2ps);
2651 CVT_OP_MMX2XMM(cvtpi2pd);
2652 CVT_OP_REG2XMM(cvtsi2ss);
2653 CVT_OP_REG2XMM(cvtsi2sd);
2654 CVT_OP_XMM(cvtdq2ps);
2655 CVT_OP_XMM(cvtdq2pd);
2657 /* XXX: test PNI insns */
2661 asm volatile ("emms");
2666 #define TEST_CONV_RAX(op)\
2668 unsigned long a, r;\
2669 a = i2l(0x8234a6f8);\
2671 asm volatile(#op : "=a" (r) : "0" (r));\
2672 printf("%-10s A=" FMTLX " R=" FMTLX "\n", #op, a, r);\
2675 #define TEST_CONV_RAX_RDX(op)\
2677 unsigned long a, d, r, rh; \
2678 a = i2l(0x8234a6f8);\
2679 d = i2l(0x8345a1f2);\
2682 asm volatile(#op : "=a" (r), "=d" (rh) : "0" (r), "1" (rh)); \
2683 printf("%-10s A=" FMTLX " R=" FMTLX ":" FMTLX "\n", #op, a, r, rh); \
2686 void test_conv(void)
2689 TEST_CONV_RAX(cwde);
2690 #if defined(__x86_64__)
2691 TEST_CONV_RAX(cdqe);
2694 TEST_CONV_RAX_RDX(cwd);
2695 TEST_CONV_RAX_RDX(cdq);
2696 #if defined(__x86_64__)
2697 TEST_CONV_RAX_RDX(cqo);
2702 a = i2l(0x12345678);
2703 asm volatile("bswapl %k0" : "=r" (r) : "0" (a));
2704 printf("%-10s: A=" FMTLX " R=" FMTLX "\n", "bswapl", a, r);
2706 #if defined(__x86_64__)
2709 a = i2l(0x12345678);
2710 asm volatile("bswapq %0" : "=r" (r) : "0" (a));
2711 printf("%-10s: A=" FMTLX " R=" FMTLX "\n", "bswapq", a, r);
2716 extern void *__start_initcall;
2717 extern void *__stop_initcall;
2720 int main(int argc, char **argv)
2725 ptr = &__start_initcall;
2726 while (ptr != &__stop_initcall) {
2735 #if !defined(__x86_64__)
2749 #if !defined(__x86_64__)
2751 test_self_modifying_code();