- gen_load_ir(ctx, rb, 0);
- gen_set_sT1(ctx, disp12);
- gen_op_addq();
- switch ((insn >> 12) & 0xF) {
- case 0x0:
- /* Longword physical access */
- gen_op_ldl_raw();
- break;
- case 0x1:
- /* Quadword physical access */
- gen_op_ldq_raw();
- break;
- case 0x2:
- /* Longword physical access with lock */
- gen_op_ldl_l_raw();
- break;
- case 0x3:
- /* Quadword physical access with lock */
- gen_op_ldq_l_raw();
- break;
- case 0x4:
- /* Longword virtual PTE fetch */
- gen_op_ldl_kernel();
- break;
- case 0x5:
- /* Quadword virtual PTE fetch */
- gen_op_ldq_kernel();
- break;
- case 0x6:
- /* Invalid */
- goto invalid_opc;
- case 0x7:
- /* Invalid */
- goto invalid_opc;
- case 0x8:
- /* Longword virtual access */
- gen_op_ld_phys_to_virt();
- gen_op_ldl_raw();
- break;
- case 0x9:
- /* Quadword virtual access */
- gen_op_ld_phys_to_virt();
- gen_op_ldq_raw();
- break;
- case 0xA:
- /* Longword virtual access with protection check */
- gen_ldl(ctx);
- break;
- case 0xB:
- /* Quadword virtual access with protection check */
- gen_ldq(ctx);
- break;
- case 0xC:
- /* Longword virtual access with altenate access mode */
- gen_op_set_alt_mode();
- gen_op_ld_phys_to_virt();
- gen_op_ldl_raw();
- gen_op_restore_mode();
- break;
- case 0xD:
- /* Quadword virtual access with altenate access mode */
- gen_op_set_alt_mode();
- gen_op_ld_phys_to_virt();
- gen_op_ldq_raw();
- gen_op_restore_mode();
- break;
- case 0xE:
- /* Longword virtual access with alternate access mode and
- * protection checks
- */
- gen_op_set_alt_mode();
- gen_op_ldl_data();
- gen_op_restore_mode();
- break;
- case 0xF:
- /* Quadword virtual access with alternate access mode and
- * protection checks
- */
- gen_op_set_alt_mode();
- gen_op_ldq_data();
- gen_op_restore_mode();
- break;
+ if (ra != 31) {
+ TCGv addr = tcg_temp_new();
+ if (rb != 31)
+ tcg_gen_addi_i64(addr, cpu_ir[rb], disp12);
+ else
+ tcg_gen_movi_i64(addr, disp12);
+ switch ((insn >> 12) & 0xF) {
+ case 0x0:
+ /* Longword physical access */
+ gen_helper_ldl_raw(cpu_ir[ra], addr);
+ break;
+ case 0x1:
+ /* Quadword physical access */
+ gen_helper_ldq_raw(cpu_ir[ra], addr);
+ break;
+ case 0x2:
+ /* Longword physical access with lock */
+ gen_helper_ldl_l_raw(cpu_ir[ra], addr);
+ break;
+ case 0x3:
+ /* Quadword physical access with lock */
+ gen_helper_ldq_l_raw(cpu_ir[ra], addr);
+ break;
+ case 0x4:
+ /* Longword virtual PTE fetch */
+ gen_helper_ldl_kernel(cpu_ir[ra], addr);
+ break;
+ case 0x5:
+ /* Quadword virtual PTE fetch */
+ gen_helper_ldq_kernel(cpu_ir[ra], addr);
+ break;
+ case 0x6:
+ /* Incpu_ir[ra]id */
+ goto incpu_ir[ra]id_opc;
+ case 0x7:
+ /* Incpu_ir[ra]id */
+ goto incpu_ir[ra]id_opc;
+ case 0x8:
+ /* Longword virtual access */
+ gen_helper_st_virt_to_phys(addr, addr);
+ gen_helper_ldl_raw(cpu_ir[ra], addr);
+ break;
+ case 0x9:
+ /* Quadword virtual access */
+ gen_helper_st_virt_to_phys(addr, addr);
+ gen_helper_ldq_raw(cpu_ir[ra], addr);
+ break;
+ case 0xA:
+ /* Longword virtual access with protection check */
+ tcg_gen_qemu_ld32s(cpu_ir[ra], addr, ctx->flags);
+ break;
+ case 0xB:
+ /* Quadword virtual access with protection check */
+ tcg_gen_qemu_ld64(cpu_ir[ra], addr, ctx->flags);
+ break;
+ case 0xC:
+ /* Longword virtual access with altenate access mode */
+ gen_helper_set_alt_mode();
+ gen_helper_st_virt_to_phys(addr, addr);
+ gen_helper_ldl_raw(cpu_ir[ra], addr);
+ gen_helper_restore_mode();
+ break;
+ case 0xD:
+ /* Quadword virtual access with altenate access mode */
+ gen_helper_set_alt_mode();
+ gen_helper_st_virt_to_phys(addr, addr);
+ gen_helper_ldq_raw(cpu_ir[ra], addr);
+ gen_helper_restore_mode();
+ break;
+ case 0xE:
+ /* Longword virtual access with alternate access mode and
+ * protection checks
+ */
+ gen_helper_set_alt_mode();
+ gen_helper_ldl_data(cpu_ir[ra], addr);
+ gen_helper_restore_mode();
+ break;
+ case 0xF:
+ /* Quadword virtual access with alternate access mode and
+ * protection checks
+ */
+ gen_helper_set_alt_mode();
+ gen_helper_ldq_data(cpu_ir[ra], addr);
+ gen_helper_restore_mode();
+ break;
+ }
+ tcg_temp_free(addr);