extern target_ulong gen_opc_npc[OPC_BUF_SIZE];
extern uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
extern uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
+extern target_ulong gen_opc_jump_pc[2];
typedef void (GenOpFunc)(void);
typedef void (GenOpFunc1)(long);
#if defined(__alpha__)
#define CODE_GEN_BUFFER_SIZE (2 * 1024 * 1024)
+#elif defined(__ia64)
+#define CODE_GEN_BUFFER_SIZE (4 * 1024 * 1024) /* range of addl */
#elif defined(__powerpc__)
#define CODE_GEN_BUFFER_SIZE (6 * 1024 * 1024)
#else
#elif defined(__APPLE__)
#define ASM_DATA_SECTION ".data\n"
#define ASM_PREVIOUS_SECTION ".text\n"
-#define ASM_NAME(x) "_" #x
#else
#define ASM_DATA_SECTION ".section \".data\"\n"
#define ASM_PREVIOUS_SECTION ".previous\n"
-#define ASM_NAME(x) stringify(x)
#endif
#if defined(__powerpc__)
#ifdef __i386__
static inline int testandset (int *p)
{
- char ret;
- long int readval;
+ long int readval = 0;
- __asm__ __volatile__ ("lock; cmpxchgl %3, %1; sete %0"
- : "=q" (ret), "=m" (*p), "=a" (readval)
- : "r" (1), "m" (*p), "a" (0)
- : "memory");
- return ret;
+ __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
+ : "+m" (*p), "+a" (readval)
+ : "r" (1)
+ : "cc");
+ return readval;
}
#endif
#ifdef __x86_64__
static inline int testandset (int *p)
{
- char ret;
- int readval;
+ long int readval = 0;
- __asm__ __volatile__ ("lock; cmpxchgl %3, %1; sete %0"
- : "=q" (ret), "=m" (*p), "=a" (readval)
- : "r" (1), "m" (*p), "a" (0)
- : "memory");
- return ret;
+ __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
+ : "+m" (*p), "+a" (readval)
+ : "r" (1)
+ : "cc");
+ return readval;
}
#endif
: "=r" (ret)
: "m" (p)
: "cc","memory");
- return ret == 0;
+ return ret;
+}
+#endif
+
+#ifdef __ia64
+#include <ia64intrin.h>
+
+static inline int testandset (int *p)
+{
+ return __sync_lock_test_and_set (p, 1);
}
#endif
return addr + env->tlb_read[is_user][index].addend - (unsigned long)phys_ram_base;
}
#endif
+
+
+#ifdef USE_KQEMU
+extern int kqemu_fd;
+extern int kqemu_flushed;
+
+int kqemu_init(CPUState *env);
+int kqemu_cpu_exec(CPUState *env);
+void kqemu_flush_page(CPUState *env, target_ulong addr);
+void kqemu_flush(CPUState *env, int global);
+
+static inline int kqemu_is_ok(CPUState *env)
+{
+ return(env->kqemu_enabled &&
+ (env->hflags & HF_CPL_MASK) == 3 &&
+ (env->eflags & IOPL_MASK) != IOPL_MASK &&
+ (env->cr[0] & CR0_PE_MASK) &&
+ (env->eflags & IF_MASK) &&
+ !(env->eflags & VM_MASK));
+}
+
+#endif