Revert "Fix Sparc/Linux host breakage by df70204db53e3611af986f434e74a882bce190ca"

[qemu] / gen-icount.h

diff --git a/gen-icount.h b/gen-icount.h
index 172b2bc..d4524d6 100644 (file)
--- a/gen-icount.h
+++ b/gen-icount.h
@@ -1,11 +1,11 @@
-/* Helpewrs for instruction counting code genration.  */
+/* Helpers for instruction counting code generation.  */
 
 static TCGArg *icount_arg;
 static int icount_label;
 
 static inline void gen_icount_start(void)
 {
-    TCGv count;
+    TCGv_i32 count;
 
     if (!use_icount)
         return;
@@ -15,7 +15,7 @@ static inline void gen_icount_start(void)
        count needs to live over the conditional branch.  To workaround this
        we allow the target to supply a convenient register temporary.  */
 #ifndef ICOUNT_TEMP
-    count = tcg_temp_local_new(TCG_TYPE_I32);
+    count = tcg_temp_local_new_i32();
 #else
     count = ICOUNT_TEMP;
 #endif
@@ -27,7 +27,7 @@ static inline void gen_icount_start(void)
     tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, icount_label);
     tcg_gen_st16_i32(count, cpu_env, offsetof(CPUState, icount_decr.u16.low));
 #ifndef ICOUNT_TEMP
-    tcg_temp_free(count);
+    tcg_temp_free_i32(count);
 #endif
 }
 
@@ -42,15 +42,14 @@ static void gen_icount_end(TranslationBlock *tb, int num_insns)
 
 static void inline gen_io_start(void)
 {
-    TCGv tmp = tcg_const_i32(1);
+    TCGv_i32 tmp = tcg_const_i32(1);
     tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUState, can_do_io));
-    tcg_temp_free(tmp);
+    tcg_temp_free_i32(tmp);
 }
 
 static inline void gen_io_end(void)
 {
-    TCGv tmp = tcg_const_i32(0);
+    TCGv_i32 tmp = tcg_const_i32(0);
     tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUState, can_do_io));
-    tcg_temp_free(tmp);
+    tcg_temp_free_i32(tmp);
 }
-