pci_conf[0x08] = 0x03; // revision number
pci_conf[0x09] = 0x00;
pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER);
- pci_conf[0x0e] = 0x00; // header_type
+ pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
pci_conf[0x3d] = 0x01; // interrupt pin 1
pci_conf[0x40] = 0x01; /* PM io base read only bit */
register_savevm("piix4_pm", 0, 1, pm_save, pm_load, s);
- s->smbus = i2c_init_bus();
+ s->smbus = i2c_init_bus(NULL, "i2c");
s->irq = sci_irq;
- qemu_register_reset(piix4_reset, s);
+ qemu_register_reset(piix4_reset, 0, s);
return s->smbus;
}