qdev scsi bus infrastructure

[qemu] / hw / arm_sysctl.c

diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c
index 90ea76e..62222a1 100644 (file)
--- a/hw/arm_sysctl.c
+++ b/hw/arm_sysctl.c
@@ -1,19 +1,19 @@
-/* 
+/*
  * Status and system control registers for ARM RealView/Versatile boards.
  *
- * Copyright (c) 2006 CodeSourcery.
+ * Copyright (c) 2006-2007 CodeSourcery.
  * Written by Paul Brook
  *
  * This code is licenced under the GPL.
  */
 
-#include "vl.h"
-#include "arm_pic.h"
+#include "hw.h"
+#include "primecell.h"
+#include "sysemu.h"
 
 #define LOCK_VALUE 0xa05f
 
 typedef struct {
-    uint32_t base;
     uint32_t sys_id;
     uint32_t leds;
     uint16_t lockval;
@@ -28,7 +28,6 @@ static uint32_t arm_sysctl_read(void *opaque, target_phys_addr_t offset)
 {
     arm_sysctl_state *s = (arm_sysctl_state *)opaque;
 
-    offset -= s->base;
     switch (offset) {
     case 0x00: /* ID */
         return s->sys_id;
@@ -107,7 +106,6 @@ static void arm_sysctl_write(void *opaque, target_phys_addr_t offset,
                           uint32_t val)
 {
     arm_sysctl_state *s = (arm_sysctl_state *)opaque;
-    offset -= s->base;
 
     switch (offset) {
     case 0x08: /* LED */
@@ -196,13 +194,12 @@ void arm_sysctl_init(uint32_t base, uint32_t sys_id)
     int iomemtype;
 
     s = (arm_sysctl_state *)qemu_mallocz(sizeof(arm_sysctl_state));
-    if (!s)
-        return;
-    s->base = base;
     s->sys_id = sys_id;
+    /* The MPcore bootloader uses these flags to start secondary CPUs.
+       We don't use a bootloader, so do this here.  */
+    s->flags = 3;
     iomemtype = cpu_register_io_memory(0, arm_sysctl_readfn,
                                        arm_sysctl_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
     /* ??? Save/restore.  */
 }
-