vmstate: Add pre/post_save() hooks

[qemu] / hw / arm_sysctl.c

diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c
index 468a494..686c1cc 100644 (file)
--- a/hw/arm_sysctl.c
+++ b/hw/arm_sysctl.c
@@ -1,19 +1,20 @@
 /*
  * Status and system control registers for ARM RealView/Versatile boards.
  *
- * Copyright (c) 2006 CodeSourcery.
+ * Copyright (c) 2006-2007 CodeSourcery.
  * Written by Paul Brook
  *
  * This code is licenced under the GPL.
  */
 
-#include "vl.h"
-#include "arm_pic.h"
+#include "sysbus.h"
+#include "primecell.h"
+#include "sysemu.h"
 
 #define LOCK_VALUE 0xa05f
 
 typedef struct {
-    uint32_t base;
+    SysBusDevice busdev;
     uint32_t sys_id;
     uint32_t leds;
     uint16_t lockval;
@@ -28,7 +29,6 @@ static uint32_t arm_sysctl_read(void *opaque, target_phys_addr_t offset)
 {
     arm_sysctl_state *s = (arm_sysctl_state *)opaque;
 
-    offset -= s->base;
     switch (offset) {
     case 0x00: /* ID */
         return s->sys_id;
@@ -107,7 +107,6 @@ static void arm_sysctl_write(void *opaque, target_phys_addr_t offset,
                           uint32_t val)
 {
     arm_sysctl_state *s = (arm_sysctl_state *)opaque;
-    offset -= s->base;
 
     switch (offset) {
     case 0x08: /* LED */
@@ -178,31 +177,57 @@ static void arm_sysctl_write(void *opaque, target_phys_addr_t offset,
     }
 }
 
-static CPUReadMemoryFunc *arm_sysctl_readfn[] = {
+static CPUReadMemoryFunc * const arm_sysctl_readfn[] = {
    arm_sysctl_read,
    arm_sysctl_read,
    arm_sysctl_read
 };
 
-static CPUWriteMemoryFunc *arm_sysctl_writefn[] = {
+static CPUWriteMemoryFunc * const arm_sysctl_writefn[] = {
    arm_sysctl_write,
    arm_sysctl_write,
    arm_sysctl_write
 };
 
-void arm_sysctl_init(uint32_t base, uint32_t sys_id)
+static int arm_sysctl_init1(SysBusDevice *dev)
 {
-    arm_sysctl_state *s;
+    arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, dev);
     int iomemtype;
 
-    s = (arm_sysctl_state *)qemu_mallocz(sizeof(arm_sysctl_state));
-    if (!s)
-        return;
-    s->base = base;
-    s->sys_id = sys_id;
-    iomemtype = cpu_register_io_memory(0, arm_sysctl_readfn,
+    /* The MPcore bootloader uses these flags to start secondary CPUs.
+       We don't use a bootloader, so do this here.  */
+    s->flags = 3;
+    iomemtype = cpu_register_io_memory(arm_sysctl_readfn,
                                        arm_sysctl_writefn, s);
-    cpu_register_physical_memory(base, 0x00001000, iomemtype);
+    sysbus_init_mmio(dev, 0x1000, iomemtype);
     /* ??? Save/restore.  */
+    return 0;
+}
+
+/* Legacy helper function.  */
+void arm_sysctl_init(uint32_t base, uint32_t sys_id)
+{
+    DeviceState *dev;
+
+    dev = qdev_create(NULL, "realview_sysctl");
+    qdev_prop_set_uint32(dev, "sys_id", sys_id);
+    qdev_init(dev);
+    sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
+}
+
+static SysBusDeviceInfo arm_sysctl_info = {
+    .init = arm_sysctl_init1,
+    .qdev.name  = "realview_sysctl",
+    .qdev.size  = sizeof(arm_sysctl_state),
+    .qdev.props = (Property[]) {
+        DEFINE_PROP_UINT32("sys_id", arm_sysctl_state, sys_id, 0),
+        DEFINE_PROP_END_OF_LIST(),
+    }
+};
+
+static void arm_sysctl_register_devices(void)
+{
+    sysbus_register_withprop(&arm_sysctl_info);
 }
 
+device_init(arm_sysctl_register_devices)