vmstate: Add pre/post_save() hooks
[qemu] / hw / armv7m.c
index 2e66d7e..059a356 100644 (file)
@@ -105,13 +105,13 @@ static void bitband_writel(void *opaque, target_phys_addr_t offset,
     cpu_physical_memory_write(addr, (uint8_t *)&v, 4);
 }
 
-static CPUReadMemoryFunc *bitband_readfn[] = {
+static CPUReadMemoryFunc * const bitband_readfn[] = {
    bitband_readb,
    bitband_readw,
    bitband_readl
 };
 
-static CPUWriteMemoryFunc *bitband_writefn[] = {
+static CPUWriteMemoryFunc * const bitband_writefn[] = {
    bitband_writeb,
    bitband_writew,
    bitband_writel
@@ -122,7 +122,7 @@ typedef struct {
     uint32_t base;
 } BitBandState;
 
-static void bitband_init(SysBusDevice *dev)
+static int bitband_init(SysBusDevice *dev)
 {
     BitBandState *s = FROM_SYSBUS(BitBandState, dev);
     int iomemtype;
@@ -130,6 +130,7 @@ static void bitband_init(SysBusDevice *dev)
     iomemtype = cpu_register_io_memory(bitband_readfn, bitband_writefn,
                                        &s->base);
     sysbus_init_mmio(dev, 0x02000000, iomemtype);
+    return 0;
 }
 
 static void armv7m_bitband_init(void)
@@ -242,12 +243,8 @@ static SysBusDeviceInfo bitband_info = {
     .qdev.name  = "ARM,bitband-memory",
     .qdev.size  = sizeof(BitBandState),
     .qdev.props = (Property[]) {
-        {
-            .name   = "base",
-            .info   = &qdev_prop_hex32,
-            .offset = offsetof(BitBandState, base),
-        },
-        {/* end of list */}
+        DEFINE_PROP_UINT32("base", BitBandState, base, 0),
+        DEFINE_PROP_END_OF_LIST(),
     }
 };