Install keymaps from new location

[qemu] / hw / cs4231.c

diff --git a/hw/cs4231.c b/hw/cs4231.c
index 6df881d..a5ba221 100644 (file)
--- a/hw/cs4231.c
+++ b/hw/cs4231.c
@@ -21,7 +21,8 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  */
-#include "vl.h"
+#include "hw.h"
+#include "sun4m.h"
 
 /* debug CS4231 */
 //#define DEBUG_CS
@@ -29,7 +30,7 @@
 /*
  * In addition to Crystal CS4231 there is a DMA controller on Sparc.
  */
-#define CS_MAXADDR 0x3f
+#define CS_SIZE 0x40
 #define CS_REGS 16
 #define CS_DREGS 32
 #define CS_MAXDREG (CS_DREGS - 1)
@@ -45,10 +46,10 @@ typedef struct CSState {
 #define CS_CDC_VER 0x8a
 
 #ifdef DEBUG_CS
-#define DPRINTF(fmt, args...)                           \
-    do { printf("CS: " fmt , ##args); } while (0)
+#define DPRINTF(fmt, ...)                                       \
+    do { printf("CS: " fmt , ## __VA_ARGS__); } while (0)
 #else
-#define DPRINTF(fmt, args...)
+#define DPRINTF(fmt, ...)
 #endif
 
 static void cs_reset(void *opaque)
@@ -66,7 +67,7 @@ static uint32_t cs_mem_readl(void *opaque, target_phys_addr_t addr)
     CSState *s = opaque;
     uint32_t saddr, ret;
 
-    saddr = (addr & CS_MAXADDR) >> 2;
+    saddr = addr >> 2;
     switch (saddr) {
     case 1:
         switch (CS_RAP(s)) {
@@ -78,11 +79,11 @@ static uint32_t cs_mem_readl(void *opaque, target_phys_addr_t addr)
             break;
         }
         DPRINTF("read dreg[%d]: 0x%8.8x\n", CS_RAP(s), ret);
-       break;
+        break;
     default:
         ret = s->regs[saddr];
         DPRINTF("read reg[%d]: 0x%8.8x\n", saddr, ret);
-       break;
+        break;
     }
     return ret;
 }
@@ -92,11 +93,12 @@ static void cs_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
     CSState *s = opaque;
     uint32_t saddr;
 
-    saddr = (addr & CS_MAXADDR) >> 2;
+    saddr = addr >> 2;
     DPRINTF("write reg[%d]: 0x%8.8x -> 0x%8.8x\n", saddr, s->regs[saddr], val);
     switch (saddr) {
     case 1:
-        DPRINTF("write dreg[%d]: 0x%2.2x -> 0x%2.2x\n", CS_RAP(s), s->dregs[CS_RAP(s)], val);
+        DPRINTF("write dreg[%d]: 0x%2.2x -> 0x%2.2x\n", CS_RAP(s),
+                s->dregs[CS_RAP(s)], val);
         switch(CS_RAP(s)) {
         case 11:
         case 25: // Read only
@@ -121,7 +123,7 @@ static void cs_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
         break;
     default:
         s->regs[saddr] = val;
-       break;
+        break;
     }
 }
 
@@ -169,12 +171,10 @@ void cs_init(target_phys_addr_t base, int irq, void *intctl)
     CSState *s;
 
     s = qemu_mallocz(sizeof(CSState));
-    if (!s)
-        return;
 
     cs_io_memory = cpu_register_io_memory(0, cs_mem_read, cs_mem_write, s);
-    cpu_register_physical_memory(base, CS_MAXADDR, cs_io_memory);
+    cpu_register_physical_memory(base, CS_SIZE, cs_io_memory);
     register_savevm("cs4231", base, 1, cs_save, cs_load, s);
-    qemu_register_reset(cs_reset, s);
+    qemu_register_reset(cs_reset, 0, s);
     cs_reset(s);
 }