-/*\r
- * QEMU NVRAM emulation for DS1225Y chip\r
- * \r
- * Copyright (c) 2007 Hervé Poussineau\r
- * \r
- * Permission is hereby granted, free of charge, to any person obtaining a copy\r
- * of this software and associated documentation files (the "Software"), to deal\r
- * in the Software without restriction, including without limitation the rights\r
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell\r
- * copies of the Software, and to permit persons to whom the Software is\r
- * furnished to do so, subject to the following conditions:\r
- *\r
- * The above copyright notice and this permission notice shall be included in\r
- * all copies or substantial portions of the Software.\r
- *\r
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\r
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\r
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\r
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,\r
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN\r
- * THE SOFTWARE.\r
- */\r
-\r
-#include "vl.h"\r
-\r
-typedef enum\r
-{\r
- none = 0,\r
- readmode,\r
- writemode,\r
-} nvram_open_mode;\r
-\r
-struct ds1225y_t\r
-{\r
- target_ulong mem_base;\r
- uint32_t capacity;\r
- const char *filename;\r
- QEMUFile *file;\r
- nvram_open_mode open_mode;\r
-};\r
-\r
-static int ds1225y_set_to_mode(ds1225y_t *NVRAM, nvram_open_mode mode, const char *filemode)\r
-{\r
- if (NVRAM->open_mode != mode)\r
- {\r
- if (NVRAM->file)\r
- qemu_fclose(NVRAM->file);\r
- NVRAM->file = qemu_fopen(NVRAM->filename, filemode);\r
- NVRAM->open_mode = mode;\r
- }\r
- return (NVRAM->file != NULL);\r
-}\r
-\r
-static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)\r
-{\r
- ds1225y_t *NVRAM = opaque;\r
- int64_t pos;\r
-\r
- pos = addr - NVRAM->mem_base;\r
- if (addr >= NVRAM->capacity)\r
- addr -= NVRAM->capacity;\r
-\r
- if (!ds1225y_set_to_mode(NVRAM, readmode, "rb"))\r
- return 0;\r
- qemu_fseek(NVRAM->file, pos, SEEK_SET);\r
- return (uint32_t)qemu_get_byte(NVRAM->file);\r
-}\r
-\r
-static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)\r
-{\r
- ds1225y_t *NVRAM = opaque;\r
- int64_t pos;\r
-\r
- pos = addr - NVRAM->mem_base;\r
- if (ds1225y_set_to_mode(NVRAM, writemode, "wb"))\r
- {\r
- qemu_fseek(NVRAM->file, pos, SEEK_SET);\r
- qemu_put_byte(NVRAM->file, (int)value);\r
- }\r
-}\r
-\r
-static CPUReadMemoryFunc *nvram_read[] = {\r
- &nvram_readb,\r
- NULL,\r
- NULL,\r
-};\r
-\r
-static CPUWriteMemoryFunc *nvram_write[] = {\r
- &nvram_writeb,\r
- NULL,\r
- NULL,\r
-};\r
-\r
-static CPUWriteMemoryFunc *nvram_none[] = {\r
- NULL,\r
- NULL,\r
- NULL,\r
-};\r
-\r
-/* Initialisation routine */\r
-ds1225y_t *ds1225y_init(target_ulong mem_base, const char *filename)\r
-{\r
- ds1225y_t *s;\r
- int mem_index1, mem_index2;\r
-\r
- s = qemu_mallocz(sizeof(ds1225y_t));\r
- if (!s)\r
- return NULL;\r
- s->mem_base = mem_base;\r
- s->capacity = 0x2000; /* Fixed for ds1225y chip: 8K */\r
- s->filename = filename;\r
-\r
- /* Read/write memory */\r
- mem_index1 = cpu_register_io_memory(0, nvram_read, nvram_write, s);\r
- cpu_register_physical_memory(mem_base, s->capacity, mem_index1);\r
- /* Read-only memory */\r
- mem_index2 = cpu_register_io_memory(0, nvram_read, nvram_none, s);\r
- cpu_register_physical_memory(mem_base + s->capacity, s->capacity, mem_index2);\r
- return s;\r
-}\r
+/*
+ * QEMU NVRAM emulation for DS1225Y chip
+ *
+ * Copyright (c) 2007-2008 Hervé Poussineau
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "hw.h"
+#include "mips.h"
+#include "nvram.h"
+
+//#define DEBUG_NVRAM
+
+typedef struct ds1225y_t
+{
+ uint32_t chip_size;
+ QEMUFile *file;
+ uint8_t *contents;
+ uint8_t protection;
+} ds1225y_t;
+
+
+static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)
+{
+ ds1225y_t *s = opaque;
+ uint32_t val;
+
+ val = s->contents[addr];
+
+#ifdef DEBUG_NVRAM
+ printf("nvram: read 0x%x at " TARGET_FMT_lx "\n", val, addr);
+#endif
+ return val;
+}
+
+static uint32_t nvram_readw (void *opaque, target_phys_addr_t addr)
+{
+ uint32_t v;
+ v = nvram_readb(opaque, addr);
+ v |= nvram_readb(opaque, addr + 1) << 8;
+ return v;
+}
+
+static uint32_t nvram_readl (void *opaque, target_phys_addr_t addr)
+{
+ uint32_t v;
+ v = nvram_readb(opaque, addr);
+ v |= nvram_readb(opaque, addr + 1) << 8;
+ v |= nvram_readb(opaque, addr + 2) << 16;
+ v |= nvram_readb(opaque, addr + 3) << 24;
+ return v;
+}
+
+static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+ ds1225y_t *s = opaque;
+
+#ifdef DEBUG_NVRAM
+ printf("nvram: write 0x%x at " TARGET_FMT_lx "\n", val, addr);
+#endif
+
+ s->contents[addr] = val & 0xff;
+ if (s->file) {
+ qemu_fseek(s->file, addr, SEEK_SET);
+ qemu_put_byte(s->file, (int)val);
+ qemu_fflush(s->file);
+ }
+}
+
+static void nvram_writew (void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+ nvram_writeb(opaque, addr, val & 0xff);
+ nvram_writeb(opaque, addr + 1, (val >> 8) & 0xff);
+}
+
+static void nvram_writel (void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+ nvram_writeb(opaque, addr, val & 0xff);
+ nvram_writeb(opaque, addr + 1, (val >> 8) & 0xff);
+ nvram_writeb(opaque, addr + 2, (val >> 16) & 0xff);
+ nvram_writeb(opaque, addr + 3, (val >> 24) & 0xff);
+}
+
+static void nvram_writeb_protected (void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+ ds1225y_t *s = opaque;
+
+ if (s->protection != 7) {
+#ifdef DEBUG_NVRAM
+ printf("nvram: prevent write of 0x%x at " TARGET_FMT_lx "\n", val, addr);
+#endif
+ return;
+ }
+
+ nvram_writeb(opaque, addr, val);
+}
+
+static void nvram_writew_protected (void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+ nvram_writeb_protected(opaque, addr, val & 0xff);
+ nvram_writeb_protected(opaque, addr + 1, (val >> 8) & 0xff);
+}
+
+static void nvram_writel_protected (void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+ nvram_writeb_protected(opaque, addr, val & 0xff);
+ nvram_writeb_protected(opaque, addr + 1, (val >> 8) & 0xff);
+ nvram_writeb_protected(opaque, addr + 2, (val >> 16) & 0xff);
+ nvram_writeb_protected(opaque, addr + 3, (val >> 24) & 0xff);
+}
+
+static CPUReadMemoryFunc *nvram_read[] = {
+ &nvram_readb,
+ &nvram_readw,
+ &nvram_readl,
+};
+
+static CPUWriteMemoryFunc *nvram_write[] = {
+ &nvram_writeb,
+ &nvram_writew,
+ &nvram_writel,
+};
+
+static CPUWriteMemoryFunc *nvram_write_protected[] = {
+ &nvram_writeb_protected,
+ &nvram_writew_protected,
+ &nvram_writel_protected,
+};
+
+/* Initialisation routine */
+void *ds1225y_init(target_phys_addr_t mem_base, const char *filename)
+{
+ ds1225y_t *s;
+ int mem_indexRW, mem_indexRP;
+ QEMUFile *file;
+
+ s = qemu_mallocz(sizeof(ds1225y_t));
+ s->chip_size = 0x2000; /* Fixed for ds1225y chip: 8 KiB */
+ s->contents = qemu_mallocz(s->chip_size);
+ s->protection = 7;
+
+ /* Read current file */
+ file = qemu_fopen(filename, "rb");
+ if (file) {
+ /* Read nvram contents */
+ qemu_get_buffer(file, s->contents, s->chip_size);
+ qemu_fclose(file);
+ }
+ s->file = qemu_fopen(filename, "wb");
+ if (s->file) {
+ /* Write back contents, as 'wb' mode cleaned the file */
+ qemu_put_buffer(s->file, s->contents, s->chip_size);
+ qemu_fflush(s->file);
+ }
+
+ /* Read/write memory */
+ mem_indexRW = cpu_register_io_memory(0, nvram_read, nvram_write, s);
+ cpu_register_physical_memory(mem_base, s->chip_size, mem_indexRW);
+ /* Read/write protected memory */
+ mem_indexRP = cpu_register_io_memory(0, nvram_read, nvram_write_protected, s);
+ cpu_register_physical_memory(mem_base + s->chip_size, s->chip_size, mem_indexRP);
+ return s;
+}
projects / qemu / blobdiff