* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "hw.h"
}
}
-static void ioapic_save(QEMUFile *f, void *opaque)
-{
- IOAPICState *s = opaque;
- int i;
-
- qemu_put_8s(f, &s->id);
- qemu_put_8s(f, &s->ioregsel);
- for (i = 0; i < IOAPIC_NUM_PINS; i++) {
- qemu_put_be64s(f, &s->ioredtbl[i]);
- }
-}
-
-static int ioapic_load(QEMUFile *f, void *opaque, int version_id)
-{
- IOAPICState *s = opaque;
- int i;
-
- if (version_id != 1)
- return -EINVAL;
-
- qemu_get_8s(f, &s->id);
- qemu_get_8s(f, &s->ioregsel);
- for (i = 0; i < IOAPIC_NUM_PINS; i++) {
- qemu_get_be64s(f, &s->ioredtbl[i]);
+static const VMStateDescription vmstate_ioapic = {
+ .name = "ioapic",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .minimum_version_id_old = 1,
+ .fields = (VMStateField []) {
+ VMSTATE_UINT8(id, IOAPICState),
+ VMSTATE_UINT8(ioregsel, IOAPICState),
+ VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICState, IOAPIC_NUM_PINS),
+ VMSTATE_END_OF_LIST()
}
- return 0;
-}
+};
static void ioapic_reset(void *opaque)
{
s->ioredtbl[i] = 1 << 16; /* mask LVT */
}
-static CPUReadMemoryFunc *ioapic_mem_read[3] = {
+static CPUReadMemoryFunc * const ioapic_mem_read[3] = {
ioapic_mem_readl,
ioapic_mem_readl,
ioapic_mem_readl,
};
-static CPUWriteMemoryFunc *ioapic_mem_write[3] = {
+static CPUWriteMemoryFunc * const ioapic_mem_write[3] = {
ioapic_mem_writel,
ioapic_mem_writel,
ioapic_mem_writel,
};
-IOAPICState *ioapic_init(void)
+qemu_irq *ioapic_init(void)
{
IOAPICState *s;
+ qemu_irq *irq;
int io_memory;
s = qemu_mallocz(sizeof(IOAPICState));
ioapic_mem_write, s);
cpu_register_physical_memory(0xfec00000, 0x1000, io_memory);
- register_savevm("ioapic", 0, 1, ioapic_save, ioapic_load, s);
- qemu_register_reset(ioapic_reset, 0, s);
+ vmstate_register(0, &vmstate_ioapic, s);
+ qemu_register_reset(ioapic_reset, s);
+ irq = qemu_allocate_irqs(ioapic_set_irq, s, IOAPIC_NUM_PINS);
- return s;
+ return irq;
}