#include "audio/audio.h"
#include "boards.h"
#include "qemu-log.h"
+#include "mips-bios.h"
+#include "ide.h"
//#define DEBUG_BOARD_INIT
-#ifdef TARGET_WORDS_BIGENDIAN
-#define BIOS_FILENAME "mips_bios.bin"
-#else
-#define BIOS_FILENAME "mipsel_bios.bin"
-#endif
-
#ifdef TARGET_MIPS64
#define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffULL)
#else
//~ #define DEBUG
#if defined(DEBUG)
-# define logout(fmt, args...) fprintf(stderr, "MALTA\t%-24s" fmt, __func__, ##args)
+# define logout(fmt, ...) fprintf(stderr, "MALTA\t%-24s" fmt, __func__, ## __VA_ARGS__)
#else
-# define logout(fmt, args...) ((void)0)
+# define logout(fmt, ...) ((void)0)
#endif
struct _eeprom24c0x_t {
}
}
-static CPUReadMemoryFunc *malta_fpga_read[] = {
+static CPUReadMemoryFunc * const malta_fpga_read[] = {
malta_fpga_readl,
malta_fpga_readl,
malta_fpga_readl
};
-static CPUWriteMemoryFunc *malta_fpga_write[] = {
+static CPUWriteMemoryFunc * const malta_fpga_write[] = {
malta_fpga_writel,
malta_fpga_writel,
malta_fpga_writel
s = (MaltaFPGAState *)qemu_mallocz(sizeof(MaltaFPGAState));
- malta = cpu_register_io_memory(0, malta_fpga_read,
+ malta = cpu_register_io_memory(malta_fpga_read,
malta_fpga_write, s);
cpu_register_physical_memory(base, 0x900, malta);
}
if (audio_enabled) {
- AudioState *s;
-
- s = AUD_init ();
- if (s) {
- for (c = soundhw; c->name; ++c) {
- if (c->enabled)
- c->init.init_pci (pci_bus, s);
+ for (c = soundhw; c->name; ++c) {
+ if (c->enabled) {
+ c->init.init_pci(pci_bus);
}
}
}
#endif
/* Network support */
-static void network_init (PCIBus *pci_bus)
+static void network_init(void)
{
int i;
for(i = 0; i < nb_nics; i++) {
NICInfo *nd = &nd_table[i];
- int devfn = -1;
+ const char *default_devaddr = NULL;
if (i == 0 && (!nd->model || strcmp(nd->model, "pcnet") == 0))
/* The malta board has a PCNet card using PCI SLOT 11 */
- devfn = 88;
+ default_devaddr = "0b";
- pci_nic_init(pci_bus, nd, devfn, "pcnet");
+ pci_nic_init(nd, "pcnet", default_devaddr);
}
}
}
static
-void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
+void mips_malta_init (ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- char buf[1024];
+ char *filename;
ram_addr_t ram_offset;
ram_addr_t bios_offset;
target_long bios_size;
int64_t kernel_entry;
PCIBus *pci_bus;
+ ISADevice *isa_dev;
CPUState *env;
RTCState *rtc_state;
fdctrl_t *floppy_controller;
uint8_t *eeprom_buf;
i2c_bus *smbus;
int i;
- int index;
- BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
+ DriveInfo *dinfo;
+ DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
BlockDriverState *fd[MAX_FD];
int fl_idx = 0;
int fl_sectors = 0;
+ /* Make sure the first 3 serial ports are associated with a device. */
+ for(i = 0; i < 3; i++) {
+ if (!serial_hds[i]) {
+ char label[32];
+ snprintf(label, sizeof(label), "serial%d", i);
+ serial_hds[i] = qemu_chr_open(label, "null", NULL);
+ }
+ }
+
/* init CPUs */
if (cpu_model == NULL) {
#ifdef TARGET_MIPS64
env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
write_bootloader(env, qemu_get_ram_ptr(bios_offset), kernel_entry);
} else {
- index = drive_get_index(IF_PFLASH, 0, fl_idx);
- if (index != -1) {
+ dinfo = drive_get(IF_PFLASH, 0, fl_idx);
+ if (dinfo) {
/* Load firmware from flash. */
bios_size = 0x400000;
fl_sectors = bios_size >> 16;
printf("Register parallel flash %d size " TARGET_FMT_lx " at "
"offset %08lx addr %08llx '%s' %x\n",
fl_idx, bios_size, bios_offset, 0x1e000000LL,
- bdrv_get_device_name(drives_table[index].bdrv), fl_sectors);
+ bdrv_get_device_name(dinfo->bdrv), fl_sectors);
#endif
pflash_cfi01_register(0x1e000000LL, bios_offset,
- drives_table[index].bdrv, 65536, fl_sectors,
+ dinfo->bdrv, 65536, fl_sectors,
4, 0x0000, 0x0000, 0x0000, 0x0000);
fl_idx++;
} else {
/* Load a BIOS image. */
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
- snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
- bios_size = load_image_targphys(buf, 0x1fc00000LL, BIOS_SIZE);
+ filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
+ if (filename) {
+ bios_size = load_image_targphys(filename, 0x1fc00000LL,
+ BIOS_SIZE);
+ qemu_free(filename);
+ } else {
+ bios_size = -1;
+ }
if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
fprintf(stderr,
"qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n",
- buf);
+ bios_name);
exit(1);
}
}
}
for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
- index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
- if (index != -1)
- hd[i] = drives_table[index].bdrv;
- else
- hd[i] = NULL;
+ hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
}
piix4_devfn = piix4_init(pci_bus, 80);
- pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1, i8259);
+ isa_bus_irqs(i8259);
+ pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1);
usb_uhci_piix4_init(pci_bus, piix4_devfn + 2);
- smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, i8259[9]);
+ smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_reserve_irq(9));
eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
for (i = 0; i < 8; i++) {
/* TODO: Populate SPD eeprom data. */
- smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
+ DeviceState *eeprom;
+ eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
+ qdev_prop_set_uint32(eeprom, "address", 0x50 + i);
+ qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
+ qdev_init(eeprom);
}
- pit = pit_init(0x40, i8259[0]);
+ pit = pit_init(0x40, isa_reserve_irq(0));
DMA_init(0);
/* Super I/O */
- i8042_init(i8259[1], i8259[12], 0x60);
- rtc_state = rtc_init(0x70, i8259[8], 2000);
- serial_init(0x3f8, i8259[4], 115200, serial_hds[0]);
- serial_init(0x2f8, i8259[3], 115200, serial_hds[1]);
+ isa_dev = isa_create_simple("i8042");
+
+ rtc_state = rtc_init(2000);
+ serial_init(0x3f8, isa_reserve_irq(4), 115200, serial_hds[0]);
+ serial_init(0x2f8, isa_reserve_irq(3), 115200, serial_hds[1]);
if (parallel_hds[0])
- parallel_init(0x378, i8259[7], parallel_hds[0]);
+ parallel_init(0x378, isa_reserve_irq(7), parallel_hds[0]);
for(i = 0; i < MAX_FD; i++) {
- index = drive_get_index(IF_FLOPPY, 0, i);
- if (index != -1)
- fd[i] = drives_table[index].bdrv;
- else
- fd[i] = NULL;
+ dinfo = drive_get(IF_FLOPPY, 0, i);
+ fd[i] = dinfo ? dinfo->bdrv : NULL;
}
- floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
+ floppy_controller = fdctrl_init_isa(fd);
/* Sound card */
#ifdef HAS_AUDIO
#endif
/* Network card */
- network_init(pci_bus);
+ network_init();
/* Optional PCI video card */
if (cirrus_vga_enabled) {
- pci_cirrus_vga_init(pci_bus, vga_ram_size);
+ pci_cirrus_vga_init(pci_bus);
} else if (vmsvga_enabled) {
- pci_vmsvga_init(pci_bus, vga_ram_size);
+ pci_vmsvga_init(pci_bus);
} else if (std_vga_enabled) {
- pci_vga_init(pci_bus, vga_ram_size, 0, 0);
+ pci_vga_init(pci_bus, 0, 0);
}
}
-QEMUMachine mips_malta_machine = {
+static QEMUMachine mips_malta_machine = {
.name = "malta",
.desc = "MIPS Malta Core LV",
.init = mips_malta_init,
- .ram_require = VGA_RAM_SIZE + BIOS_SIZE,
+ .is_default = 1,
};
+
+static void mips_malta_machine_init(void)
+{
+ qemu_register_machine(&mips_malta_machine);
+}
+
+machine_init(mips_malta_machine_init);
projects / qemu / blobdiff