Compile most Xen files only once

[qemu] / hw / mips_mipssim.c

diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c
index fb56dc5..e4414b4 100644 (file)
--- a/hw/mips_mipssim.c
+++ b/hw/mips_mipssim.c
@@ -31,12 +31,7 @@
 #include "net.h"
 #include "sysemu.h"
 #include "boards.h"
-
-#ifdef TARGET_WORDS_BIGENDIAN
-#define BIOS_FILENAME "mips_bios.bin"
-#else
-#define BIOS_FILENAME "mipsel_bios.bin"
-#endif
+#include "mips-bios.h"
 
 #ifdef TARGET_MIPS64
 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffULL)
@@ -61,7 +56,8 @@ static void load_kernel (CPUState *env)
     ram_addr_t initrd_offset;
 
     kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,
-                           &entry, &kernel_low, &kernel_high);
+                           (uint64_t *)&entry, (uint64_t *)&kernel_low,
+                           (uint64_t *)&kernel_high);
     if (kernel_size >= 0) {
         if ((entry & ~0x7fffffffULL) == 0x80000000)
             entry = (int32_t)entry;
@@ -85,8 +81,8 @@ static void load_kernel (CPUState *env)
                         loaderparams.initrd_filename);
                 exit(1);
             }
-            initrd_size = load_image(loaderparams.initrd_filename,
-                                     phys_ram_base + initrd_offset);
+            initrd_size = load_image_targphys(loaderparams.initrd_filename,
+                initrd_offset, loaderparams.ram_size - initrd_offset);
         }
         if (initrd_size == (target_ulong) -1) {
             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
@@ -106,13 +102,14 @@ static void main_cpu_reset(void *opaque)
 }
 
 static void
-mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
-                   const char *boot_device, DisplayState *ds,
+mips_mipssim_init (ram_addr_t ram_size,
+                   const char *boot_device,
                    const char *kernel_filename, const char *kernel_cmdline,
                    const char *initrd_filename, const char *cpu_model)
 {
     char buf[1024];
-    unsigned long bios_offset;
+    ram_addr_t ram_offset;
+    ram_addr_t bios_offset;
     CPUState *env;
     int bios_size;
 
@@ -132,14 +129,19 @@ mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
     qemu_register_reset(main_cpu_reset, env);
 
     /* Allocate RAM. */
-    cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
+    ram_offset = qemu_ram_alloc(ram_size);
+    bios_offset = qemu_ram_alloc(BIOS_SIZE);
 
+    cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
+
+    /* Map the BIOS / boot exception handler. */
+    cpu_register_physical_memory(0x1fc00000LL,
+                                 BIOS_SIZE, bios_offset | IO_MEM_ROM);
     /* Load a BIOS / boot exception handler image. */
-    bios_offset = ram_size + vga_ram_size;
     if (bios_name == NULL)
         bios_name = BIOS_FILENAME;
     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
-    bios_size = load_image(buf, phys_ram_base + bios_offset);
+    bios_size = load_image_targphys(buf, 0x1fc00000LL, BIOS_SIZE);
     if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
         /* Bail out if we have neither a kernel image nor boot vector code. */
         fprintf(stderr,
@@ -147,9 +149,6 @@ mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
                 buf);
         exit(1);
     } else {
-        /* Map the BIOS / boot exception handler. */
-        cpu_register_physical_memory(0x1fc00000LL,
-                                     bios_size, bios_offset | IO_MEM_ROM);
         /* We have a boot vector start address. */
         env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
     }
@@ -174,25 +173,20 @@ mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
     if (serial_hds[0])
         serial_init(0x3f8, env->irq[4], 115200, serial_hds[0]);
 
-    if (nd_table[0].vlan) {
-        if (nd_table[0].model == NULL
-            || strcmp(nd_table[0].model, "mipsnet") == 0) {
-            /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
-            mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
-        } else if (strcmp(nd_table[0].model, "?") == 0) {
-            fprintf(stderr, "qemu: Supported NICs: mipsnet\n");
-            exit (1);
-        } else {
-            fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
-            exit (1);
-        }
-    }
+    if (nd_table[0].vlan)
+        /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
+        mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
 }
 
-QEMUMachine mips_mipssim_machine = {
+static QEMUMachine mips_mipssim_machine = {
     .name = "mipssim",
     .desc = "MIPS MIPSsim platform",
     .init = mips_mipssim_init,
-    .ram_require = BIOS_SIZE + VGA_RAM_SIZE /* unused */,
-    .nodisk_ok = 1,
 };
+
+static void mips_mipssim_machine_init(void)
+{
+    qemu_register_machine(&mips_mipssim_machine);
+}
+
+machine_init(mips_mipssim_machine_init);