save/load vmstate support in omap3 hsusb host & clean-ups

[qemu] / hw / omap3.c

diff --git a/hw/omap3.c b/hw/omap3.c
index d76549b..281a650 100644 (file)
--- a/hw/omap3.c
+++ b/hw/omap3.c
@@ -31,6 +31,14 @@
 #include "audio/audio.h"
 #include "block.h"
 
+/*
+ * When the flag below is defined, the "less important" I/O regions
+ * will not be mapped -- this is needed because the current maximum
+ * number of I/O regions in qemu-system-arm (128) is easily reached
+ * when everything is mapped.
+ */
+#define OMAP3_REDUCE_IOREGIONS
+
 //#define OMAP3_DEBUG_
 
 #ifdef OMAP3_DEBUG_
@@ -153,6 +161,7 @@ static struct omap_l3_region_s omap3_l3_region[] = {
     [L3ID_IVA_PM       ] = {0x00014000, 0x0400, L3TYPE_PM},
 };
 
+#ifndef OMAP3_REDUCE_IOREGIONS
 static uint32_t omap3_l3ia_read(void *opaque, target_phys_addr_t addr)
 {
     struct omap3_l3_initiator_agent_s *s = (struct omap3_l3_initiator_agent_s *)opaque;
@@ -735,11 +744,15 @@ static CPUWriteMemoryFunc *omap3_l3undef_writefn[] = {
     omap3_l3undef_write16,
     omap3_l3undef_write32,
 };
+#endif
 
 static struct omap_l3_s *omap3_l3_init(target_phys_addr_t base,
                                        struct omap_l3_region_s *regions,
                                        int n)
 {
+#ifdef OMAP3_REDUCE_IOREGIONS
+    return NULL;
+#else
     int i, iomemtype = 0;
     
     struct omap_l3_s *bus = qemu_mallocz(sizeof(*bus) + n * sizeof(*bus->region));
@@ -790,6 +803,7 @@ static struct omap_l3_s *omap3_l3_init(target_phys_addr_t base,
     }
     
     return bus;
+#endif
 }
 
 typedef enum {
@@ -822,8 +836,10 @@ typedef enum {
     /* 48061000-48061FFF */ L4ID_I2C3_TA,
     /* 48062000-48062FFF */ L4ID_USBTLL,
     /* 48063000-48063FFF */ L4ID_USBTLL_TA,
-    /* 48064000-48064FFF */ L4ID_HSUSBHOST,
-    /* 48065000-48065FFF */ L4ID_HSUSBHOST_TA,
+    /* 48064000-480643FF */ L4ID_USBHOST,
+    /* 48064400-480647FF */ L4ID_USBHOST_OHCI,
+    /* 48064800-4806BFFF */ L4ID_USBHOST_EHCI,
+    /* 48065000-48065FFF */ L4ID_USBHOST_TA,
     /* 48066000-48069FFF */
     /* 4806A000-4806AFFF */ L4ID_UART1,
     /* 4806B000-4806BFFF */ L4ID_UART1_TA,
@@ -1033,8 +1049,10 @@ static struct omap_l4_region_s omap3_l4_region[] = {
     [L4ID_I2C3_TA     ] = {0x00061000, 0x1000, L4TYPE_TA},
     [L4ID_USBTLL      ] = {0x00062000, 0x1000, L4TYPE_GENERIC},
     [L4ID_USBTLL_TA   ] = {0x00063000, 0x1000, L4TYPE_TA},
-    [L4ID_HSUSBHOST   ] = {0x00064000, 0x1000, L4TYPE_GENERIC},
-    [L4ID_HSUSBHOST_TA] = {0x00065000, 0x1000, L4TYPE_TA},
+    [L4ID_USBHOST     ] = {0x00064000, 0x0400, L4TYPE_GENERIC},
+    [L4ID_USBHOST_OHCI] = {0x00064400, 0x0400, L4TYPE_GENERIC},
+    [L4ID_USBHOST_EHCI] = {0x00064800, 0x0400, L4TYPE_GENERIC},
+    [L4ID_USBHOST_TA  ] = {0x00065000, 0x1000, L4TYPE_TA},
     [L4ID_UART1       ] = {0x0006a000, 0x1000, L4TYPE_GENERIC},
     [L4ID_UART1_TA    ] = {0x0006b000, 0x1000, L4TYPE_TA},
     [L4ID_UART2       ] = {0x0006c000, 0x1000, L4TYPE_GENERIC},
@@ -1231,7 +1249,7 @@ static const struct omap3_l4_agent_info_s omap3_l4_agent_info[] = {
     {L4A_DSS,        L4ID_DSI,       6},
     /* TODO: camera */
     {L4A_USBHS_OTG,  L4ID_HSUSBOTG,  2},
-    {L4A_USBHS_HOST, L4ID_HSUSBHOST, 2},
+    {L4A_USBHS_HOST, L4ID_USBHOST,   4},
     {L4A_USBHS_TLL,  L4ID_USBTLL,    2},
     {L4A_UART1,      L4ID_UART1,     2},
     {L4A_UART2,      L4ID_UART2,     2},
@@ -1281,6 +1299,7 @@ static const struct omap3_l4_agent_info_s omap3_l4_agent_info[] = {
     {L4A_GPIO6,      L4ID_GPIO6,     2},
 };
 
+#ifndef OMAP3_REDUCE_IOREGIONS
 static uint32_t omap3_l4ta_read(void *opaque, target_phys_addr_t addr)
 {
     struct omap_target_agent_s *s = (struct omap_target_agent_s *)opaque;
@@ -1375,10 +1394,14 @@ static CPUWriteMemoryFunc *omap3_l4ta_writefn[] = {
     omap_badwidth_write32,
     omap3_l4ta_write,
 };
+#endif
 
 static struct omap_target_agent_s *omap3_l4ta_init(struct omap_l4_s *bus, int cs)
 {
-    int i, iomemtype;
+#ifndef OMAP3_REDUCE_IOREGIONS
+    int iomemtype;
+#endif
+    int i;
     struct omap_target_agent_s *ta = 0;
     const struct omap3_l4_agent_info_s *info = 0;
 
@@ -1415,12 +1438,16 @@ static struct omap_target_agent_s *omap3_l4ta_init(struct omap_l4_s *bus, int cs
         exit(-1);
     }
     
+#ifndef OMAP3_REDUCE_IOREGIONS
     iomemtype = l4_register_io_memory(0, omap3_l4ta_readfn,
                                       omap3_l4ta_writefn, ta);
     ta->base = omap_l4_attach(ta, i, iomemtype);
 
     register_savevm("omap3_l4ta", ta->base >> 8, 0,
                     omap3_l4ta_save_state, omap3_l4ta_load_state, ta);
+#else
+    ta->base = ta->bus->base + ta->start[i].offset;
+#endif
 
     return ta;
 }
@@ -2038,9 +2065,9 @@ static CPUWriteMemoryFunc *omap3_prm_writefn[] = {
     omap3_prm_write,
 };
 
-struct omap3_prm_s *omap3_prm_init(struct omap_target_agent_s *ta,
-                                   qemu_irq mpu_int, qemu_irq iva_int,
-                                   struct omap_mpu_state_s *mpu)
+static struct omap3_prm_s *omap3_prm_init(struct omap_target_agent_s *ta,
+                                          qemu_irq mpu_int, qemu_irq iva_int,
+                                          struct omap_mpu_state_s *mpu)
 {
     int iomemtype;
     struct omap3_prm_s *s = (struct omap3_prm_s *) qemu_mallocz(sizeof(*s));
@@ -3285,9 +3312,10 @@ static CPUWriteMemoryFunc *omap3_cm_writefn[] = {
     omap3_cm_write,
 };
 
-struct omap3_cm_s *omap3_cm_init(struct omap_target_agent_s *ta,
-                                 qemu_irq mpu_int, qemu_irq dsp_int,
-                                 qemu_irq iva_int, struct omap_mpu_state_s *mpu)
+static struct omap3_cm_s *omap3_cm_init(struct omap_target_agent_s *ta,
+                                        qemu_irq mpu_int, qemu_irq dsp_int,
+                                        qemu_irq iva_int,
+                                        struct omap_mpu_state_s *mpu)
 {
     int iomemtype;
     struct omap3_cm_s *s = (struct omap3_cm_s *) qemu_mallocz(sizeof(*s));
@@ -4437,7 +4465,7 @@ struct omap_mpu_state_s *omap3530_mpu_init(unsigned long sdram_size,
 {
     struct omap_mpu_state_s *s = (struct omap_mpu_state_s *)
         qemu_mallocz(sizeof(struct omap_mpu_state_s));
-    ram_addr_t sram_base, q2_base, bootrom_base;
+    ram_addr_t sram_base, q2_base;
     qemu_irq *cpu_irq;
     qemu_irq drqs[4];
     int i;
@@ -4455,19 +4483,12 @@ struct omap_mpu_state_s *omap3530_mpu_init(unsigned long sdram_size,
     omap_clk_init(s);
 
     /* Memory-mapped stuff */
-
     q2_base = qemu_ram_alloc(s->sdram_size);
     cpu_register_physical_memory(OMAP3_Q2_BASE, s->sdram_size,
                                  q2_base | IO_MEM_RAM);
     sram_base = qemu_ram_alloc(s->sram_size);
     cpu_register_physical_memory(OMAP3_SRAM_BASE, s->sram_size,
                                  sram_base | IO_MEM_RAM);
-    bootrom_base = qemu_ram_alloc(OMAP3XXX_BOOTROM_SIZE);
-    cpu_register_physical_memory(OMAP3_Q1_BASE + 0x14000,
-                                 OMAP3XXX_BOOTROM_SIZE,
-                                 bootrom_base | IO_MEM_ROM);
-    cpu_register_physical_memory(0, OMAP3XXX_BOOTROM_SIZE,
-                                 bootrom_base | IO_MEM_ROM);
 
     s->l4 = omap_l4_init(OMAP3_L4_BASE, 
                          sizeof(omap3_l4_agent_info)