#include "net.h"
#include "smbus.h"
#include "boards.h"
-#include "console.h"
+#include "monitor.h"
+#include "fw_cfg.h"
+#include "hpet_emul.h"
+#include "watchdog.h"
+#include "smbios.h"
/* output Bochs bios info messages */
//#define DEBUG_BIOS
/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
#define ACPI_DATA_SIZE 0x10000
+#define BIOS_CFG_IOPORT 0x510
+#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
+#define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
#define MAX_IDE_BUS 2
static IOAPICState *ioapic;
static PCIDevice *i440fx_state;
+typedef struct rom_reset_data {
+ uint8_t *data;
+ target_phys_addr_t addr;
+ unsigned size;
+} RomResetData;
+
+static void option_rom_reset(void *_rrd)
+{
+ RomResetData *rrd = _rrd;
+
+ cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
+}
+
+static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
+{
+ RomResetData *rrd = qemu_malloc(sizeof *rrd);
+
+ rrd->data = qemu_malloc(size);
+ cpu_physical_memory_read(addr, rrd->data, size);
+ rrd->addr = addr;
+ rrd->size = size;
+ qemu_register_reset(option_rom_reset, 0, rrd);
+}
+
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
{
}
/* Note: when using kqemu, it is more logical to return the host TSC
because kqemu does not trap the RDTSC instruction for
performance reasons */
-#if USE_KQEMU
+#ifdef CONFIG_KQEMU
if (env->kqemu_enabled) {
return cpu_get_real_ticks();
} else
{
CPUState *env = first_cpu;
- if (!level)
- return;
-
- while (env) {
- if (apic_accept_pic_intr(env))
- apic_local_deliver(env, APIC_LINT0);
- env = env->next_cpu;
+ if (env->apic_state) {
+ while (env) {
+ if (apic_accept_pic_intr(env))
+ apic_deliver_pic_intr(env, level);
+ env = env->next_cpu;
+ }
+ } else {
+ if (level)
+ cpu_interrupt(env, CPU_INTERRUPT_HARD);
+ else
+ cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
}
}
/* copy/pasted from cmos_init, should be made a general function
and used there as well */
-int pc_boot_set(const char *boot_device)
+static int pc_boot_set(void *opaque, const char *boot_device)
{
+ Monitor *mon = cur_mon;
#define PC_MAX_BOOT_DEVICES 3
- RTCState *s = rtc_state;
+ RTCState *s = (RTCState *)opaque;
int nbds, bds[3] = { 0, };
int i;
nbds = strlen(boot_device);
if (nbds > PC_MAX_BOOT_DEVICES) {
- term_printf("Too many boot devices for PC\n");
+ monitor_printf(mon, "Too many boot devices for PC\n");
return(1);
}
for (i = 0; i < nbds; i++) {
bds[i] = boot_device2nibble(boot_device[i]);
if (bds[i] == 0) {
- term_printf("Invalid boot device for PC: '%c'\n",
- boot_device[i]);
+ monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
+ boot_device[i]);
return(1);
}
}
}
}
+extern uint64_t node_cpumask[MAX_NODES];
+
static void bochs_bios_init(void)
{
+ void *fw_cfg;
+ uint8_t *smbios_table;
+ size_t smbios_len;
+ uint64_t *numa_fw_cfg;
+ int i, j;
+
register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
+
+ fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
+ fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
+ fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
+ acpi_tables_len);
+
+ smbios_table = smbios_get_table(&smbios_len);
+ if (smbios_table)
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
+ smbios_table, smbios_len);
+
+ /* allocate memory for the NUMA channel: one (64bit) word for the number
+ * of nodes, one word for each VCPU->node and one word for each node to
+ * hold the amount of memory.
+ */
+ numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
+ numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
+ for (i = 0; i < smp_cpus; i++) {
+ for (j = 0; j < nb_numa_nodes; j++) {
+ if (node_cpumask[j] & (1 << i)) {
+ numa_fw_cfg[i + 1] = cpu_to_le64(j);
+ break;
+ }
+ }
+ }
+ for (i = 0; i < nb_numa_nodes; i++) {
+ numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
+ }
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
+ (1 + smp_cpus + nb_numa_nodes) * 8);
}
/* Generate an initial boot sector which sets state and jump to
a specified vector */
-static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
+static void generate_bootsect(target_phys_addr_t option_rom,
+ uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
{
- uint8_t bootsect[512], *p;
+ uint8_t rom[512], *p, *reloc;
+ uint8_t sum;
int i;
- int hda;
- hda = drive_get_index(IF_IDE, 0, 0);
- if (hda == -1) {
- fprintf(stderr, "A disk image must be given for 'hda' when booting "
- "a Linux kernel\n");
- exit(1);
- }
+ memset(rom, 0, sizeof(rom));
+
+ p = rom;
+ /* Make sure we have an option rom signature */
+ *p++ = 0x55;
+ *p++ = 0xaa;
- memset(bootsect, 0, sizeof(bootsect));
+ /* ROM size in sectors*/
+ *p++ = 1;
- /* Copy the MSDOS partition table if possible */
- bdrv_read(drives_table[hda].bdrv, 0, bootsect, 1);
+ /* Hook int19 */
- /* Make sure we have a partition signature */
- bootsect[510] = 0x55;
- bootsect[511] = 0xaa;
+ *p++ = 0x50; /* push ax */
+ *p++ = 0x1e; /* push ds */
+ *p++ = 0x31; *p++ = 0xc0; /* xor ax, ax */
+ *p++ = 0x8e; *p++ = 0xd8; /* mov ax, ds */
+ *p++ = 0xc7; *p++ = 0x06; /* movvw _start,0x64 */
+ *p++ = 0x64; *p++ = 0x00;
+ reloc = p;
+ *p++ = 0x00; *p++ = 0x00;
+
+ *p++ = 0x8c; *p++ = 0x0e; /* mov cs,0x66 */
+ *p++ = 0x66; *p++ = 0x00;
+
+ *p++ = 0x1f; /* pop ds */
+ *p++ = 0x58; /* pop ax */
+ *p++ = 0xcb; /* lret */
+
/* Actual code */
- p = bootsect;
+ *reloc = (p - rom);
+
*p++ = 0xfa; /* CLI */
*p++ = 0xfc; /* CLD */
*p++ = segs[1]; /* CS */
*p++ = segs[1] >> 8;
- bdrv_set_boot_sector(drives_table[hda].bdrv, bootsect, sizeof(bootsect));
+ /* sign rom */
+ sum = 0;
+ for (i = 0; i < (sizeof(rom) - 1); i++)
+ sum += rom[i];
+ rom[sizeof(rom) - 1] = -sum;
+
+ cpu_physical_memory_write_rom(option_rom, rom, sizeof(rom));
+ option_rom_setup_reset(option_rom, sizeof (rom));
}
static long get_file_size(FILE *f)
return size;
}
-static void load_linux(const char *kernel_filename,
+static void load_linux(target_phys_addr_t option_rom,
+ const char *kernel_filename,
const char *initrd_filename,
- const char *kernel_cmdline)
+ const char *kernel_cmdline,
+ target_phys_addr_t max_ram_size)
{
uint16_t protocol;
uint32_t gpr[8];
#if 0
fprintf(stderr,
- "qemu: real_addr = %#zx\n"
- "qemu: cmdline_addr = %#zx\n"
- "qemu: prot_addr = %#zx\n",
+ "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
+ "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
+ "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
real_addr,
cmdline_addr,
prot_addr);
else
initrd_max = 0x37ffffff;
- if (initrd_max >= ram_size-ACPI_DATA_SIZE)
- initrd_max = ram_size-ACPI_DATA_SIZE-1;
+ if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
+ initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
/* kernel command line */
pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
initrd_size = get_file_size(fi);
initrd_addr = (initrd_max-initrd_size) & ~4095;
- fprintf(stderr, "qemu: loading initrd (%#x bytes) at %#zx\n",
- initrd_size, initrd_addr);
-
if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
initrd_filename);
memset(gpr, 0, sizeof gpr);
gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
- generate_bootsect(gpr, seg, 0);
+ option_rom_setup_reset(real_addr, setup_size);
+ option_rom_setup_reset(prot_addr, kernel_size);
+ option_rom_setup_reset(cmdline_addr, cmdline_size);
+ if (initrd_filename)
+ option_rom_setup_reset(initrd_addr, initrd_size);
+
+ generate_bootsect(option_rom, gpr, seg, 0);
}
static void main_cpu_reset(void *opaque)
static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
{
struct soundhw *c;
- int audio_enabled = 0;
- for (c = soundhw; !audio_enabled && c->name; ++c) {
- audio_enabled = c->enabled;
- }
-
- if (audio_enabled) {
- AudioState *s;
-
- s = AUD_init ();
- if (s) {
- for (c = soundhw; c->name; ++c) {
- if (c->enabled) {
- if (c->isa) {
- c->init.init_isa (s, pic);
- }
- else {
- if (pci_bus) {
- c->init.init_pci (pci_bus, s);
- }
- }
+ for (c = soundhw; c->name; ++c) {
+ if (c->enabled) {
+ if (c->isa) {
+ c->init.init_isa(pic);
+ } else {
+ if (pci_bus) {
+ c->init.init_pci(pci_bus);
}
}
}
nb_ne2k++;
}
+static int load_option_rom(const char *oprom, target_phys_addr_t start,
+ target_phys_addr_t end)
+{
+ int size;
+
+ size = get_image_size(oprom);
+ if (size > 0 && start + size > end) {
+ fprintf(stderr, "Not enough space to load option rom '%s'\n",
+ oprom);
+ exit(1);
+ }
+ size = load_image_targphys(oprom, start, end - start);
+ if (size < 0) {
+ fprintf(stderr, "Could not load option rom '%s'\n", oprom);
+ exit(1);
+ }
+ /* Round up optiom rom size to the next 2k boundary */
+ size = (size + 2047) & ~2047;
+ option_rom_setup_reset(start, size);
+ return size;
+}
+
/* PC hardware initialisation */
-static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+static void pc_init1(ram_addr_t ram_size,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename,
int pci_enabled, const char *cpu_model)
{
char buf[1024];
int ret, linux_boot, i;
- ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
+ ram_addr_t ram_addr, bios_offset, option_rom_offset;
ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
- int bios_size, isa_bios_size, vga_bios_size;
+ int bios_size, isa_bios_size, oprom_area_size;
PCIBus *pci_bus;
int piix3_devfn = -1;
CPUState *env;
- NICInfo *nd;
qemu_irq *cpu_irq;
qemu_irq *i8259;
int index;
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
BlockDriverState *fd[MAX_FD];
+ int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
if (ram_size >= 0xe0000000 ) {
above_4g_mem_size = ram_size - 0xe0000000;
below_4g_mem_size = ram_size;
}
- qemu_register_boot_set(pc_boot_set);
-
linux_boot = (kernel_filename != NULL);
/* init CPUs */
/* XXX: enable it in all cases */
env->cpuid_features |= CPUID_APIC;
}
- register_savevm("cpu", i, 5, cpu_save, cpu_load, env);
- qemu_register_reset(main_cpu_reset, env);
+ qemu_register_reset(main_cpu_reset, 0, env);
if (pci_enabled) {
apic_init(env);
}
vmport_init();
/* allocate RAM */
- ram_addr = qemu_ram_alloc(ram_size);
- cpu_register_physical_memory(0, below_4g_mem_size, ram_addr);
+ ram_addr = qemu_ram_alloc(0xa0000);
+ cpu_register_physical_memory(0, 0xa0000, ram_addr);
+
+ /* Allocate, even though we won't register, so we don't break the
+ * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
+ * and some bios areas, which will be registered later
+ */
+ ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
+ ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
+ cpu_register_physical_memory(0x100000,
+ below_4g_mem_size - 0x100000,
+ ram_addr);
/* above 4giga memory allocation */
if (above_4g_mem_size > 0) {
- cpu_register_physical_memory(0x100000000ULL, above_4g_mem_size,
- ram_addr + below_4g_mem_size);
+#if TARGET_PHYS_ADDR_BITS == 32
+ hw_error("To much RAM for 32-bit physical address");
+#else
+ ram_addr = qemu_ram_alloc(above_4g_mem_size);
+ cpu_register_physical_memory(0x100000000ULL,
+ above_4g_mem_size,
+ ram_addr);
+#endif
}
- /* allocate VGA RAM */
- vga_ram_addr = qemu_ram_alloc(vga_ram_size);
/* BIOS load */
if (bios_name == NULL)
goto bios_error;
}
bios_offset = qemu_ram_alloc(bios_size);
- ret = load_image(buf, phys_ram_base + bios_offset);
+ ret = load_image(buf, qemu_get_ram_ptr(bios_offset));
if (ret != bios_size) {
bios_error:
fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
exit(1);
}
-
- /* VGA BIOS load */
- if (cirrus_vga_enabled) {
- snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
- } else {
- snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
- }
- vga_bios_size = get_image_size(buf);
- if (vga_bios_size <= 0 || vga_bios_size > 65536)
- goto vga_bios_error;
- vga_bios_offset = qemu_ram_alloc(65536);
-
- ret = load_image(buf, phys_ram_base + vga_bios_offset);
- if (ret != vga_bios_size) {
- vga_bios_error:
- fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
- exit(1);
- }
-
- /* setup basic memory access */
- cpu_register_physical_memory(0xc0000, 0x10000,
- vga_bios_offset | IO_MEM_ROM);
-
/* map the last 128KB of the BIOS in ISA space */
isa_bios_size = bios_size;
if (isa_bios_size > (128 * 1024))
isa_bios_size = 128 * 1024;
- cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
- IO_MEM_UNASSIGNED);
cpu_register_physical_memory(0x100000 - isa_bios_size,
isa_bios_size,
(bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
- {
- ram_addr_t option_rom_offset;
- int size, offset;
-
- offset = 0;
- for (i = 0; i < nb_option_roms; i++) {
- size = get_image_size(option_rom[i]);
- if (size < 0) {
- fprintf(stderr, "Could not load option rom '%s'\n",
- option_rom[i]);
- exit(1);
- }
- if (size > (0x10000 - offset))
- goto option_rom_error;
- option_rom_offset = qemu_ram_alloc(size);
- ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
- if (ret != size) {
- option_rom_error:
- fprintf(stderr, "Too many option ROMS\n");
- exit(1);
- }
- size = (size + 4095) & ~4095;
- cpu_register_physical_memory(0xd0000 + offset,
- size, option_rom_offset | IO_MEM_ROM);
- offset += size;
+
+
+ option_rom_offset = qemu_ram_alloc(0x20000);
+ oprom_area_size = 0;
+ cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset);
+
+ if (using_vga) {
+ /* VGA BIOS load */
+ if (cirrus_vga_enabled) {
+ snprintf(buf, sizeof(buf), "%s/%s", bios_dir,
+ VGABIOS_CIRRUS_FILENAME);
+ } else {
+ snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
}
+ oprom_area_size = load_option_rom(buf, 0xc0000, 0xe0000);
+ }
+ /* Although video roms can grow larger than 0x8000, the area between
+ * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
+ * for any other kind of option rom inside this area */
+ if (oprom_area_size < 0x8000)
+ oprom_area_size = 0x8000;
+
+ if (linux_boot) {
+ load_linux(0xc0000 + oprom_area_size,
+ kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
+ oprom_area_size += 2048;
+ }
+
+ for (i = 0; i < nb_option_roms; i++) {
+ oprom_area_size += load_option_rom(option_rom[i],
+ 0xc0000 + oprom_area_size, 0xe0000);
}
/* map all the bios at the top of memory */
bochs_bios_init();
- if (linux_boot)
- load_linux(kernel_filename, initrd_filename, kernel_cmdline);
-
cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
i8259 = i8259_init(cpu_irq[0]);
ferr_irq = i8259[13];
if (cirrus_vga_enabled) {
if (pci_enabled) {
- pci_cirrus_vga_init(pci_bus,
- ds, phys_ram_base + vga_ram_addr,
- vga_ram_addr, vga_ram_size);
+ pci_cirrus_vga_init(pci_bus);
} else {
- isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
- vga_ram_addr, vga_ram_size);
+ isa_cirrus_vga_init();
}
} else if (vmsvga_enabled) {
if (pci_enabled)
- pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
- vga_ram_addr, vga_ram_size);
+ pci_vmsvga_init(pci_bus);
else
fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
- } else {
+ } else if (std_vga_enabled) {
if (pci_enabled) {
- pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
- vga_ram_addr, vga_ram_size, 0, 0);
+ pci_vga_init(pci_bus, 0, 0);
} else {
- isa_vga_init(ds, phys_ram_base + vga_ram_addr,
- vga_ram_addr, vga_ram_size);
+ isa_vga_init();
}
}
- rtc_state = rtc_init(0x70, i8259[8]);
+ rtc_state = rtc_init(0x70, i8259[8], 2000);
+
+ qemu_register_boot_set(pc_boot_set, rtc_state);
register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
}
pit = pit_init(0x40, i8259[0]);
pcspk_init(pit);
+ if (!no_hpet) {
+ hpet_init(i8259);
+ }
if (pci_enabled) {
pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
}
}
}
+ watchdog_pc_init(pci_bus);
+
for(i = 0; i < nb_nics; i++) {
- nd = &nd_table[i];
- if (!nd->model) {
- if (pci_enabled) {
- nd->model = "ne2k_pci";
- } else {
- nd->model = "ne2k_isa";
- }
- }
- if (strcmp(nd->model, "ne2k_isa") == 0) {
+ NICInfo *nd = &nd_table[i];
+
+ if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
pc_init_ne2k_isa(nd, i8259);
- } else if (pci_enabled) {
- if (strcmp(nd->model, "?") == 0)
- fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
- pci_nic_init(pci_bus, nd, -1);
- } else if (strcmp(nd->model, "?") == 0) {
- fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
- exit(1);
- } else {
- fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
- exit(1);
- }
+ else
+ pci_nic_init(pci_bus, nd, -1, "ne2k_pci");
}
+ qemu_system_hot_add_init();
+
if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
fprintf(stderr, "qemu: too many IDE bus\n");
exit(1);
/* TODO: Populate SPD eeprom data. */
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
for (i = 0; i < 8; i++) {
- smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
+ DeviceState *eeprom;
+ eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
+ qdev_set_prop_int(eeprom, "address", 0x50 + i);
+ qdev_set_prop_ptr(eeprom, "data", eeprom_buf + (i * 256));
+ qdev_init(eeprom);
}
}
if (pci_enabled) {
int max_bus;
- int bus, unit;
- void *scsi;
+ int bus;
max_bus = drive_get_max_bus(IF_SCSI);
-
for (bus = 0; bus <= max_bus; bus++) {
- scsi = lsi_scsi_init(pci_bus, -1);
- for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
- index = drive_get_index(IF_SCSI, bus, unit);
- if (index == -1)
- continue;
- lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
- }
+ pci_create_simple(pci_bus, -1, "lsi53c895a");
+ }
+ }
+
+ /* Add virtio block devices */
+ if (pci_enabled) {
+ int index;
+ int unit_id = 0;
+
+ while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
+ pci_create_simple(pci_bus, -1, "virtio-blk-pci");
+ unit_id++;
+ }
+ }
+
+ /* Add virtio balloon device */
+ if (pci_enabled) {
+ pci_create_simple(pci_bus, -1, "virtio-balloon-pci");
+ }
+
+ /* Add virtio console devices */
+ if (pci_enabled) {
+ for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
+ if (virtcon_hds[i]) {
+ pci_create_simple(pci_bus, -1, "virtio-console-pci");
+ }
}
}
}
-static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+static void pc_init_pci(ram_addr_t ram_size,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
- pc_init1(ram_size, vga_ram_size, boot_device, ds,
+ pc_init1(ram_size, boot_device,
kernel_filename, kernel_cmdline,
initrd_filename, 1, cpu_model);
}
-static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+static void pc_init_isa(ram_addr_t ram_size,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
- pc_init1(ram_size, vga_ram_size, boot_device, ds,
+ pc_init1(ram_size, boot_device,
kernel_filename, kernel_cmdline,
initrd_filename, 0, cpu_model);
}
-QEMUMachine pc_machine = {
- "pc",
- "Standard PC",
- pc_init_pci,
- VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
+/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
+ BIOS will read it and start S3 resume at POST Entry */
+void cmos_set_s3_resume(void)
+{
+ if (rtc_state)
+ rtc_set_memory(rtc_state, 0xF, 0xFE);
+}
+
+static QEMUMachine pc_machine = {
+ .name = "pc",
+ .desc = "Standard PC",
+ .init = pc_init_pci,
+ .max_cpus = 255,
+ .is_default = 1,
};
-QEMUMachine isapc_machine = {
- "isapc",
- "ISA-only PC",
- pc_init_isa,
- VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
+static QEMUMachine isapc_machine = {
+ .name = "isapc",
+ .desc = "ISA-only PC",
+ .init = pc_init_isa,
+ .max_cpus = 1,
};
+
+static void pc_machine_init(void)
+{
+ qemu_register_machine(&pc_machine);
+ qemu_register_machine(&isapc_machine);
+}
+
+machine_init(pc_machine_init);