* This code is licenced under the GPL.
*/
-#include "hw.h"
-#include "primecell.h"
+#include "sysbus.h"
#include "sd.h"
+#include "sysemu.h"
//#define DEBUG_PL181 1
#define PL181_FIFO_LEN 16
typedef struct {
+ SysBusDevice busdev;
SDState *card;
uint32_t clock;
uint32_t power;
pl181_update(s);
}
-static CPUReadMemoryFunc *pl181_readfn[] = {
+static CPUReadMemoryFunc * const pl181_readfn[] = {
pl181_read,
pl181_read,
pl181_read
};
-static CPUWriteMemoryFunc *pl181_writefn[] = {
+static CPUWriteMemoryFunc * const pl181_writefn[] = {
pl181_write,
pl181_write,
pl181_write
s->mask[1] = 0;
}
-void pl181_init(uint32_t base, BlockDriverState *bd,
- qemu_irq irq0, qemu_irq irq1)
+static int pl181_init(SysBusDevice *dev)
{
int iomemtype;
- pl181_state *s;
+ pl181_state *s = FROM_SYSBUS(pl181_state, dev);
+ BlockDriverState *bd;
- s = (pl181_state *)qemu_mallocz(sizeof(pl181_state));
- iomemtype = cpu_register_io_memory(0, pl181_readfn,
+ iomemtype = cpu_register_io_memory(pl181_readfn,
pl181_writefn, s);
- cpu_register_physical_memory(base, 0x00001000, iomemtype);
+ sysbus_init_mmio(dev, 0x1000, iomemtype);
+ sysbus_init_irq(dev, &s->irq[0]);
+ sysbus_init_irq(dev, &s->irq[1]);
+ bd = qdev_init_bdrv(&dev->qdev, IF_SD);
s->card = sd_init(bd, 0);
- s->irq[0] = irq0;
- s->irq[1] = irq1;
qemu_register_reset(pl181_reset, s);
pl181_reset(s);
/* ??? Save/restore. */
+ return 0;
}
+
+static void pl181_register_devices(void)
+{
+ sysbus_register_dev("pl181", sizeof(pl181_state), pl181_init);
+}
+
+device_init(pl181_register_devices)