microblaze: linux-user support.

[qemu] / hw / ppc4xx_pci.c

diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c
index b21c2fe..45ab3be 100644 (file)
--- a/hw/ppc4xx_pci.c
+++ b/hw/ppc4xx_pci.c
@@ -33,7 +33,7 @@ typedef target_phys_addr_t pci_addr_t;
 #ifdef DEBUG
 #define DPRINTF(fmt, ...) do { printf(fmt, ## __VA_ARGS__); } while (0)
 #else
-#define DPRINTF(fmt, args...)
+#define DPRINTF(fmt, ...)
 #endif /* DEBUG */
 
 struct PCIMasterMap {
@@ -366,24 +366,22 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4],
     PPC4xxPCIState *controller;
     int index;
     static int ppc4xx_pci_id;
+    uint8_t *pci_conf;
 
     controller = qemu_mallocz(sizeof(PPC4xxPCIState));
-    if (!controller)
-        return NULL;
 
-    controller->pci_state.bus = pci_register_bus(ppc4xx_pci_set_irq,
+    controller->pci_state.bus = pci_register_bus(NULL, "pci",
+                                                 ppc4xx_pci_set_irq,
                                                  ppc4xx_pci_map_irq,
                                                  pci_irqs, 0, 4);
 
     controller->pci_dev = pci_register_device(controller->pci_state.bus,
                                               "host bridge", sizeof(PCIDevice),
                                               0, NULL, NULL);
-    controller->pci_dev->config[0x00] = 0x14; // vendor_id
-    controller->pci_dev->config[0x01] = 0x10;
-    controller->pci_dev->config[0x02] = 0x7f; // device_id
-    controller->pci_dev->config[0x03] = 0x02;
-    controller->pci_dev->config[0x0a] = 0x80; // class_sub = other bridge type
-    controller->pci_dev->config[0x0b] = 0x06; // class_base = PCI_bridge
+    pci_conf = controller->pci_dev->config;
+    pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM);
+    pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_IBM_440GX);
+    pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER);
 
     /* CFGADDR */
     index = cpu_register_io_memory(0, pci4xx_cfgaddr_read,
@@ -406,7 +404,7 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4],
         goto free;
     cpu_register_physical_memory(registers, PCI_REG_SIZE, index);
 
-    qemu_register_reset(ppc4xx_pci_reset, controller);
+    qemu_register_reset(ppc4xx_pci_reset, 0, controller);
 
     /* XXX load/save code not tested. */
     register_savevm("ppc4xx_pci", ppc4xx_pci_id++, 1,