* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
*
* Copyright IBM Corp. 2008
*
#ifdef DEBUG
#define DPRINTF(fmt, ...) do { printf(fmt, ## __VA_ARGS__); } while (0)
#else
-#define DPRINTF(fmt, args...)
+#define DPRINTF(fmt, ...)
#endif /* DEBUG */
struct PCIMasterMap {
return ppc4xx_pci->pci_state.config_reg;
}
-static CPUReadMemoryFunc *pci4xx_cfgaddr_read[] = {
+static CPUReadMemoryFunc * const pci4xx_cfgaddr_read[] = {
&pci4xx_cfgaddr_readl,
&pci4xx_cfgaddr_readl,
&pci4xx_cfgaddr_readl,
ppc4xx_pci->pci_state.config_reg = value & ~0x3;
}
-static CPUWriteMemoryFunc *pci4xx_cfgaddr_write[] = {
+static CPUWriteMemoryFunc * const pci4xx_cfgaddr_write[] = {
&pci4xx_cfgaddr_writel,
&pci4xx_cfgaddr_writel,
&pci4xx_cfgaddr_writel,
};
-static CPUReadMemoryFunc *pci4xx_cfgdata_read[] = {
+static CPUReadMemoryFunc * const pci4xx_cfgdata_read[] = {
&pci_host_data_readb,
&pci_host_data_readw,
&pci_host_data_readl,
};
-static CPUWriteMemoryFunc *pci4xx_cfgdata_write[] = {
+static CPUWriteMemoryFunc * const pci4xx_cfgdata_write[] = {
&pci_host_data_writeb,
&pci_host_data_writew,
&pci_host_data_writel,
return value;
}
-static CPUReadMemoryFunc *pci_reg_read[] = {
+static CPUReadMemoryFunc * const pci_reg_read[] = {
&ppc4xx_pci_reg_read4,
&ppc4xx_pci_reg_read4,
&ppc4xx_pci_reg_read4,
};
-static CPUWriteMemoryFunc *pci_reg_write[] = {
+static CPUWriteMemoryFunc * const pci_reg_write[] = {
&ppc4xx_pci_reg_write4,
&ppc4xx_pci_reg_write4,
&ppc4xx_pci_reg_write4,
return slot - 1;
}
-static void ppc4xx_pci_set_irq(qemu_irq *pci_irqs, int irq_num, int level)
+static void ppc4xx_pci_set_irq(void *opaque, int irq_num, int level)
{
+ qemu_irq *pci_irqs = opaque;
+
DPRINTF("%s: PCI irq %d\n", __func__, irq_num);
qemu_set_irq(pci_irqs[irq_num], level);
}
controller = qemu_mallocz(sizeof(PPC4xxPCIState));
- controller->pci_state.bus = pci_register_bus(ppc4xx_pci_set_irq,
+ controller->pci_state.bus = pci_register_bus(NULL, "pci",
+ ppc4xx_pci_set_irq,
ppc4xx_pci_map_irq,
pci_irqs, 0, 4);
0, NULL, NULL);
pci_conf = controller->pci_dev->config;
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM);
- pci_config_set_device_id(pci_conf, 0x027f); // device_id
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_IBM_440GX);
pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER);
/* CFGADDR */
- index = cpu_register_io_memory(0, pci4xx_cfgaddr_read,
+ index = cpu_register_io_memory(pci4xx_cfgaddr_read,
pci4xx_cfgaddr_write, controller);
if (index < 0)
goto free;
cpu_register_physical_memory(config_space + PCIC0_CFGADDR, 4, index);
/* CFGDATA */
- index = cpu_register_io_memory(0, pci4xx_cfgdata_read,
+ index = cpu_register_io_memory(pci4xx_cfgdata_read,
pci4xx_cfgdata_write,
&controller->pci_state);
if (index < 0)
cpu_register_physical_memory(config_space + PCIC0_CFGDATA, 4, index);
/* Internal registers */
- index = cpu_register_io_memory(0, pci_reg_read, pci_reg_write, controller);
+ index = cpu_register_io_memory(pci_reg_read, pci_reg_write, controller);
if (index < 0)
goto free;
cpu_register_physical_memory(registers, PCI_REG_SIZE, index);