microblaze: linux-user support.

[qemu] / hw / slavio_intctl.c

diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c
index ff8f0c7..e39e4f9 100644 (file)
--- a/hw/slavio_intctl.c
+++ b/hw/slavio_intctl.c
@@ -23,16 +23,16 @@
  */
 #include "hw.h"
 #include "sun4m.h"
-#include "console.h"
+#include "monitor.h"
 
 //#define DEBUG_IRQ_COUNT
 //#define DEBUG_IRQ
 
 #ifdef DEBUG_IRQ
-#define DPRINTF(fmt, args...) \
-do { printf("IRQ: " fmt , ##args); } while (0)
+#define DPRINTF(fmt, ...)                                       \
+    do { printf("IRQ: " fmt , ## __VA_ARGS__); } while (0)
 #else
-#define DPRINTF(fmt, args...)
+#define DPRINTF(fmt, ...)
 #endif
 
 /*
@@ -77,7 +77,6 @@ typedef struct SLAVIO_CPUINTCTLState {
 #define MASTER_IRQ_MASK ~0x0fa2007f
 #define MASTER_DISABLE 0x80000000
 #define CPU_SOFTIRQ_MASK 0xfffe0000
-#define CPU_HARDIRQ_MASK 0x0000fffe
 #define CPU_IRQ_INT15_IN 0x0004000
 #define CPU_IRQ_INT15_MASK 0x80000000
 
@@ -98,7 +97,7 @@ static uint32_t slavio_intctl_mem_readl(void *opaque, target_phys_addr_t addr)
         ret = 0;
         break;
     }
-    DPRINTF("read cpu %d reg 0x" TARGET_FMT_plx " = %x\n", cpu, addr, ret);
+    DPRINTF("read cpu %d reg 0x" TARGET_FMT_plx " = %x\n", s->cpu, addr, ret);
 
     return ret;
 }
@@ -110,7 +109,7 @@ static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr,
     uint32_t saddr;
 
     saddr = addr >> 2;
-    DPRINTF("write cpu %d reg 0x" TARGET_FMT_plx " = %x\n", cpu, addr, val);
+    DPRINTF("write cpu %d reg 0x" TARGET_FMT_plx " = %x\n", s->cpu, addr, val);
     switch (saddr) {
     case 1: // clear pending softints
         if (val & CPU_IRQ_INT15_IN)
@@ -219,33 +218,33 @@ static CPUWriteMemoryFunc *slavio_intctlm_mem_write[3] = {
     slavio_intctlm_mem_writel,
 };
 
-void slavio_pic_info(void *opaque)
+void slavio_pic_info(Monitor *mon, void *opaque)
 {
     SLAVIO_INTCTLState *s = opaque;
     int i;
 
     for (i = 0; i < MAX_CPUS; i++) {
-        term_printf("per-cpu %d: pending 0x%08x\n", i,
-                    s->slaves[i]->intreg_pending);
+        monitor_printf(mon, "per-cpu %d: pending 0x%08x\n", i,
+                       s->slaves[i]->intreg_pending);
     }
-    term_printf("master: pending 0x%08x, disabled 0x%08x\n",
-                s->intregm_pending, s->intregm_disabled);
+    monitor_printf(mon, "master: pending 0x%08x, disabled 0x%08x\n",
+                   s->intregm_pending, s->intregm_disabled);
 }
 
-void slavio_irq_info(void *opaque)
+void slavio_irq_info(Monitor *mon, void *opaque)
 {
 #ifndef DEBUG_IRQ_COUNT
-    term_printf("irq statistic code not compiled.\n");
+    monitor_printf(mon, "irq statistic code not compiled.\n");
 #else
     SLAVIO_INTCTLState *s = opaque;
     int i;
     int64_t count;
 
-    term_printf("IRQ statistics:\n");
+    monitor_printf(mon, "IRQ statistics:\n");
     for (i = 0; i < 32; i++) {
         count = s->irq_count[i];
         if (count > 0)
-            term_printf("%2d: %" PRId64 "\n", i, count);
+            monitor_printf(mon, "%2d: %" PRId64 "\n", i, count);
     }
 #endif
 }
@@ -408,7 +407,7 @@ void *slavio_intctl_init(target_phys_addr_t addr, target_phys_addr_t addrg,
 
     register_savevm("slavio_intctl", addr, 1, slavio_intctl_save,
                     slavio_intctl_load, s);
-    qemu_register_reset(slavio_intctl_reset, s);
+    qemu_register_reset(slavio_intctl_reset, 0, s);
     *irq = qemu_allocate_irqs(slavio_set_irq, s, 32);
 
     *cpu_irq = qemu_allocate_irqs(slavio_set_timer_irq_cpu, s, MAX_CPUS);