//#define DEBUG_TIMER
#ifdef DEBUG_TIMER
-#define DPRINTF(fmt, args...) \
-do { printf("TIMER: " fmt , ##args); } while (0)
+#define DPRINTF(fmt, ...) \
+ do { printf("TIMER: " fmt , ## __VA_ARGS__); } while (0)
#else
-#define DPRINTF(fmt, args...)
+#define DPRINTF(fmt, ...) do {} while (0)
#endif
/*
uint32_t count, counthigh, reached;
uint64_t limit;
// processor only
- int running;
+ uint32_t running;
struct SLAVIO_TIMERState *master;
- int slave_index;
+ uint32_t slave_index;
// system only
- unsigned int num_slaves;
+ uint32_t num_slaves;
struct SLAVIO_TIMERState *slave[MAX_CPUS];
uint32_t slave_mode;
} SLAVIO_TIMERState;
-#define TIMER_MAXADDR 0x1f
#define SYS_TIMER_SIZE 0x14
#define CPU_TIMER_SIZE 0x10
SLAVIO_TIMERState *s = opaque;
uint32_t saddr, ret;
- saddr = (addr & TIMER_MAXADDR) >> 2;
+ saddr = addr >> 2;
switch (saddr) {
case TIMER_LIMIT:
// read limit (system counter mode) or read most signifying
uint32_t saddr;
DPRINTF("write " TARGET_FMT_plx " %08x\n", addr, val);
- saddr = (addr & TIMER_MAXADDR) >> 2;
+ saddr = addr >> 2;
switch (saddr) {
case TIMER_LIMIT:
if (slavio_timer_is_user(s)) {
uint64_t count;
// set user counter MSW, reset counter
- qemu_irq_lower(s->irq);
s->limit = TIMER_MAX_COUNT64;
s->counthigh = val & (TIMER_MAX_COUNT64 >> 32);
s->reached = 0;
count = ((uint64_t)s->counthigh << 32) | s->count;
DPRINTF("processor %d user timer set to %016llx\n", s->slave_index,
count);
- if (s->timer) {
+ if (s->timer)
ptimer_set_count(s->timer, LIMIT_TO_PERIODS(s->limit - count));
- ptimer_set_limit(s->timer, LIMIT_TO_PERIODS(s->limit), 0);
- }
} else {
// set limit, reset counter
qemu_irq_lower(s->irq);
s->limit = val & TIMER_MAX_COUNT32;
if (s->timer) {
if (s->limit == 0) /* free-run */
- ptimer_set_limit(s->timer, LIMIT_TO_PERIODS(TIMER_MAX_COUNT32), 1);
+ ptimer_set_limit(s->timer,
+ LIMIT_TO_PERIODS(TIMER_MAX_COUNT32), 1);
else
ptimer_set_limit(s->timer, LIMIT_TO_PERIODS(s->limit), 1);
}
uint64_t count;
// set user counter LSW, reset counter
- qemu_irq_lower(s->irq);
s->limit = TIMER_MAX_COUNT64;
s->count = val & TIMER_MAX_COUNT64;
s->reached = 0;
count = ((uint64_t)s->counthigh) << 32 | s->count;
DPRINTF("processor %d user timer set to %016llx\n", s->slave_index,
count);
- if (s->timer) {
+ if (s->timer)
ptimer_set_count(s->timer, LIMIT_TO_PERIODS(s->limit - count));
- ptimer_set_limit(s->timer, LIMIT_TO_PERIODS(s->limit), 0);
- }
} else
DPRINTF("not user timer\n");
break;
s->limit = val & TIMER_MAX_COUNT32;
if (s->timer) {
if (s->limit == 0) /* free-run */
- ptimer_set_limit(s->timer, LIMIT_TO_PERIODS(TIMER_MAX_COUNT32), 0);
+ ptimer_set_limit(s->timer,
+ LIMIT_TO_PERIODS(TIMER_MAX_COUNT32), 0);
else
ptimer_set_limit(s->timer, LIMIT_TO_PERIODS(s->limit), 0);
}
unsigned int i;
for (i = 0; i < s->num_slaves; i++) {
- if (val & (1 << i)) {
- qemu_irq_lower(s->slave[i]->irq);
- s->slave[i]->limit = -1ULL;
- } else {
- ptimer_stop(s->slave[i]->timer);
- }
- if ((val & (1 << i)) != (s->slave_mode & (1 << i))) {
- ptimer_stop(s->slave[i]->timer);
- ptimer_set_limit(s->slave[i]->timer,
- LIMIT_TO_PERIODS(s->slave[i]->limit), 1);
- DPRINTF("processor %d timer changed\n",
- s->slave[i]->slave_index);
- ptimer_run(s->slave[i]->timer, 0);
+ unsigned int processor = 1 << i;
+
+ // check for a change in timer mode for this processor
+ if ((val & processor) != (s->slave_mode & processor)) {
+ if (val & processor) { // counter -> user timer
+ qemu_irq_lower(s->slave[i]->irq);
+ // counters are always running
+ ptimer_stop(s->slave[i]->timer);
+ s->slave[i]->running = 0;
+ // user timer limit is always the same
+ s->slave[i]->limit = TIMER_MAX_COUNT64;
+ ptimer_set_limit(s->slave[i]->timer,
+ LIMIT_TO_PERIODS(s->slave[i]->limit),
+ 1);
+ // set this processors user timer bit in config
+ // register
+ s->slave_mode |= processor;
+ DPRINTF("processor %d changed from counter to user "
+ "timer\n", s->slave[i]->slave_index);
+ } else { // user timer -> counter
+ // stop the user timer if it is running
+ if (s->slave[i]->running)
+ ptimer_stop(s->slave[i]->timer);
+ // start the counter
+ ptimer_run(s->slave[i]->timer, 0);
+ s->slave[i]->running = 1;
+ // clear this processors user timer bit in config
+ // register
+ s->slave_mode &= ~processor;
+ DPRINTF("processor %d changed from user timer to "
+ "counter\n", s->slave[i]->slave_index);
+ }
}
}
- s->slave_mode = val & ((1 << s->num_slaves) - 1);
} else
DPRINTF("not system timer\n");
break;
static SLAVIO_TIMERState *slavio_timer_init(target_phys_addr_t addr,
qemu_irq irq,
SLAVIO_TIMERState *master,
- int slave_index)
+ uint32_t slave_index)
{
int slavio_timer_io_memory;
SLAVIO_TIMERState *s;
QEMUBH *bh;
s = qemu_mallocz(sizeof(SLAVIO_TIMERState));
- if (!s)
- return s;
s->irq = irq;
s->master = master;
s->slave_index = slave_index;
slavio_timer_io_memory);
register_savevm("slavio_timer", addr, 3, slavio_timer_save,
slavio_timer_load, s);
- qemu_register_reset(slavio_timer_reset, s);
+ qemu_register_reset(slavio_timer_reset, 0, s);
slavio_timer_reset(s);
return s;